/dts-v1/;

/ {
	model = "Qualcomm Technologies, Inc. kona v1 SoC";
	compatible = "qcom,kona";
	qcom,msm-id = < 0x164 0x10000 >;
	interrupt-parent = < 0x01 >;
	#address-cells = < 0x02 >;
	#size-cells = < 0x02 >;
	qcom,board-id = < 0x00 0x00 >;

	memory {
		device_type = "memory";
		reg = < 0x00 0x00 0x00 0x00 >;
	};

	aliases {
		ufshc1 = "/soc/ufshc@1d84000";
		sdhc2 = "/soc/sdhci@8804000";
		pci-domain0 = "/soc/qcom,pcie@1c00000";
		serial0 = "/soc/qcom,qup_uart@988000";
		hsuart0 = "/soc/qcom,qup_uart@998000";
		hsuart14 = "/soc/qcom,qup_uart@88c000";
		hsuart13 = "/soc/qcom,qup_uart@994000";
		hsuart12 = "/soc/qcom,qup_uart@98c000";
		phandle = < 0x1f8 >;
	};

	cpus {
		#address-cells = < 0x02 >;
		#size-cells = < 0x00 >;

		cpu@0 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x00 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x02 >;
			qcom,freq-domain = < 0x03 0x00 0x04 >;
			capacity-dmips-mhz = < 0x400 >;
			dynamic-power-coefficient = < 0x64 >;
			#cooling-cells = < 0x02 >;
			phandle = < 0x0c >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x02 >;

				l3-cache {
					compatible = "arm,arch-cache";
					cache-level = < 0x03 >;
					phandle = < 0x04 >;
				};
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x1f9 >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x1fa >;
			};
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x100 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x05 >;
			qcom,freq-domain = < 0x03 0x00 0x04 >;
			capacity-dmips-mhz = < 0x400 >;
			dynamic-power-coefficient = < 0x64 >;
			phandle = < 0x0d >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x05 >;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x1fb >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x1fc >;
			};
		};

		cpu@200 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x200 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x06 >;
			qcom,freq-domain = < 0x03 0x00 0x04 >;
			capacity-dmips-mhz = < 0x400 >;
			dynamic-power-coefficient = < 0x64 >;
			phandle = < 0x0e >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x06 >;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x1fd >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x1fe >;
			};
		};

		cpu@300 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x300 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x07 >;
			qcom,freq-domain = < 0x03 0x00 0x04 >;
			capacity-dmips-mhz = < 0x400 >;
			dynamic-power-coefficient = < 0x64 >;
			phandle = < 0x0f >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x07 >;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x1ff >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x200 >;
			};
		};

		cpu@400 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x400 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x08 >;
			qcom,freq-domain = < 0x03 0x01 0x04 >;
			capacity-dmips-mhz = < 0x766 >;
			dynamic-power-coefficient = < 0x202 >;
			#cooling-cells = < 0x02 >;
			phandle = < 0x10 >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x08 >;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x201 >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x202 >;
			};
		};

		cpu@500 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x500 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x09 >;
			qcom,freq-domain = < 0x03 0x01 0x04 >;
			capacity-dmips-mhz = < 0x766 >;
			dynamic-power-coefficient = < 0x202 >;
			phandle = < 0x11 >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x09 >;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x203 >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x204 >;
			};
		};

		cpu@600 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x600 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x0a >;
			qcom,freq-domain = < 0x03 0x01 0x04 >;
			capacity-dmips-mhz = < 0x766 >;
			dynamic-power-coefficient = < 0x202 >;
			phandle = < 0x12 >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x0a >;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x205 >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x206 >;
			};
		};

		cpu@700 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = < 0x00 0x700 >;
			enable-method = "psci";
			cpu-release-addr = < 0x00 0x90000000 >;
			next-level-cache = < 0x0b >;
			qcom,freq-domain = < 0x03 0x02 0x04 >;
			capacity-dmips-mhz = < 0x766 >;
			dynamic-power-coefficient = < 0x256 >;
			#cooling-cells = < 0x02 >;
			phandle = < 0x13 >;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = < 0x02 >;
				next-level-cache = < 0x04 >;
				phandle = < 0x0b >;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				phandle = < 0x207 >;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				phandle = < 0x208 >;
			};
		};

		cpu-map {

			cluster0 {

				core0 {
					cpu = < 0x0c >;
				};

				core1 {
					cpu = < 0x0d >;
				};

				core2 {
					cpu = < 0x0e >;
				};

				core3 {
					cpu = < 0x0f >;
				};
			};

			cluster1 {

				core0 {
					cpu = < 0x10 >;
				};

				core1 {
					cpu = < 0x11 >;
				};

				core2 {
					cpu = < 0x12 >;
				};
			};

			cluster2 {

				core0 {
					cpu = < 0x13 >;
				};
			};
		};
	};

	cpu-pmu {
		compatible = "arm,armv8-pmuv3";
		qcom,irq-is-percpu;
		interrupts = < 0x01 0x07 0x04 >;
		phandle = < 0x209 >;
	};

	soc {
		#address-cells = < 0x01 >;
		#size-cells = < 0x01 >;
		ranges = < 0x00 0x00 0x00 0xffffffff >;
		compatible = "simple-bus";
		phandle = < 0x20a >;

		qcom,cpufreq-hw {
			compatible = "qcom,cpufreq-hw-epss";
			reg = < 0x18591000 0x1000 0x18592000 0x1000 0x18593000 0x1000 >;
			reg-names = "freq-domain0\0freq-domain1\0freq-domain2";
			clocks = < 0x14 0x00 0x15 0xd1 >;
			clock-names = "xo\0alternate";
			qcom,lut-row-size = < 0x04 >;
			qcom,skip-enable-check;
			#freq-domain-cells = < 0x02 >;
			phandle = < 0x03 >;

			cpu7-notify {
				qcom,cooling-cpu = < 0x13 >;
				#cooling-cells = < 0x02 >;
				phandle = < 0x26 >;
			};

			qcom,cpu-isolation {
				compatible = "qcom,cpu-isolate";

				cpu0-isolate {
					qcom,cpu = < 0x0c >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x1e >;
				};

				cpu1-isolate {
					qcom,cpu = < 0x0d >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x20 >;
				};

				cpu2-isolate {
					qcom,cpu = < 0x0e >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x22 >;
				};

				cpu3-isolate {
					qcom,cpu = < 0x0f >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x24 >;
				};

				cpu4-isolate {
					qcom,cpu = < 0x10 >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x28 >;
				};

				cpu5-isolate {
					qcom,cpu = < 0x11 >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x2b >;
				};

				cpu6-isolate {
					qcom,cpu = < 0x12 >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x2e >;
				};

				cpu7-isolate {
					qcom,cpu = < 0x13 >;
					#cooling-cells = < 0x02 >;
					phandle = < 0x31 >;
				};
			};

			qcom,limits-dcvs {
				compatible = "qcom,msm-hw-limits";
				isens_vref_0p8-supply = < 0x16 >;
				isens-vref-0p8-settings = < 0xd6d80 0xd6d80 0x4e20 >;
				isens_vref_1p8-supply = < 0x17 >;
				isens-vref-1p8-settings = < 0x1b7740 0x1b7740 0x4e20 >;
			};
		};

		thermal-zones {
			phandle = < 0x20b >;

			aoss0-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "user_space";
				thermal-sensors = < 0x18 0x00 >;
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-0-0-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "user_space";
				thermal-sensors = < 0x18 0x01 >;
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-0-1-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "user_space";
				thermal-sensors = < 0x18 0x02 >;
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-0-2-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "user_space";
				thermal-sensors = < 0x18 0x03 >;
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-0-3-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x04 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpuss-0-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x05 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpuss-1-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x06 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-0-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x07 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-1-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x08 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-2-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x09 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-3-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0a >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-4-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0b >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-5-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0c >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-6-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0d >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cpu-1-7-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0e >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			gpuss-0-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0f >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			aoss-1-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x00 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cwlan-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x01 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			video-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x02 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			ddr-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x03 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			q6-hvx-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x04 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			camera-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x05 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			cmpss-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x06 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			npu-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x07 >;
				thermal-governor = "user_space";
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			gpuss-1-usr {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "user_space";
				thermal-sensors = < 0x19 0x08 >;
				wake-capable-sensor;

				trips {

					active-config0 {
						temperature = < 0x1e848 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};

					active-config1 {
						temperature = < 0x1c138 >;
						hysteresis = < 0x3e8 >;
						type = "passive";
					};
				};
			};

			gpuss-max-step {
				polling-delay-passive = < 0x0a >;
				polling-delay = < 0x64 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					gpu-trip0 {
						temperature = < 0x17318 >;
						hysteresis = < 0x00 >;
						type = "passive";
						phandle = < 0x1a >;
					};
				};

				cooling-maps {

					gpu_cdev {
						trip = < 0x1a >;
						cooling-device = < 0x1b 0xffffffff 0xffffffff >;
					};
				};
			};

			apc-0-max-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					silver-trip {
						temperature = < 0x1d4c0 >;
						hysteresis = < 0x00 >;
						type = "passive";
					};
				};
			};

			apc-1-max-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					gold-trip {
						temperature = < 0x1d4c0 >;
						hysteresis = < 0x00 >;
						type = "passive";
					};
				};
			};

			pop-mem-step {
				polling-delay-passive = < 0x0a >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x03 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					pop-trip {
						temperature = < 0x17318 >;
						hysteresis = < 0x00 >;
						type = "passive";
						phandle = < 0x1c >;
					};
				};

				cooling-maps {

					pop_cdev4 {
						trip = < 0x1c >;
						cooling-device = < 0x10 0xffffffff 0xffffffff >;
					};

					pop_cdev7 {
						trip = < 0x1c >;
						cooling-device = < 0x13 0xffffffff 0xffffffff >;
					};
				};
			};

			cpu-0-0-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "step_wise";
				thermal-sensors = < 0x18 0x01 >;
				wake-capable-sensor;

				trips {

					cpu00-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x1d >;
					};
				};

				cooling-maps {

					cpu00_cdev {
						trip = < 0x1d >;
						cooling-device = < 0x1e 0x01 0x01 >;
					};
				};
			};

			cpu-0-1-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "step_wise";
				thermal-sensors = < 0x18 0x02 >;
				wake-capable-sensor;

				trips {

					cpu01-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x1f >;
					};
				};

				cooling-maps {

					cpu01_cdev {
						trip = < 0x1f >;
						cooling-device = < 0x20 0x01 0x01 >;
					};
				};
			};

			cpu-0-2-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-governor = "step_wise";
				thermal-sensors = < 0x18 0x03 >;
				wake-capable-sensor;

				trips {

					cpu02-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x21 >;
					};
				};

				cooling-maps {

					cpu02_cdev {
						trip = < 0x21 >;
						cooling-device = < 0x22 0x01 0x01 >;
					};
				};
			};

			cpu-0-3-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x04 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpu03-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x23 >;
					};
				};

				cooling-maps {

					cpu03_cdev {
						trip = < 0x23 >;
						cooling-device = < 0x24 0x01 0x01 >;
					};
				};
			};

			cpu-1-0-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x07 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-10-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x25 >;
					};

					cpu10-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x27 >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x25 >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu10_cdev {
						trip = < 0x27 >;
						cooling-device = < 0x28 0x01 0x01 >;
					};
				};
			};

			cpu-1-1-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x08 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-11-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x29 >;
					};

					cpu11-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x2a >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x29 >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu11_cdev {
						trip = < 0x2a >;
						cooling-device = < 0x2b 0x01 0x01 >;
					};
				};
			};

			cpu-1-2-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x09 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-12-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x2c >;
					};

					cpu12-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x2d >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x2c >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu12_cdev {
						trip = < 0x2d >;
						cooling-device = < 0x2e 0x01 0x01 >;
					};
				};
			};

			cpu-1-3-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0a >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-13-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x2f >;
					};

					cpu13-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x30 >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x2f >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu13_cdev {
						trip = < 0x30 >;
						cooling-device = < 0x31 0x01 0x01 >;
					};
				};
			};

			cpu-1-4-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0b >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-14-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x32 >;
					};

					cpu14-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x33 >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x32 >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu14_cdev {
						trip = < 0x33 >;
						cooling-device = < 0x28 0x01 0x01 >;
					};
				};
			};

			cpu-1-5-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0c >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-15-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x34 >;
					};

					cpu15-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x35 >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x34 >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu15_cdev {
						trip = < 0x35 >;
						cooling-device = < 0x2b 0x01 0x01 >;
					};
				};
			};

			cpu-1-6-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0d >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-16-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x36 >;
					};

					cpu16-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x37 >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x36 >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu16_cdev {
						trip = < 0x37 >;
						cooling-device = < 0x2e 0x01 0x01 >;
					};
				};
			};

			cpu-1-7-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x18 0x0e >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cpufreq-17-config {
						temperature = < 0x124f8 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x38 >;
					};

					cpu17-config {
						temperature = < 0x1adb0 >;
						hysteresis = < 0x2710 >;
						type = "passive";
						phandle = < 0x39 >;
					};
				};

				cooling-maps {

					cpufreq_cdev {
						trip = < 0x38 >;
						cooling-device = < 0x26 0x01 0x01 >;
					};

					cpu17_cdev {
						trip = < 0x39 >;
						cooling-device = < 0x31 0x01 0x01 >;
					};
				};
			};

			cwlan-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x01 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cwlan-trip0 {
						temperature = < 0x186a0 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x3a >;
					};
				};

				cooling-maps {

					cdsp-cdev {
						trip = < 0x3a >;
						cooling-device = < 0x3b 0x03 0x03 >;
					};

					gpu-cdev {
						trip = < 0x3a >;
						cooling-device = < 0x1b 0xfffffffd 0xfffffffd >;
					};

					npu_cdev {
						trip = < 0x3a >;
						cooling-device = < 0x3c 0xfffffffb 0xfffffffb >;
					};
				};
			};

			video-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x02 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					video-trip0 {
						temperature = < 0x186a0 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x3d >;
					};
				};

				cooling-maps {

					cdsp-cdev {
						trip = < 0x3d >;
						cooling-device = < 0x3b 0x03 0x03 >;
					};

					gpu-cdev {
						trip = < 0x3d >;
						cooling-device = < 0x1b 0xfffffffd 0xfffffffd >;
					};

					npu_cdev {
						trip = < 0x3d >;
						cooling-device = < 0x3c 0xfffffffb 0xfffffffb >;
					};
				};
			};

			ddr-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x03 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					ddr-trip0 {
						temperature = < 0x186a0 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x3e >;
					};
				};

				cooling-maps {

					cdsp-cdev {
						trip = < 0x3e >;
						cooling-device = < 0x3b 0x03 0x03 >;
					};

					gpu-cdev {
						trip = < 0x3e >;
						cooling-device = < 0x1b 0xfffffffd 0xfffffffd >;
					};

					npu_cdev {
						trip = < 0x3e >;
						cooling-device = < 0x3c 0xfffffffb 0xfffffffb >;
					};
				};
			};

			q6-hvx-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x04 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					q6-hvx-trip0 {
						temperature = < 0x186a0 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x3f >;
					};
				};

				cooling-maps {

					cdsp-cdev {
						trip = < 0x3f >;
						cooling-device = < 0x3b 0x03 0x03 >;
					};

					gpu-cdev {
						trip = < 0x3f >;
						cooling-device = < 0x1b 0xfffffffd 0xfffffffd >;
					};

					npu_cdev {
						trip = < 0x3f >;
						cooling-device = < 0x3c 0xfffffffb 0xfffffffb >;
					};
				};
			};

			camera-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x05 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					camera-trip0 {
						temperature = < 0x186a0 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x40 >;
					};
				};

				cooling-maps {

					cdsp-cdev {
						trip = < 0x40 >;
						cooling-device = < 0x3b 0x03 0x03 >;
					};

					gpu-cdev {
						trip = < 0x40 >;
						cooling-device = < 0x1b 0xfffffffd 0xfffffffd >;
					};

					npu_cdev {
						trip = < 0x40 >;
						cooling-device = < 0x3c 0xfffffffb 0xfffffffb >;
					};
				};
			};

			cmpss-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x06 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					cmpss-trip0 {
						temperature = < 0x186a0 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x41 >;
					};
				};

				cooling-maps {

					cdsp-cdev {
						trip = < 0x41 >;
						cooling-device = < 0x3b 0x03 0x03 >;
					};

					gpu-cdev {
						trip = < 0x41 >;
						cooling-device = < 0x1b 0xfffffffd 0xfffffffd >;
					};

					npu_cdev {
						trip = < 0x41 >;
						cooling-device = < 0x3c 0xfffffffb 0xfffffffb >;
					};
				};
			};

			npu-step {
				polling-delay-passive = < 0x00 >;
				polling-delay = < 0x00 >;
				thermal-sensors = < 0x19 0x07 >;
				thermal-governor = "step_wise";
				wake-capable-sensor;

				trips {

					npu-trip0 {
						temperature = < 0x186a0 >;
						hysteresis = < 0x1388 >;
						type = "passive";
						phandle = < 0x42 >;
					};
				};

				cooling-maps {

					cdsp-cdev {
						trip = < 0x42 >;
						cooling-device = < 0x3b 0x03 0x03 >;
					};

					gpu-cdev {
						trip = < 0x42 >;
						cooling-device = < 0x1b 0xfffffffd 0xfffffffd >;
					};

					npu_cdev {
						trip = < 0x42 >;
						cooling-device = < 0x3c 0xfffffffb 0xfffffffb >;
					};
				};
			};
		};

		slim@3ac0000 {
			cell-index = < 0x01 >;
			compatible = "qcom,slim-ngd";
			reg = < 0x3ac0000 0x2c000 0x3a84000 0x2c000 >;
			reg-names = "slimbus_physical\0slimbus_bam_physical";
			interrupts = < 0x00 0xa3 0x04 0x00 0xa4 0x04 >;
			interrupt-names = "slimbus_irq\0slimbus_bam_irq";
			qcom,apps-ch-pipes = < 0x700000 >;
			qcom,ea-pc = < 0x2d0 >;
			iommus = < 0x43 0x1826 0x00 0x43 0x182f 0x00 0x43 0x1830 0x01 >;
			qcom,iommu-dma-addr-pool = < 0x40000000 0xc0000000 >;
			qcom,iommu-dma = "atomic";
			status = "ok";
			phandle = < 0x20c >;

			qca6390 {
				compatible = "qcom,btfmslim_slave";
				elemental-addr = [ 00 01 20 02 17 02 ];
				qcom,btfm-slim-ifd = "btfmslim_slave_ifd";
				qcom,btfm-slim-ifd-elemental-addr = [ 00 00 20 02 17 02 ];
				phandle = < 0x20d >;
			};
		};

		interrupt-controller@17a00000 {
			compatible = "arm,gic-v3";
			#interrupt-cells = < 0x03 >;
			interrupt-controller;
			#redistributor-regions = < 0x01 >;
			redistributor-stride = < 0x00 0x20000 >;
			reg = < 0x17a00000 0x10000 0x17a60000 0x100000 >;
			interrupts = < 0x01 0x09 0x04 >;
			phandle = < 0x01 >;
		};

		qcom,chd_silver {
			compatible = "qcom,core-hang-detect";
			label = "silver";
			qcom,threshold-arr = < 0x18000058 0x18010058 0x18020058 0x18030058 >;
			qcom,config-arr = < 0x18000060 0x18010060 0x18020060 0x18030060 >;
		};

		dsu_pmu@0 {
			compatible = "arm,dsu-pmu";
			interrupts = < 0x00 0x32 0x04 >;
			cpus = < 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 >;
		};

		qcom,chd_gold {
			compatible = "qcom,core-hang-detect";
			label = "gold";
			qcom,threshold-arr = < 0x18040058 0x18050058 0x18060058 0x18070058 >;
			qcom,config-arr = < 0x18040060 0x18050060 0x18060060 0x18070060 >;
		};

		cache-controller@9200000 {
			compatible = "qcom,llcc-v2";
			reg = < 0x9200000 0x1d0000 0x9600000 0x50000 >;
			reg-names = "llcc_base\0llcc_broadcast_base";
			cap-based-alloc-and-pwr-collapse;
		};

		qcom,wdt@17c10000 {
			compatible = "qcom,msm-watchdog";
			reg = < 0x17c10000 0x1000 >;
			reg-names = "wdt-base";
			interrupts = < 0x00 0x00 0x04 0x00 0x01 0x04 >;
			qcom,bark-time = < 0x2af8 >;
			qcom,pet-time = < 0x2490 >;
			qcom,wakeup-enable;
			qcom,ipi-ping;
			phandle = < 0x20e >;
		};

		timer {
			compatible = "arm,armv8-timer";
			interrupts = < 0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0c 0xff08 >;
			clock-frequency = < 0x124f800 >;
			phandle = < 0x20f >;
		};

		timer@17c20000 {
			#address-cells = < 0x01 >;
			#size-cells = < 0x01 >;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = < 0x17c20000 0x1000 >;
			clock-frequency = < 0x124f800 >;
			phandle = < 0x210 >;

			frame@17c21000 {
				frame-number = < 0x00 >;
				interrupts = < 0x00 0x08 0x04 0x00 0x06 0x04 >;
				reg = < 0x17c21000 0x1000 0x17c22000 0x1000 >;
			};

			frame@17c23000 {
				frame-number = < 0x01 >;
				interrupts = < 0x00 0x09 0x04 >;
				reg = < 0x17c23000 0x1000 >;
				status = "disabled";
			};

			frame@17c25000 {
				frame-number = < 0x02 >;
				interrupts = < 0x00 0x0a 0x04 >;
				reg = < 0x17c25000 0x1000 >;
				status = "disabled";
			};

			frame@17c27000 {
				frame-number = < 0x03 >;
				interrupts = < 0x00 0x0b 0x04 >;
				reg = < 0x17c27000 0x1000 >;
				status = "disabled";
			};

			frame@17c29000 {
				frame-number = < 0x04 >;
				interrupts = < 0x00 0x0c 0x04 >;
				reg = < 0x17c29000 0x1000 >;
				status = "disabled";
			};

			frame@17c2b000 {
				frame-number = < 0x05 >;
				interrupts = < 0x00 0x0d 0x04 >;
				reg = < 0x17c2b000 0x1000 >;
				status = "disabled";
			};

			frame@17c2d000 {
				frame-number = < 0x06 >;
				interrupts = < 0x00 0x0e 0x04 >;
				reg = < 0x17c2d000 0x1000 >;
				status = "disabled";
			};
		};

		qcom,devfreq-l3 {
			compatible = "qcom,devfreq-fw";
			reg = < 0x18590000 0x04 0x18590100 0xa0 0x18590320 0x04 >;
			reg-names = "en-base\0ftbl-base\0perf-base";

			qcom,cpu0-cpu-l3-lat {
				compatible = "qcom,devfreq-fw-voter";
				phandle = < 0x211 >;
			};

			qcom,cpu4-cpu-l3-lat {
				compatible = "qcom,devfreq-fw-voter";
				phandle = < 0x212 >;
			};

			qcom,cpu7-cpu-l3-lat {
				compatible = "qcom,devfreq-fw-voter";
				phandle = < 0x213 >;
			};

			qcom,cdsp-cdsp-l3-lat {
				compatible = "qcom,devfreq-fw-voter";
				phandle = < 0x78 >;
			};
		};

		qcom,bus_proxy_client {
			compatible = "qcom,bus-proxy-client";
			qcom,msm-bus,name = "bus-proxy-client";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x02 >;
			qcom,msm-bus,vectors-KBps = < 0x16 0x200 0x00 0x00 0x17 0x200 0x00 0x00 0x16 0x200 0x16e360 0x16e360 0x17 0x200 0x16e360 0x16e360 >;
			qcom,msm-bus,active-only;
			status = "ok";
			phandle = < 0x214 >;
		};

		keepalive-opp-table {
			compatible = "operating-points-v2";
			phandle = < 0x44 >;

			opp-1 {
				opp-hz = < 0x00 0x01 >;
			};
		};

		qcom,snoc_cnoc_keepalive {
			compatible = "qcom,devbw";
			governor = "powersave";
			qcom,src-dst-ports = < 0x01 0x273 >;
			qcom,active-only;
			status = "ok";
			operating-points-v2 = < 0x44 >;
			phandle = < 0x215 >;
		};

		llcc-bw-opp-table {
			compatible = "operating-points-v2";
			phandle = < 0x45 >;

			opp-150 {
				opp-hz = < 0x00 0x8f0 >;
			};

			opp-300 {
				opp-hz = < 0x00 0x11e1 >;
			};

			opp-466 {
				opp-hz = < 0x00 0x1bc6 >;
			};

			opp-600 {
				opp-hz = < 0x00 0x23c3 >;
			};

			opp-806 {
				opp-hz = < 0x00 0x300a >;
			};

			opp-933 {
				opp-hz = < 0x00 0x379c >;
			};

			opp-1000 {
				opp-hz = < 0x00 0x3b9a >;
			};
		};

		suspendable-llcc-bw-opp-table {
			compatible = "operating-points-v2";
			phandle = < 0x49 >;

			opp-0 {
				opp-hz = < 0x00 0x00 >;
			};

			opp-150 {
				opp-hz = < 0x00 0x8f0 >;
			};

			opp-300 {
				opp-hz = < 0x00 0x11e1 >;
			};

			opp-466 {
				opp-hz = < 0x00 0x1bc6 >;
			};

			opp-600 {
				opp-hz = < 0x00 0x23c3 >;
			};

			opp-806 {
				opp-hz = < 0x00 0x300a >;
			};

			opp-933 {
				opp-hz = < 0x00 0x379c >;
			};

			opp-1000 {
				opp-hz = < 0x00 0x3b9a >;
			};
		};

		ddr-bw-opp-table {
			compatible = "operating-points-v2";
			phandle = < 0x47 >;

			opp-200 {
				opp-hz = < 0x00 0x2fa >;
				opp-supported-hw = < 0x180 >;
			};

			opp-300 {
				opp-hz = < 0x00 0x478 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-451 {
				opp-hz = < 0x00 0x6b8 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-547 {
				opp-hz = < 0x00 0x826 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-681 {
				opp-hz = < 0x00 0xa25 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-768 {
				opp-hz = < 0x00 0xb71 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-1017 {
				opp-hz = < 0x00 0xf27 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-1353 {
				opp-hz = < 0x00 0x1429 >;
				opp-supported-hw = < 0x80 >;
			};

			opp-1555 {
				opp-hz = < 0x00 0x172b >;
				opp-supported-hw = < 0x180 >;
			};

			opp-1804 {
				opp-hz = < 0x00 0x1ae1 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-2092 {
				opp-hz = < 0x00 0x1f2c >;
				opp-supported-hw = < 0x180 >;
			};

			opp-2736 {
				opp-hz = < 0x00 0x28c5 >;
				opp-supported-hw = < 0x100 >;
			};
		};

		suspendable-ddr-bw-opp-table {
			compatible = "operating-points-v2";
			phandle = < 0x4b >;

			opp-0 {
				opp-hz = < 0x00 0x00 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-200 {
				opp-hz = < 0x00 0x2fa >;
				opp-supported-hw = < 0x180 >;
			};

			opp-300 {
				opp-hz = < 0x00 0x478 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-451 {
				opp-hz = < 0x00 0x6b8 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-547 {
				opp-hz = < 0x00 0x826 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-681 {
				opp-hz = < 0x00 0xa25 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-768 {
				opp-hz = < 0x00 0xb71 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-1017 {
				opp-hz = < 0x00 0xf27 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-1353 {
				opp-hz = < 0x00 0x1429 >;
				opp-supported-hw = < 0x80 >;
			};

			opp-1555 {
				opp-hz = < 0x00 0x172b >;
				opp-supported-hw = < 0x180 >;
			};

			opp-1804 {
				opp-hz = < 0x00 0x1ae1 >;
				opp-supported-hw = < 0x180 >;
			};

			opp-2092 {
				opp-hz = < 0x00 0x1f2c >;
				opp-supported-hw = < 0x180 >;
			};

			opp-2736 {
				opp-hz = < 0x00 0x28c5 >;
				opp-supported-hw = < 0x100 >;
			};
		};

		llcc-pmu@9095000 {
			compatible = "qcom,llcc-pmu-ver2";
			reg = < 0x9095000 0x300 >;
			reg-names = "lagg-base";
			phandle = < 0x216 >;
		};

		qcom,cpu-cpu-llcc-bw {
			compatible = "qcom,devbw";
			governor = "performance";
			qcom,src-dst-ports = < 0x01 0x302 >;
			qcom,active-only;
			operating-points-v2 = < 0x45 >;
			phandle = < 0x46 >;
		};

		qcom,cpu-cpu-llcc-bwmon@90b6400 {
			compatible = "qcom,bimc-bwmon4";
			reg = < 0x90b6400 0x300 0x90b6300 0x200 >;
			reg-names = "base\0global_base";
			interrupts = < 0x00 0x245 0x04 >;
			qcom,mport = < 0x00 >;
			qcom,hw-timer-hz = < 0x124f800 >;
			qcom,target-dev = < 0x46 >;
			qcom,count-unit = < 0x10000 >;
			phandle = < 0x217 >;
		};

		qcom,cpu-llcc-ddr-bw {
			compatible = "qcom,devbw-ddr";
			governor = "performance";
			qcom,src-dst-ports = < 0x81 0x200 >;
			qcom,active-only;
			operating-points-v2 = < 0x47 >;
			phandle = < 0x48 >;
		};

		qcom,cpu-llcc-ddr-bwmon@9091000 {
			compatible = "qcom,bimc-bwmon5";
			reg = < 0x9091000 0x1000 >;
			reg-names = "base";
			interrupts = < 0x00 0x51 0x04 >;
			qcom,hw-timer-hz = < 0x124f800 >;
			qcom,target-dev = < 0x48 >;
			qcom,count-unit = < 0x10000 >;
			phandle = < 0x218 >;
		};

		qcom,npu-npu-llcc-bw {
			compatible = "qcom,devbw";
			governor = "performance";
			qcom,src-dst-ports = < 0x9a 0x302 >;
			operating-points-v2 = < 0x49 >;
			phandle = < 0x4a >;
		};

		qcom,npu-npu-llcc-bwmon@60300 {
			compatible = "qcom,bimc-bwmon4";
			reg = < 0x60400 0x300 0x60300 0x200 >;
			reg-names = "base\0global_base";
			qcom,msm_bus = < 0x9a 0x2756 >;
			qcom,msm_bus_name = "npu_bwmon_cdsp";
			clocks = < 0x15 0x2a 0x15 0x29 >;
			clock-names = "npu_bwmon_ahb\0npu_bwmon_axi";
			qcom,bwmon_clks = "npu_bwmon_ahb\0npu_bwmon_axi";
			interrupts = < 0x00 0x1dc 0x04 >;
			qcom,mport = < 0x00 >;
			qcom,hw-timer-hz = < 0x124f800 >;
			qcom,target-dev = < 0x4a >;
			qcom,count-unit = < 0x10000 >;
			phandle = < 0x219 >;
		};

		qcom,npu-llcc-ddr-bw {
			compatible = "qcom,devbw-ddr";
			governor = "performance";
			qcom,src-dst-ports = < 0x302 0x200 >;
			operating-points-v2 = < 0x4b >;
			phandle = < 0x4c >;
		};

		qcom,npu-llcc-ddr-bwmon@0x9093000 {
			compatible = "qcom,bimc-bwmon5";
			reg = < 0x9093000 0x1000 >;
			reg-names = "base";
			interrupts = < 0x00 0x51 0x04 >;
			qcom,hw-timer-hz = < 0x124f800 >;
			qcom,target-dev = < 0x4c >;
			qcom,count-unit = < 0x10000 >;
			phandle = < 0x21a >;
		};

		qcom,npudsp-npu-ddr-bw {
			compatible = "qcom,devbw-ddr";
			governor = "performance";
			qcom,src-dst-ports = < 0x9a 0x200 >;
			operating-points-v2 = < 0x4b >;
			phandle = < 0x4d >;
		};

		qcom,npudsp-npu-ddr-bwmon@70200 {
			compatible = "qcom,bimc-bwmon4";
			reg = < 0x70300 0x300 0x70200 0x200 >;
			reg-names = "base\0global_base";
			qcom,msm_bus = < 0x9a 0x2756 >;
			qcom,msm_bus_name = "npudsp_bwmon_cdsp";
			clocks = < 0x15 0x2a 0x15 0x29 >;
			clock-names = "npu_bwmon_ahb\0npu_bwmon_axi";
			qcom,bwmon_clks = "npu_bwmon_ahb\0npu_bwmon_axi";
			interrupts = < 0x00 0x9b 0x04 >;
			qcom,mport = < 0x00 >;
			qcom,hw-timer-hz = < 0x124f800 >;
			qcom,target-dev = < 0x4d >;
			qcom,count-unit = < 0x10000 >;
			phandle = < 0x21b >;
		};

		qcom,npu-npu-ddr-latfloor {
			compatible = "qcom,devbw-ddr";
			governor = "powersave";
			qcom,src-dst-ports = < 0x9a 0x200 >;
			operating-points-v2 = < 0x4b >;
			phandle = < 0x4e >;
		};

		qcom,npu-staticmap-mon {
			compatible = "qcom,static-map";
			qcom,target-dev = < 0x4e >;
			clocks = < 0x4f 0x04 >;
			clock-names = "cal_hm0_clk";
			qcom,dev_clk = "cal_hm0_clk";
			qcom,core-dev-table = < 0x00 0x00 0x493e0 0x6b8 0x631f0 0xb71 0x82208 0x172b 0xb2390 0x1ae1 0xe09c0 0x1f2c 0xf4240 0x28c5 >;
			phandle = < 0x21c >;
		};

		qoslat-opp-table {
			compatible = "operating-points-v2";
			phandle = < 0x21d >;

			opp-0 {
				opp-hz = < 0x00 0x01 >;
			};

			opp-1 {
				opp-hz = < 0x00 0x02 >;
			};
		};

		qcom,msm-imem@146bf000 {
			compatible = "qcom,msm-imem";
			reg = < 0x146bf000 0x1000 >;
			ranges = < 0x00 0x146bf000 0x1000 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x01 >;

			mem_dump_table@10 {
				compatible = "qcom,msm-imem-mem_dump_table";
				reg = < 0x10 0x08 >;
			};

			restart_reason@65c {
				compatible = "qcom,msm-imem-restart_reason";
				reg = < 0x65c 0x04 >;
			};

			dload_type@1c {
				compatible = "qcom,msm-imem-dload-type";
				reg = < 0x1c 0x04 >;
			};

			boot_stats@6b0 {
				compatible = "qcom,msm-imem-boot_stats";
				reg = < 0x6b0 0x20 >;
			};

			kaslr_offset@6d0 {
				compatible = "qcom,msm-imem-kaslr_offset";
				reg = < 0x6d0 0x0c >;
			};

			pil@94c {
				compatible = "qcom,msm-imem-pil";
				reg = < 0x94c 0xc8 >;
			};

			diag_dload@c8 {
				compatible = "qcom,msm-imem-diag-dload";
				reg = < 0xc8 0xc8 >;
			};
		};

		restart@c264000 {
			compatible = "qcom,pshold";
			reg = < 0xc264000 0x04 0x1fd3000 0x04 >;
			reg-names = "pshold-base\0tcsr-boot-misc-detect";
		};

		qseecom@82400000 {
			compatible = "qcom,qseecom";
			reg = < 0x82400000 0x3a00000 >;
			reg-names = "secapp-region";
			memory-region = < 0x50 >;
			qcom,hlos-num-ce-hw-instances = < 0x01 >;
			qcom,hlos-ce-hw-instance = < 0x00 >;
			qcom,qsee-ce-hw-instance = < 0x00 >;
			qcom,disk-encrypt-pipe-pair = < 0x02 >;
			qcom,support-fde;
			qcom,no-clock-support;
			qcom,fde-key-size;
			qcom,appsbl-qseecom-support;
			qcom,commonlib64-loaded-by-uefi;
			qcom,qsee-reentrancy-support = < 0x02 >;
			phandle = < 0x21e >;
		};

		qrng@793000 {
			compatible = "qcom,msm-rng";
			reg = < 0x793000 0x1000 >;
			qcom,msm-rng-iface-clk;
			qcom,no-qrng-config;
			qcom,msm-bus,name = "msm-rng-noc";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x26a 0x00 0x00 0x01 0x26a 0x00 0x493e0 >;
			clocks = < 0x15 0x50 >;
			clock-names = "iface_clk";
			phandle = < 0x21f >;
		};

		interrupt-controller@b220000 {
			compatible = "qcom,kona-pdc";
			reg = < 0xb220000 0x30000 0x17c000f0 0x60 >;
			qcom,pdc-ranges = < 0x00 0x1e0 0x5e 0x5e 0x261 0x1f 0x7d 0x3f 0x01 0x7e 0x2cc 0x0c >;
			#interrupt-cells = < 0x02 >;
			interrupt-parent = < 0x01 >;
			interrupt-controller;
			phandle = < 0x61 >;
		};

		clocks {

			xo-board {
				compatible = "fixed-clock";
				#clock-cells = < 0x00 >;
				clock-frequency = < 0x249f000 >;
				clock-output-names = "xo_board";
				phandle = < 0x220 >;
			};

			sleep-clk {
				compatible = "fixed-clock";
				clock-frequency = < 0x7d00 >;
				clock-output-names = "chip_sleep_clk";
				#clock-cells = < 0x01 >;
				phandle = < 0x221 >;
			};
		};

		qcom,aopclk {
			compatible = "qcom,aop-qmp-clk";
			#clock-cells = < 0x01 >;
			mboxes = < 0x51 0x00 >;
			mbox-names = "qdss_clk";
			qcom,clk-stop-bimc-log;
			phandle = < 0x222 >;
		};

		qcom,gcc@100000 {
			compatible = "qcom,gcc-kona\0syscon";
			reg = < 0x100000 0x1f0000 >;
			reg-names = "cc_base";
			vdd_cx-supply = < 0x52 >;
			vdd_cx_ao-supply = < 0x53 >;
			vdd_mm-supply = < 0x54 >;
			#clock-cells = < 0x01 >;
			#reset-cells = < 0x01 >;
			phandle = < 0x15 >;
		};

		qcom,npucc@9980000 {
			compatible = "qcom,npucc-kona\0syscon";
			reg = < 0x9980000 0x10000 0x9800000 0x10000 0x9810000 0x10000 >;
			reg-names = "cc\0qdsp6ss\0qdsp6ss_pll";
			vdd_cx-supply = < 0x52 >;
			#clock-cells = < 0x01 >;
			#reset-cells = < 0x01 >;
			phandle = < 0x4f >;
		};

		qcom,videocc@abf0000 {
			compatible = "qcom,videocc-kona\0syscon";
			reg = < 0xabf0000 0x10000 >;
			reg-names = "cc_base";
			vdd_mx-supply = < 0x55 >;
			vdd_mm-supply = < 0x54 >;
			clock-names = "cfg_ahb_clk";
			clocks = < 0x15 0xcd >;
			#clock-cells = < 0x01 >;
			#reset-cells = < 0x01 >;
			phandle = < 0x56 >;
		};

		qcom,camcc@ad00000 {
			compatible = "qcom,camcc-kona\0syscon";
			reg = < 0xad00000 0x10000 >;
			reg-names = "cc_base";
			vdd_mx-supply = < 0x55 >;
			vdd_mm-supply = < 0x54 >;
			clock-names = "cfg_ahb_clk";
			clocks = < 0x15 0x0b >;
			#clock-cells = < 0x01 >;
			#reset-cells = < 0x01 >;
			phandle = < 0x58 >;
		};

		qcom,dispcc@af00000 {
			compatible = "qcom,kona-dispcc\0syscon";
			reg = < 0xaf00000 0x20000 >;
			reg-names = "cc_base";
			vdd_mm-supply = < 0x54 >;
			clock-names = "cfg_ahb_clk";
			clocks = < 0x15 0x18 >;
			#clock-cells = < 0x01 >;
			#reset-cells = < 0x01 >;
			phandle = < 0x57 >;
		};

		qcom,gpucc@3d90000 {
			compatible = "qcom,gpucc-kona\0syscon";
			reg = < 0x3d90000 0x9000 >;
			reg-names = "cc_base";
			vdd_cx-supply = < 0x52 >;
			vdd_mx-supply = < 0x55 >;
			#clock-cells = < 0x01 >;
			#reset-cells = < 0x01 >;
			phandle = < 0x59 >;
		};

		qcom,cpucc {
			compatible = "qcom,dummycc";
			clock-output-names = "cpucc_clocks";
			#clock-cells = < 0x01 >;
			phandle = < 0x1f2 >;
		};

		syscon@182a0000 {
			compatible = "syscon";
			reg = < 0x182a0000 0x1c >;
			phandle = < 0x5a >;
		};

		syscon@90ba000 {
			compatible = "syscon";
			reg = < 0x90ba000 0x54 >;
			phandle = < 0x5b >;
		};

		qcom,cc-debug {
			compatible = "qcom,kona-debugcc";
			qcom,gcc = < 0x15 >;
			qcom,videocc = < 0x56 >;
			qcom,dispcc = < 0x57 >;
			qcom,camcc = < 0x58 >;
			qcom,gpucc = < 0x59 >;
			qcom,npucc = < 0x4f >;
			qcom,apsscc = < 0x5a >;
			qcom,mccc = < 0x5b >;
			clock-names = "xo_clk_src";
			clocks = < 0x14 0x00 >;
			#clock-cells = < 0x01 >;
			phandle = < 0x223 >;
		};

		qcom,gdsc@16b004 {
			compatible = "qcom,gdsc";
			reg = < 0x16b004 0x04 >;
			regulator-name = "pcie_0_gdsc";
			qcom,retain-regs;
			phandle = < 0x14a >;
		};

		qcom,gdsc@18d004 {
			compatible = "qcom,gdsc";
			reg = < 0x18d004 0x04 >;
			regulator-name = "pcie_1_gdsc";
			qcom,retain-regs;
			phandle = < 0x224 >;
		};

		qcom,gdsc@106004 {
			compatible = "qcom,gdsc";
			reg = < 0x106004 0x04 >;
			regulator-name = "pcie_2_gdsc";
			qcom,retain-regs;
			phandle = < 0x225 >;
		};

		qcom,gdsc@177004 {
			compatible = "qcom,gdsc";
			reg = < 0x177004 0x04 >;
			regulator-name = "ufs_phy_gdsc";
			qcom,retain-regs;
			phandle = < 0x62 >;
		};

		qcom,gdsc@10f004 {
			compatible = "qcom,gdsc";
			reg = < 0x10f004 0x04 >;
			regulator-name = "usb30_prim_gdsc";
			qcom,retain-regs;
			phandle = < 0x153 >;
		};

		qcom,gdsc@110004 {
			compatible = "qcom,gdsc";
			reg = < 0x110004 0x04 >;
			regulator-name = "usb30_sec_gdsc";
			qcom,retain-regs;
			phandle = < 0x226 >;
		};

		qcom,gdsc@17d050 {
			compatible = "qcom,gdsc";
			reg = < 0x17d050 0x04 >;
			regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
			qcom,no-status-check-on-disable;
			qcom,gds-timeout = < 0x1f4 >;
			phandle = < 0x14e >;
		};

		qcom,gdsc@17d058 {
			compatible = "qcom,gdsc";
			reg = < 0x17d058 0x04 >;
			regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
			qcom,no-status-check-on-disable;
			qcom,gds-timeout = < 0x1f4 >;
			phandle = < 0x14f >;
		};

		qcom,gdsc@17d054 {
			compatible = "qcom,gdsc";
			reg = < 0x17d054 0x04 >;
			regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc";
			qcom,no-status-check-on-disable;
			qcom,gds-timeout = < 0x1f4 >;
			phandle = < 0x150 >;
		};

		qcom,gdsc@17d06c {
			compatible = "qcom,gdsc";
			reg = < 0x17d06c 0x04 >;
			regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc";
			qcom,no-status-check-on-disable;
			qcom,gds-timeout = < 0x1f4 >;
			phandle = < 0x151 >;
		};

		qcom,gdsc@ad07004 {
			compatible = "qcom,gdsc";
			reg = < 0xad07004 0x04 >;
			regulator-name = "bps_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x0b >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "bps_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01 >;
			qcom,support-hw-trigger;
			qcom,retain-regs;
			phandle = < 0x17d >;
		};

		qcom,gdsc@ad0a004 {
			compatible = "qcom,gdsc";
			reg = < 0xad0a004 0x04 >;
			regulator-name = "ife_0_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x0b >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "ife_0_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01 >;
			qcom,retain-regs;
			phandle = < 0x17a >;
		};

		qcom,gdsc@ad0b004 {
			compatible = "qcom,gdsc";
			reg = < 0xad0b004 0x04 >;
			regulator-name = "ife_1_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x0b >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "ife_1_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01 >;
			qcom,retain-regs;
			phandle = < 0x17b >;
		};

		qcom,gdsc@ad08004 {
			compatible = "qcom,gdsc";
			reg = < 0xad08004 0x04 >;
			regulator-name = "ipe_0_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x0b >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "ipe_0_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01 >;
			qcom,support-hw-trigger;
			qcom,retain-regs;
			phandle = < 0x17c >;
		};

		qcom,gdsc@ad09004 {
			compatible = "qcom,gdsc";
			reg = < 0xad09004 0x04 >;
			regulator-name = "sbi_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x0b >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "sbi_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01 >;
			qcom,retain-regs;
			phandle = < 0x227 >;
		};

		qcom,gdsc@ad0c144 {
			compatible = "qcom,gdsc";
			reg = < 0xad0c144 0x04 >;
			regulator-name = "titan_top_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x0b >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "titan_top_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01 >;
			qcom,retain-regs;
			qcom,gds-timeout = < 0x1f4 >;
			phandle = < 0x160 >;
		};

		qcom,gdsc@af03000 {
			compatible = "qcom,gdsc";
			reg = < 0xaf03000 0x04 >;
			regulator-name = "mdss_core_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x18 >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "mdss_core_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x01 >;
			qcom,support-hw-trigger;
			qcom,retain-regs;
			proxy-supply = < 0x5c >;
			qcom,proxy-consumer-enable;
			phandle = < 0x5c >;
		};

		syscon@3d91540 {
			compatible = "syscon";
			reg = < 0x3d91540 0x04 >;
			phandle = < 0x5d >;
		};

		qcom,gdsc@3d9106c {
			compatible = "qcom,gdsc";
			reg = < 0x3d9106c 0x04 >;
			regulator-name = "gpu_cx_gdsc";
			hw-ctrl-addr = < 0x5d >;
			parent-supply = < 0x52 >;
			vdd_parent-supply = < 0x52 >;
			qcom,no-status-check-on-disable;
			qcom,clk-dis-wait-val = < 0x08 >;
			qcom,gds-timeout = < 0x1f4 >;
			qcom,retain-regs;
			phandle = < 0x14d >;
		};

		syscon@3d91508 {
			compatible = "syscon";
			reg = < 0x3d91508 0x04 >;
			phandle = < 0x5e >;
		};

		syscon@3d91008 {
			compatible = "syscon";
			reg = < 0x3d91008 0x04 >;
			phandle = < 0x5f >;
		};

		qcom,gdsc@3d9100c {
			compatible = "qcom,gdsc";
			reg = < 0x3d9100c 0x04 >;
			regulator-name = "gpu_gx_gdsc";
			domain-addr = < 0x5e >;
			sw-reset = < 0x5f >;
			parent-supply = < 0x60 >;
			vdd_parent-supply = < 0x60 >;
			qcom,reset-aon-logic;
			qcom,retain-regs;
			phandle = < 0x1f4 >;
		};

		qcom,gdsc@9981004 {
			compatible = "qcom,gdsc";
			reg = < 0x9981004 0x04 >;
			regulator-name = "npu_core_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0x2b >;
			qcom,retain-regs;
			phandle = < 0x1f0 >;
		};

		qcom,sps {
			compatible = "qcom,msm-sps-4k";
			qcom,pipe-attr-ee;
		};

		qcom,gdsc@abf0d18 {
			compatible = "qcom,gdsc";
			reg = < 0xabf0d18 0x04 >;
			regulator-name = "mvs0_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0xcd >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "mvs0_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x254 0x00 0x00 0x01 0x254 0x00 0x01 >;
			qcom,support-hw-trigger;
			qcom,retain-regs;
			phandle = < 0x1ec >;
		};

		qcom,gdsc@abf0bf8 {
			compatible = "qcom,gdsc";
			reg = < 0xabf0bf8 0x04 >;
			regulator-name = "mvs0c_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0xcd >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "mvs0c_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x254 0x00 0x00 0x01 0x254 0x00 0x01 >;
			qcom,retain-regs;
			phandle = < 0x83 >;
		};

		qcom,gdsc@abf0d98 {
			compatible = "qcom,gdsc";
			reg = < 0xabf0d98 0x04 >;
			regulator-name = "mvs1_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0xcd >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "mvs1_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x254 0x00 0x00 0x01 0x254 0x00 0x01 >;
			qcom,support-hw-trigger;
			qcom,retain-regs;
			phandle = < 0x1ee >;
		};

		qcom,gdsc@abf0c98 {
			compatible = "qcom,gdsc";
			reg = < 0xabf0c98 0x04 >;
			regulator-name = "mvs1c_gdsc";
			clock-names = "ahb_clk";
			clocks = < 0x15 0xcd >;
			parent-supply = < 0x54 >;
			vdd_parent-supply = < 0x54 >;
			qcom,msm-bus,name = "mvs1c_gdsc_ahb";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x254 0x00 0x00 0x01 0x254 0x00 0x01 >;
			qcom,retain-regs;
			phandle = < 0x1ed >;
		};

		qcom,spmi@c440000 {
			compatible = "qcom,spmi-pmic-arb";
			reg = < 0xc440000 0x1100 0xc600000 0x2000000 0xe600000 0x100000 0xe700000 0xa0000 0xc40a000 0x26000 >;
			reg-names = "core\0chnls\0obsrvr\0intr\0cnfg";
			interrupt-names = "periph_irq";
			interrupts-extended = < 0x61 0x01 0x04 >;
			qcom,ee = < 0x00 >;
			qcom,channel = < 0x00 >;
			#address-cells = < 0x02 >;
			#size-cells = < 0x00 >;
			interrupt-controller;
			#interrupt-cells = < 0x04 >;
			cell-index = < 0x00 >;
			phandle = < 0x228 >;
		};

		ufsice@1d90000 {
			compatible = "qcom,ice";
			reg = < 0x1d90000 0x8000 >;
			qcom,enable-ice-clk;
			clock-names = "ufs_core_clk\0bus_clk\0iface_clk\0ice_core_clk";
			clocks = < 0x15 0xa7 0x15 0x95 0x15 0xa6 0x15 0xaa >;
			qcom,op-freq-hz = < 0x00 0x00 0x00 0x11e1a300 >;
			vdd-hba-supply = < 0x62 >;
			qcom,msm-bus,name = "ufs_ice_noc";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x28a 0x00 0x00 0x01 0x28a 0x3e8 0x00 >;
			qcom,bus-vector-names = "MIN\0MAX";
			qcom,instance-type = "ufs";
			phandle = < 0x63 >;
		};

		ufsphy_mem@1d87000 {
			reg = < 0x1d87000 0xe00 >;
			reg-names = "phy_mem";
			#phy-cells = < 0x00 >;
			ufs-qcom-crypto = < 0x63 >;
			lanes-per-direction = < 0x02 >;
			clock-names = "ref_clk_src\0ref_aux_clk";
			clocks = < 0x14 0x00 0x15 0xad >;
			status = "disabled";
			phandle = < 0x64 >;
		};

		ufshc@1d84000 {
			compatible = "qcom,ufshc";
			reg = < 0x1d84000 0x3000 >;
			interrupts = < 0x00 0x109 0x04 >;
			phys = < 0x64 >;
			phy-names = "ufsphy";
			ufs-qcom-crypto = < 0x63 >;
			lanes-per-direction = < 0x02 >;
			dev-ref-clk-freq = < 0x00 >;
			clock-names = "core_clk\0bus_aggr_clk\0iface_clk\0core_clk_unipro\0core_clk_ice\0ref_clk\0tx_lane0_sync_clk\0rx_lane0_sync_clk\0rx_lane1_sync_clk";
			clocks = < 0x15 0xa7 0x15 0x06 0x15 0xa6 0x15 0xb3 0x15 0xaa 0x14 0x00 0x15 0xb2 0x15 0xb0 0x15 0xb1 >;
			freq-table-hz = < 0x23c3460 0x11e1a300 0x00 0x00 0x00 0x00 0x23c3460 0x11e1a300 0x23c3460 0x11e1a300 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 >;
			qcom,msm-bus,name = "ufshc_mem";
			qcom,msm-bus,num-cases = < 0x1a >;
			qcom,msm-bus,num-paths = < 0x02 >;
			qcom,msm-bus,vectors-KBps = < 0x7b 0x200 0x00 0x00 0x01 0x2f5 0x00 0x00 0x7b 0x200 0x39a 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x734 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0xe68 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x1cd0 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x734 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0xe68 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x1cd0 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x39a0 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x1f334 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x3e667 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x200000 0x00 0x01 0x2f5 0x19000 0x00 0x7b 0x200 0x400000 0x00 0x01 0x2f5 0x32000 0x00 0x7b 0x200 0x3e667 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x7cccd 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x400000 0x00 0x01 0x2f5 0x32000 0x00 0x7b 0x200 0x800000 0x00 0x01 0x2f5 0x64000 0x00 0x7b 0x200 0x247ae 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x48ccd 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x200000 0x00 0x01 0x2f5 0x19000 0x00 0x7b 0x200 0x400000 0x00 0x01 0x2f5 0x32000 0x00 0x7b 0x200 0x48ccd 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x9199a 0x00 0x01 0x2f5 0x3e8 0x00 0x7b 0x200 0x400000 0x00 0x01 0x2f5 0x32000 0x64000 0x7b 0x200 0x800000 0x00 0x01 0x2f5 0x64000 0x64000 0x7b 0x200 0x74a000 0x00 0x01 0x2f5 0x4b000 0x00 >;
			qcom,bus-vector-names = "MIN\0PWM_G1_L1\0PWM_G2_L1\0PWM_G3_L1\0PWM_G4_L1\0PWM_G1_L2\0PWM_G2_L2\0PWM_G3_L2\0PWM_G4_L2\0HS_RA_G1_L1\0HS_RA_G2_L1\0HS_RA_G3_L1\0HS_RA_G4_L1\0HS_RA_G1_L2\0HS_RA_G2_L2\0HS_RA_G3_L2\0HS_RA_G4_L2\0HS_RB_G1_L1\0HS_RB_G2_L1\0HS_RB_G3_L1\0HS_RB_G4_L1\0HS_RB_G1_L2\0HS_RB_G2_L2\0HS_RB_G3_L2\0HS_RB_G4_L2\0MAX";
			qcom,pm-qos-cpu-groups = < 0x0f 0xf0 >;
			qcom,pm-qos-cpu-group-latency-us = < 0x2c 0x2c >;
			qcom,pm-qos-default-cpu = < 0x00 >;
			pinctrl-names = "dev-reset-assert\0dev-reset-deassert";
			pinctrl-0 = < 0x65 >;
			pinctrl-1 = < 0x66 >;
			resets = < 0x15 0x21 >;
			reset-names = "core_reset";
			status = "disabled";
			phandle = < 0x229 >;
		};

		sdhci@8804000 {
			compatible = "qcom,sdhci-msm-v5";
			reg = < 0x8804000 0x1000 >;
			reg-names = "hc_mem";
			interrupts = < 0x00 0xcc 0x04 0x00 0xde 0x04 >;
			interrupt-names = "hc_irq\0pwr_irq";
			qcom,bus-width = < 0x04 >;
			qcom,large-address-bus;
			qcom,msm-bus,name = "sdhc2";
			qcom,msm-bus,num-cases = < 0x08 >;
			qcom,msm-bus,num-paths = < 0x02 >;
			qcom,msm-bus,vectors-KBps = < 0x51 0x200 0x00 0x00 0x01 0x260 0x00 0x00 0x51 0x200 0x416 0x640 0x01 0x260 0x640 0x640 0x51 0x200 0xcc3e 0x13880 0x01 0x260 0x13880 0x13880 0x51 0x200 0xff50 0x186a0 0x01 0x260 0x186a0 0x186a0 0x51 0x200 0x1fe9e 0x30d40 0x01 0x260 0x208c8 0x208c8 0x51 0x200 0x3fd3e 0x30d40 0x01 0x260 0x249f0 0x249f0 0x51 0x200 0x3fd3e 0x61a80 0x01 0x260 0x493e0 0x493e0 0x51 0x200 0x146cc2 0x3e8000 0x01 0x260 0x146cc2 0x3e8000 >;
			qcom,bus-bw-vectors-bps = < 0x00 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x60152b0 0xbebc200 0xffffffff >;
			qcom,restore-after-cx-collapse;
			qcom,clk-rates = < 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xc02a560 >;
			qcom,bus-speed-mode = "SDR12\0SDR25\0SDR50\0DDR50\0SDR104";
			qcom,devfreq,freq-table = < 0x2faf080 0xc02a560 >;
			clocks = < 0x15 0x8a 0x15 0x8b >;
			clock-names = "iface_clk\0core_clk";
			qcom,pm-qos-irq-type = "affine_irq";
			qcom,pm-qos-irq-latency = < 0x2c 0x2c >;
			qcom,pm-qos-cpu-groups = < 0x3f 0xc0 >;
			qcom,pm-qos-legacy-latency-us = < 0x2c 0x2c 0x2c 0x2c >;
			qcom,dll-hsr-list = < 0x7642c 0xa800 0x10 0x2c010800 0x80040868 >;
			status = "disabled";
			phandle = < 0x22a >;
		};

		qcom,ipcc@408000 {
			compatible = "qcom,ipcc";
			reg = < 0x408000 0x1000 >;
			interrupts = < 0x00 0xe5 0x04 >;
			interrupt-controller;
			#interrupt-cells = < 0x03 >;
			#mbox-cells = < 0x02 >;
			phandle = < 0x74 >;
		};

		rsc@18200000 {
			label = "apps_rsc";
			compatible = "qcom,rpmh-rsc";
			reg = < 0x18200000 0x10000 0x18210000 0x10000 0x18220000 0x10000 >;
			reg-names = "drv-0\0drv-1\0drv-2";
			interrupts = < 0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04 >;
			qcom,tcs-offset = < 0xd00 >;
			qcom,drv-id = < 0x02 >;
			qcom,tcs-config = < 0x02 0x02 0x00 0x03 0x01 0x03 0x03 0x01 >;
			phandle = < 0x22b >;

			msm_bus_apps_rsc {
				compatible = "qcom,msm-bus-rsc";
				qcom,msm-bus-id = < 0x1f40 >;
			};

			system_pm {
				compatible = "qcom,system-pm";
			};

			qcom,rpmhclk {
				compatible = "qcom,kona-rpmh-clk";
				#clock-cells = < 0x01 >;
				phandle = < 0x14 >;
			};

			rpmh-regulator-mxlvl {
				compatible = "qcom,rpmh-arc-regulator";
				qcom,resource-name = "mx.lvl";
				pm8150a_s3_mmcx_sup_level-parent-supply = < 0x67 >;

				regulator-pm8150a-s3-level {
					regulator-name = "pm8150a_s3_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					phandle = < 0x55 >;
				};

				regulator-pm8150a-s3-level-ao {
					regulator-name = "pm8150a_s3_level_ao";
					qcom,set = < 0x01 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					phandle = < 0x68 >;
				};

				regulator-pm8150a-s3-mmcx-sup-level {
					regulator-name = "pm8150a_s3_mmcx_sup_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					phandle = < 0x6c >;
				};
			};

			rpmh-regulator-cxlvl {
				compatible = "qcom,rpmh-arc-regulator";
				qcom,resource-name = "cx.lvl";
				pm8150_s3_level-parent-supply = < 0x55 >;
				pm8150_s3_level_ao-parent-supply = < 0x68 >;
				proxy-supply = < 0x67 >;

				regulator-pm8150-s3-level {
					regulator-name = "pm8150_s3_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					qcom,min-dropout-voltage-level = < 0xffffffff >;
					phandle = < 0x52 >;
				};

				regulator-pm8150-s3-level-ao {
					regulator-name = "pm8150_s3_level_ao";
					qcom,set = < 0x01 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					qcom,min-dropout-voltage-level = < 0xffffffff >;
					phandle = < 0x53 >;
				};

				regulator-pm8150-s3-mmcx-sup-level {
					regulator-name = "pm8150_s3_mmcx_sup_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x30 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x30 >;
					qcom,proxy-consumer-enable;
					qcom,proxy-consumer-voltage = < 0x180 0xffff >;
					phandle = < 0x67 >;
				};
			};

			rpmh-regulator-smpa4 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "smpa4";

				regulator-pm8150-s4 {
					regulator-name = "pm8150_s4";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1d4c00 >;
					qcom,init-voltage = < 0x1b7740 >;
					phandle = < 0x90 >;
				};
			};

			rpmh-regulator-smpa5 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "smpa5";

				regulator-pm8150-s5 {
					regulator-name = "pm8150_s5";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1bd500 >;
					regulator-max-microvolt = < 0x1f20c0 >;
					qcom,init-voltage = < 0x1bd500 >;
					phandle = < 0x91 >;
				};
			};

			rpmh-regulator-smpa6 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "smpa6";

				regulator-pm8150-s6 {
					regulator-name = "pm8150_s6";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x927c0 >;
					regulator-max-microvolt = < 0x113640 >;
					qcom,init-voltage = < 0x927c0 >;
					phandle = < 0x8e >;
				};
			};

			rpmh-regulator-ldoa2 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa2";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l2 {
					regulator-name = "pm8150_l2";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2ee000 >;
					regulator-max-microvolt = < 0x2ee000 >;
					qcom,init-voltage = < 0x2ee000 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x157 >;
				};
			};

			rpmh-regulator-ldoa3 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa3";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8150-l3 {
					regulator-name = "pm8150_l3";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0xe2900 >;
					regulator-max-microvolt = < 0xe38a0 >;
					qcom,init-voltage = < 0xe2900 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x22c >;
				};
			};

			rpmh-regulator-lmxlvl {
				compatible = "qcom,rpmh-arc-regulator";
				qcom,resource-name = "lmx.lvl";

				regulator-pm8150-l4-level {
					regulator-name = "pm8150_l4_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					phandle = < 0x7c >;
				};
			};

			rpmh-regulator-ldoa5 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa5";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;
				proxy-supply = < 0x69 >;

				regulator-pm8150-l5 {
					regulator-name = "pm8150_l5";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0xd6d80 >;
					regulator-max-microvolt = < 0xd6d80 >;
					qcom,init-voltage = < 0xd6d80 >;
					qcom,init-mode = < 0x04 >;
					qcom,proxy-consumer-enable;
					qcom,proxy-consumer-current = < 0x186a0 >;
					phandle = < 0x69 >;
				};

				regulator-pm8150-l5-ao {
					regulator-name = "pm8150_l5_ao";
					qcom,set = < 0x01 >;
					regulator-min-microvolt = < 0xd6d80 >;
					regulator-max-microvolt = < 0xd6d80 >;
					qcom,init-voltage = < 0xd6d80 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x16 >;
				};

				regulator-pm8150-l5-so {
					regulator-name = "pm8150_l5_so";
					qcom,set = < 0x02 >;
					regulator-min-microvolt = < 0xd6d80 >;
					regulator-max-microvolt = < 0xd6d80 >;
					qcom,init-voltage = < 0xd6d80 >;
					qcom,init-mode = < 0x02 >;
					qcom,init-enable = < 0x00 >;
				};
			};

			rpmh-regulator-ldoa6 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa6";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8150-l6 {
					regulator-name = "pm8150_l6";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x124f80 >;
					regulator-max-microvolt = < 0x124f80 >;
					qcom,init-voltage = < 0x124f80 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x22d >;
				};
			};

			rpmh-regulator-ldoa7 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa7";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l7 {
					regulator-name = "pm8150_l7";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1a0040 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1a0040 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x22e >;
				};
			};

			rpmh-regulator-ldoa9 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa9";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;
				proxy-supply = < 0x6a >;

				regulator-pm8150-l9 {
					regulator-name = "pm8150_l9";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x124f80 >;
					regulator-max-microvolt = < 0x124f80 >;
					qcom,init-voltage = < 0x124f80 >;
					qcom,init-mode = < 0x04 >;
					qcom,proxy-consumer-enable;
					qcom,proxy-consumer-current = < 0x186a0 >;
					phandle = < 0x6a >;
				};
			};

			rpmh-regulator-ldoa10 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa10";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l10 {
					regulator-name = "pm8150_l10";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x2d2a80 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x22f >;
				};
			};

			rpmh-regulator-lcxlvl {
				compatible = "qcom,rpmh-arc-regulator";
				qcom,resource-name = "lcx.lvl";

				regulator-pm8150-l11-level {
					regulator-name = "pm8150_l11_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					phandle = < 0x7b >;
				};
			};

			rpmh-regulator-ldoa12 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa12";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l12 {
					regulator-name = "pm8150_l12";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x156 >;
				};

				regulator-pm8150-l12-ao {
					regulator-name = "pm8150_l12_ao";
					qcom,set = < 0x01 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x17 >;
				};

				regulator-pm8150-l12-so {
					regulator-name = "pm8150_l12_so";
					qcom,set = < 0x02 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					qcom,init-enable = < 0x00 >;
				};
			};

			rpmh-regulator-ldoa13 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa13";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l13 {
					regulator-name = "pm8150_l13";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2de600 >;
					regulator-max-microvolt = < 0x2de600 >;
					qcom,init-voltage = < 0x2de600 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x230 >;
				};
			};

			rpmh-regulator-ldoa14 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa14";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;
				proxy-supply = < 0x6b >;

				regulator-pm8150-l14 {
					regulator-name = "pm8150_l14";
					qcom,set = < 0x03 >;
					qcom,proxy-consumer-enable;
					qcom,proxy-consumer-current = < 0xf230 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1cafc0 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x6b >;
				};
			};

			rpmh-regulator-ldoa15 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa15";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l15 {
					regulator-name = "pm8150_l15";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x231 >;
				};
			};

			rpmh-regulator-ldoa16 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa16";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l16 {
					regulator-name = "pm8150_l16";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2e2480 >;
					regulator-max-microvolt = < 0x326a40 >;
					qcom,init-voltage = < 0x2e2480 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x232 >;
				};
			};

			rpmh-regulator-ldoa17 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa17";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150-l17 {
					regulator-name = "pm8150_l17";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x261600 >;
					regulator-max-microvolt = < 0x2de600 >;
					qcom,init-voltage = < 0x261600 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x233 >;
				};
			};

			rpmh-regulator-ldoa18 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoa18";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8150-l18 {
					regulator-name = "pm8150_l18";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0xc3500 >;
					regulator-max-microvolt = < 0xe09c0 >;
					qcom,init-voltage = < 0xc3500 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x158 >;
				};
			};

			rpmh-regulator-gfxlvl {
				compatible = "qcom,rpmh-arc-regulator";
				qcom,resource-name = "gfx.lvl";

				regulator-pm8150a-s1-level {
					regulator-name = "pm8150a_s1_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					phandle = < 0x60 >;
				};
			};

			rpmh-regulator-mmcxlvl {
				compatible = "qcom,rpmh-arc-regulator";
				qcom,resource-name = "mmcx.lvl";
				pm8150a_s4_level-parent-supply = < 0x6c >;
				pm8150a_s4_level_ao-parent-supply = < 0x68 >;
				proxy-supply = < 0x54 >;

				regulator-pm8150a-s4-level {
					regulator-name = "pm8150a_s4_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x40 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x40 >;
					qcom,min-dropout-voltage-level = < 0xffffffff >;
					qcom,proxy-consumer-enable;
					qcom,proxy-consumer-voltage = < 0x180 0xffff >;
					phandle = < 0x54 >;
				};

				regulator-pm8150a-s4-level-ao {
					regulator-name = "pm8150a_s4_level_ao";
					qcom,set = < 0x01 >;
					regulator-min-microvolt = < 0x40 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x40 >;
					qcom,min-dropout-voltage-level = < 0xffffffff >;
					phandle = < 0x234 >;
				};

				regulator-pm8150a-s4-level-so {
					regulator-name = "pm8150a_s4_level_so";
					qcom,set = < 0x02 >;
					regulator-min-microvolt = < 0x40 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x40 >;
				};
			};

			rpmh-regulator-ebilvl {
				compatible = "qcom,rpmh-arc-regulator";
				qcom,resource-name = "ebi.lvl";

				regulator-pm8150a-s6-level {
					regulator-name = "pm8150a_s6_level";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10 >;
					regulator-max-microvolt = < 0xffff >;
					qcom,init-voltage-level = < 0x10 >;
					phandle = < 0x235 >;
				};
			};

			rpmh-regulator-smpc7 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "smpc7";

				regulator-pm8150a-s7 {
					regulator-name = "pm8150a_s7";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x54f60 >;
					regulator-max-microvolt = < 0xf4240 >;
					qcom,init-voltage = < 0x54f60 >;
					phandle = < 0x236 >;
				};
			};

			rpmh-regulator-smpc8 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "smpc8";
				qcom,regulator-type = "pmic5-hfsmps";
				qcom,supported-modes = < 0x01 0x03 >;
				qcom,mode-threshold-currents = < 0x00 0x30d40 >;

				regulator-pm8150a-s8 {
					regulator-name = "pm8150a_s8";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x124f80 >;
					regulator-max-microvolt = < 0x155cc0 >;
					qcom,init-voltage = < 0x124f80 >;
					qcom,init-mode = < 0x01 >;
					phandle = < 0x92 >;
				};
			};

			rpmh-regulator-ldoc1 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc1";
				qcom,regulator-type = "pmic5-ldo";

				regulator-pm8150a-l1 {
					regulator-name = "pm8150a_l1";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1b7740 >;
					phandle = < 0x237 >;
				};
			};

			rpmh-regulator-ldoc2 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc2";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8150a-l2 {
					regulator-name = "pm8150a_l2";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x124f80 >;
					regulator-max-microvolt = < 0x13e5c0 >;
					qcom,init-voltage = < 0x124f80 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x238 >;
				};
			};

			rpmh-regulator-ldoc3 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc3";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8150a-l3 {
					regulator-name = "pm8150a_l3";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0xc3500 >;
					regulator-max-microvolt = < 0x124f80 >;
					qcom,init-voltage = < 0xc3500 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x239 >;
				};
			};

			rpmh-regulator-ldoc4 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc4";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150a-l4 {
					regulator-name = "pm8150a_l4";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x2ab980 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x23a >;
				};
			};

			rpmh-regulator-ldoc5 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc5";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150a-l5 {
					regulator-name = "pm8150a_l5";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x2ab980 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x93 >;
				};
			};

			rpmh-regulator-ldoc6 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc6";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150a-l6 {
					regulator-name = "pm8150a_l6";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x2d2a80 >;
					qcom,init-voltage = < 0x1b7740 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x23b >;
				};
			};

			rpmh-regulator-ldoc7 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc7";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150a-l7 {
					regulator-name = "pm8150a_l7";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2b9440 >;
					regulator-max-microvolt = < 0x2f5d00 >;
					qcom,init-voltage = < 0x2b9440 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x23c >;
				};
			};

			rpmh-regulator-ldoc8 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc8";
				qcom,regulator-type = "pmic5-ldo";

				regulator-pm8150a-l8 {
					regulator-name = "pm8150a_l8";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1b7740 >;
					phandle = < 0x23d >;
				};
			};

			rpmh-regulator-ldoc9 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc9";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150a-l9 {
					regulator-name = "pm8150a_l9";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x294280 >;
					regulator-max-microvolt = < 0x2d2a80 >;
					qcom,init-voltage = < 0x294280 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x23e >;
				};
			};

			rpmh-regulator-ldoc10 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc10";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8150a-l10 {
					regulator-name = "pm8150a_l10";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2dc6c0 >;
					regulator-max-microvolt = < 0x328980 >;
					qcom,init-voltage = < 0x2dc6c0 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x23f >;
				};
			};

			rpmh-regulator-ldoc11 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldoc11";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;
				proxy-supply = < 0x6d >;

				regulator-pm8150a-l11 {
					regulator-name = "pm8150a_l11";
					qcom,set = < 0x03 >;
					qcom,proxy-consumer-enable;
					qcom,proxy-consumer-current = < 0xd13a8 >;
					regulator-min-microvolt = < 0x2f5d00 >;
					regulator-max-microvolt = < 0x326a40 >;
					qcom,init-voltage = < 0x2f5d00 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x6d >;
				};
			};

			rpmh-regulator-bobc1 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "bobc1";
				qcom,regulator-type = "pmic5-bob";
				qcom,supported-modes = < 0x00 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0xf4240 0x1e8480 >;
				qcom,send-defaults;

				regulator-pm8150a-bob {
					regulator-name = "pm8150a_bob";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2de600 >;
					regulator-max-microvolt = < 0x3c6cc0 >;
					qcom,init-voltage = < 0x328980 >;
					qcom,init-mode = < 0x00 >;
					phandle = < 0x1d7 >;
				};

				regulator-pm8150a-bob-ao {
					regulator-name = "pm8150a_bob_ao";
					qcom,set = < 0x01 >;
					regulator-min-microvolt = < 0x2de600 >;
					regulator-max-microvolt = < 0x3c6cc0 >;
					qcom,init-voltage = < 0x2de600 >;
					qcom,init-mode = < 0x03 >;
					phandle = < 0x240 >;
				};
			};

			rpmh-regulator-smpf1 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "smpf1";

				regulator-pm8009-s1 {
					regulator-name = "pm8009_s1";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x124f80 >;
					regulator-max-microvolt = < 0x124f80 >;
					qcom,init-voltage = < 0x124f80 >;
					phandle = < 0x241 >;
				};
			};

			rpmh-regulator-smpf2 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "smpf2";

				regulator-pm8009-s2 {
					regulator-name = "pm8009_s2";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x7d000 >;
					regulator-max-microvolt = < 0x10c8e0 >;
					qcom,init-voltage = < 0x7d000 >;
					phandle = < 0x8f >;
				};
			};

			rpmh-regulator-ldof1 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldof1";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8009-l1 {
					regulator-name = "pm8009_l1";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x10d880 >;
					regulator-max-microvolt = < 0x10d880 >;
					qcom,init-voltage = < 0x10d880 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x242 >;
				};
			};

			rpmh-regulator-ldof2 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldof2";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8009-l2 {
					regulator-name = "pm8009_l2";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x124f80 >;
					regulator-max-microvolt = < 0x124f80 >;
					qcom,init-voltage = < 0x124f80 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x243 >;
				};
			};

			rpmh-regulator-ldof3 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldof3";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x7530 >;

				regulator-pm8009-l3 {
					regulator-name = "pm8009_l3";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x101d00 >;
					regulator-max-microvolt = < 0x101d00 >;
					qcom,init-voltage = < 0x101d00 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x244 >;
				};
			};

			rpmh-regulator-ldof5 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldof5";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8009-l5 {
					regulator-name = "pm8009_l5";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2ab980 >;
					regulator-max-microvolt = < 0x2dc6c0 >;
					qcom,init-voltage = < 0x2ab980 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x245 >;
				};
			};

			rpmh-regulator-ldof6 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldof6";
				qcom,regulator-type = "pmic5-ldo";
				qcom,supported-modes = < 0x02 0x04 >;
				qcom,mode-threshold-currents = < 0x00 0x2710 >;

				regulator-pm8009-l6 {
					regulator-name = "pm8009_l6";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x2ab980 >;
					regulator-max-microvolt = < 0x2dc6c0 >;
					qcom,init-voltage = < 0x2ab980 >;
					qcom,init-mode = < 0x02 >;
					phandle = < 0x246 >;
				};
			};

			rpmh-regulator-ldof7 {
				compatible = "qcom,rpmh-vrm-regulator";
				qcom,resource-name = "ldof7";
				qcom,regulator-type = "pmic5-ldo";

				regulator-pm8009-l7 {
					regulator-name = "pm8009_l7";
					qcom,set = < 0x03 >;
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x1b7740 >;
					qcom,init-voltage = < 0x1b7740 >;
					phandle = < 0x247 >;
				};
			};
		};

		rsc@af20000 {
			label = "disp_rsc";
			compatible = "qcom,rpmh-rsc";
			reg = < 0xaf20000 0x10000 >;
			reg-names = "drv-0";
			interrupts = < 0x00 0x81 0x04 >;
			qcom,tcs-offset = < 0x1c00 >;
			qcom,drv-id = < 0x00 >;
			qcom,tcs-config = < 0x02 0x00 0x00 0x01 0x01 0x01 0x03 0x00 >;
			phandle = < 0x248 >;

			msm_bus_disp_rsc {
				compatible = "qcom,msm-bus-rsc";
				qcom,msm-bus-id = < 0x1f41 >;
			};

			sde_rsc_rpmh {
				compatible = "qcom,sde-rsc-rpmh";
				cell-index = < 0x00 >;
			};
		};

		syscon@1f40000 {
			compatible = "syscon";
			reg = < 0x1f40000 0x20000 >;
			phandle = < 0x6e >;
		};

		hwlock {
			compatible = "qcom,tcsr-mutex";
			syscon = < 0x6e 0x00 0x1000 >;
			#hwlock-cells = < 0x01 >;
			phandle = < 0x70 >;
		};

		qcom,smem {
			compatible = "qcom,smem";
			memory-region = < 0x6f >;
			hwlocks = < 0x70 0x03 >;
			phandle = < 0x249 >;
		};

		kryo-erp {
			compatible = "arm,arm64-kryo-cpu-erp";
			interrupts = < 0x01 0x00 0x04 0x00 0x23 0x04 >;
			interrupt-names = "l1-l2-faultirq\0l3-scu-faultirq";
		};

		mailbox@188501c {
			compatible = "qcom,kona-spcs-global";
			reg = < 0x188501c 0x04 >;
			#mbox-cells = < 0x01 >;
			phandle = < 0x7a >;
		};

		syscon@1880000 {
			compatible = "syscon";
			reg = < 0x1880000 0x10000 >;
			phandle = < 0x71 >;
		};

		qcom,qsee_irq {
			compatible = "qcom,kona-qsee-irq";
			syscon = < 0x71 >;
			interrupts = < 0x00 0x15c 0x04 0x00 0x15d 0x04 >;
			interrupt-names = "sp_ipc0\0sp_ipc1";
			interrupt-controller;
			#interrupt-cells = < 0x03 >;
			phandle = < 0x72 >;
		};

		qcom,qsee_irq_bridge {
			compatible = "qcom,qsee-ipc-irq-bridge";

			qcom,qsee-ipc-irq-spss {
				qcom,dev-name = "qsee_ipc_irq_spss";
				label = "spss";
				interrupt-parent = < 0x72 >;
				interrupts = < 0x01 0x00 0x04 >;
			};
		};

		qcom,spss_utils {
			compatible = "qcom,spss-utils";
			qcom,spss-fuse1-addr = < 0x780234 >;
			qcom,spss-fuse1-bit = < 0x1b >;
			qcom,spss-fuse2-addr = < 0x780234 >;
			qcom,spss-fuse2-bit = < 0x1a >;
			qcom,spss-fuse3-addr = < 0x7801e8 >;
			qcom,spss-fuse3-bit = < 0x0a >;
			qcom,spss-fuse4-addr = < 0x780218 >;
			qcom,spss-fuse4-bit = < 0x01 >;
			qcom,spss-dev-firmware-name = "spss1d";
			qcom,spss-test-firmware-name = "spss1t";
			qcom,spss-prod-firmware-name = "spss1p";
			qcom,spss-debug-reg-addr = < 0x1886020 >;
			qcom,spss-emul-type-reg-addr = < 0x1fc8004 >;
			pil-mem = < 0x73 >;
			qcom,pil-addr = < 0x8be00000 >;
			qcom,pil-size = < 0xf0000 >;
			status = "ok";
			phandle = < 0x24a >;
		};

		qcom,spcom {
			compatible = "qcom,spcom";
			qcom,spcom-ch-names = "sp_kernel\0sp_ssr";
			qcom,spcom-rmb-err-reg-addr = < 0x188103c >;
			qcom,spcom-sp2soc-rmb-reg-addr = < 0x1881020 >;
			qcom,spcom-sp2soc-rmb-initdone-bit = < 0x18 >;
			qcom,spcom-sp2soc-rmb-pbldone-bit = < 0x19 >;
			qcom,spcom-soc2sp-rmb-reg-addr = < 0x1881030 >;
			qcom,spcom-soc2sp-rmb-sp-ssr-bit = < 0x00 >;
			status = "ok";
		};

		qcom,glink {
			compatible = "qcom,glink";
			#address-cells = < 0x01 >;
			#size-cells = < 0x01 >;
			ranges;

			npu {
				qcom,remote-pid = < 0x0a >;
				transport = "smem";
				mboxes = < 0x3c 0x07 0x00 >;
				mbox-names = "npu_smem";
				interrupt-parent = < 0x74 >;
				interrupts = < 0x07 0x00 0x01 >;
				label = "npu";
				qcom,glink-label = "npu";
				phandle = < 0x79 >;

				qcom,npu_qrtr {
					qcom,net-id = < 0x01 >;
					qcom,glink-channels = "IPCRTR";
					qcom,intents = < 0x800 0x05 0x2000 0x03 0x4400 0x02 >;
				};

				qcom,npu_glink_ssr {
					qcom,glink-channels = "glink_ssr";
					qcom,notify-edges = < 0x75 >;
				};
			};

			adsp {
				qcom,remote-pid = < 0x02 >;
				transport = "smem";
				mboxes = < 0x74 0x03 0x00 >;
				mbox-names = "adsp_smem";
				interrupt-parent = < 0x74 >;
				interrupts = < 0x03 0x00 0x01 >;
				label = "adsp";
				qcom,glink-label = "lpass";
				phandle = < 0x77 >;

				qcom,adsp_qrtr {
					qcom,net-id = < 0x02 >;
					qcom,glink-channels = "IPCRTR";
					qcom,intents = < 0x800 0x05 0x2000 0x03 0x4400 0x02 >;
				};

				qcom,apr_tal_rpmsg {
					qcom,glink-channels = "apr_audio_svc";
					qcom,intents = < 0x200 0x14 >;
				};

				qcom,msm_fastrpc_rpmsg {
					compatible = "qcom,msm-fastrpc-rpmsg";
					qcom,glink-channels = "fastrpcglink-apps-dsp";
					qcom,intents = < 0x64 0x40 >;
				};

				qcom,adsp_glink_ssr {
					qcom,glink-channels = "glink_ssr";
					qcom,notify-edges = < 0x76 0x75 >;
				};
			};

			dsps {
				qcom,remote-pid = < 0x03 >;
				transport = "smem";
				mboxes = < 0x74 0x04 0x00 >;
				mbox-names = "dsps_smem";
				interrupt-parent = < 0x74 >;
				interrupts = < 0x04 0x00 0x01 >;
				label = "slpi";
				qcom,glink-label = "dsps";
				phandle = < 0x76 >;

				qcom,slpi_qrtr {
					qcom,net-id = < 0x02 >;
					qcom,glink-channels = "IPCRTR";
					qcom,low-latency;
					qcom,intents = < 0x800 0x05 0x2000 0x03 0x4400 0x02 >;
				};

				qcom,msm_fastrpc_rpmsg {
					compatible = "qcom,msm-fastrpc-rpmsg";
					qcom,glink-channels = "fastrpcglink-apps-dsp";
					qcom,intents = < 0x64 0x40 >;
				};

				qcom,slpi_glink_ssr {
					qcom,glink-channels = "glink_ssr";
					qcom,notify-edges = < 0x77 0x75 >;
				};
			};

			cdsp {
				qcom,remote-pid = < 0x05 >;
				transport = "smem";
				mboxes = < 0x74 0x06 0x00 >;
				mbox-names = "dsps_smem";
				interrupt-parent = < 0x74 >;
				interrupts = < 0x06 0x00 0x01 >;
				label = "cdsp";
				qcom,glink-label = "cdsp";
				phandle = < 0x75 >;

				qcom,cdsp_qrtr {
					qcom,net-id = < 0x01 >;
					qcom,glink-channels = "IPCRTR";
					qcom,intents = < 0x800 0x05 0x2000 0x03 0x4400 0x02 >;
				};

				qcom,msm_fastrpc_rpmsg {
					compatible = "qcom,msm-fastrpc-rpmsg";
					qcom,glink-channels = "fastrpcglink-apps-dsp";
					qcom,intents = < 0x64 0x40 >;
				};

				qcom,msm_cdsprm_rpmsg {
					compatible = "qcom,msm-cdsprm-rpmsg";
					qcom,glink-channels = "cdsprmglink-apps-dsp";
					qcom,intents = < 0x20 0x0c >;

					qcom,cdsp-cdsp-l3-gov {
						compatible = "qcom,cdsp-l3";
						qcom,target-dev = < 0x78 >;
					};

					qcom,msm_cdsp_rm {
						compatible = "qcom,msm-cdsp-rm";
						qcom,qos-latency-us = < 0x2c >;
						qcom,qos-maxhold-ms = < 0x14 >;
						qcom,compute-cx-limit-en;
						qcom,compute-priority-mode = < 0x02 >;
						#cooling-cells = < 0x02 >;
						phandle = < 0x3b >;
					};

					qcom,msm_hvx_rm {
						compatible = "qcom,msm-hvx-rm";
						#cooling-cells = < 0x02 >;
						phandle = < 0x24b >;
					};
				};

				qcom,cdsp_glink_ssr {
					qcom,glink-channels = "glink_ssr";
					qcom,notify-edges = < 0x77 0x76 0x79 >;
				};
			};

			spss {
				qcom,remote-pid = < 0x08 >;
				transport = "spss";
				mboxes = < 0x7a 0x00 >;
				mbox-names = "spss_spss";
				interrupt-parent = < 0x72 >;
				interrupts = < 0x00 0x00 0x04 >;
				reg = < 0x1885008 0x08 0x1885010 0x04 >;
				reg-names = "qcom,spss-addr\0qcom,spss-size";
				label = "spss";
				qcom,glink-label = "spss";
				phandle = < 0x24c >;
			};
		};

		qcom,qmp-aop@c300000 {
			compatible = "qcom,qmp-mbox";
			mboxes = < 0x74 0x00 0x00 >;
			mbox-names = "aop_qmp";
			interrupt-parent = < 0x74 >;
			interrupts = < 0x00 0x00 0x01 >;
			reg = < 0xc300000 0x1000 >;
			reg-names = "msgram";
			label = "aop";
			qcom,early-boot;
			priority = < 0x00 >;
			mbox-desc-offset = < 0x00 >;
			#mbox-cells = < 0x01 >;
			phandle = < 0x51 >;
		};

		aop-msg-client {
			compatible = "qcom,debugfs-qmp-client";
			mboxes = < 0x51 0x00 >;
			mbox-names = "aop";
		};

		qcom,msm-eud@ff0000 {
			compatible = "qcom,msm-eud";
			interrupt-names = "eud_irq";
			interrupt-parent = < 0x61 >;
			interrupts = < 0x0b 0x04 >;
			reg = < 0x88e0000 0x2000 0x88e2000 0x1000 >;
			reg-names = "eud_base\0eud_mode_mgr2";
			qcom,secure-eud-en;
			qcom,eud-clock-vote-req;
			clocks = < 0x15 0x2a >;
			clock-names = "eud_ahb2phy_clk";
			status = "ok";
			phandle = < 0x24d >;
		};

		qcom,lpass@17300000 {
			compatible = "qcom,pil-tz-generic";
			reg = < 0x17300000 0x100 >;
			vdd_cx-supply = < 0x7b >;
			qcom,vdd_cx-uV-uA = < 0x180 0x00 >;
			vdd_mx-supply = < 0x7c >;
			qcom,vdd_mx-uV-uA = < 0x180 0x00 >;
			qcom,proxy-reg-names = "vdd_cx\0vdd_mx";
			clocks = < 0x14 0x00 >;
			clock-names = "xo";
			qcom,proxy-clock-names = "xo";
			qcom,pas-id = < 0x01 >;
			qcom,proxy-timeout-ms = < 0x2710 >;
			qcom,smem-id = < 0x1a7 >;
			qcom,sysmon-id = < 0x01 >;
			qcom,ssctl-instance-id = < 0x14 >;
			qcom,firmware-name = "adsp";
			memory-region = < 0x7d >;
			qcom,signal-aop;
			qcom,complete-ramdump;
			interrupts-extended = < 0x61 0x06 0x04 0x7e 0x00 0x00 0x7e 0x02 0x00 0x7e 0x01 0x00 0x7e 0x03 0x00 >;
			interrupt-names = "qcom,wdog\0qcom,err-fatal\0qcom,proxy-unvote\0qcom,err-ready\0qcom,stop-ack";
			qcom,smem-states = < 0x7f 0x00 >;
			qcom,smem-state-names = "qcom,force-stop";
			mboxes = < 0x51 0x00 >;
			mbox-names = "adsp-pil";
		};

		qcom,turing@8300000 {
			compatible = "qcom,pil-tz-generic";
			reg = < 0x8300000 0x100000 >;
			vdd_cx-supply = < 0x52 >;
			qcom,proxy-reg-names = "vdd_cx";
			qcom,vdd_cx-uV-uA = < 0x180 0x186a0 >;
			clocks = < 0x14 0x00 >;
			clock-names = "xo";
			qcom,proxy-clock-names = "xo";
			qcom,pas-id = < 0x12 >;
			qcom,proxy-timeout-ms = < 0x2710 >;
			qcom,smem-id = < 0x259 >;
			qcom,sysmon-id = < 0x07 >;
			qcom,ssctl-instance-id = < 0x17 >;
			qcom,firmware-name = "cdsp";
			memory-region = < 0x80 >;
			qcom,signal-aop;
			qcom,complete-ramdump;
			qcom,msm-bus,name = "pil-cdsp";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x9a 0x2756 0x00 0x00 0x9a 0x2756 0x00 0x01 >;
			interrupts-extended = < 0x01 0x00 0x242 0x04 0x81 0x00 0x00 0x81 0x02 0x00 0x81 0x01 0x00 0x81 0x03 0x00 >;
			interrupt-names = "qcom,wdog\0qcom,err-fatal\0qcom,proxy-unvote\0qcom,err-ready\0qcom,stop-ack";
			qcom,smem-states = < 0x82 0x00 >;
			qcom,smem-state-names = "qcom,force-stop";
			mboxes = < 0x51 0x00 >;
			mbox-names = "cdsp-pil";
		};

		qcom,venus@aab0000 {
			compatible = "qcom,pil-tz-generic";
			reg = < 0xaab0000 0x2000 >;
			vdd-supply = < 0x83 >;
			qcom,proxy-reg-names = "vdd";
			qcom,complete-ramdump;
			clocks = < 0x56 0x0f 0x56 0x05 0x56 0x00 >;
			clock-names = "xo\0core\0ahb";
			qcom,proxy-clock-names = "xo\0core\0ahb";
			qcom,core-freq = < 0xbebc200 >;
			qcom,ahb-freq = < 0xbebc200 >;
			qcom,pas-id = < 0x09 >;
			qcom,msm-bus,name = "pil-venus";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x3f 0x200 0x00 0x00 0x3f 0x200 0x00 0x4a380 >;
			qcom,proxy-timeout-ms = < 0x64 >;
			qcom,firmware-name = "venus";
			memory-region = < 0x84 >;
		};

		qcom,spss@1880000 {
			compatible = "qcom,pil-tz-generic";
			reg = < 0x188101c 0x04 0x1881024 0x04 0x1881028 0x04 0x188103c 0x04 0x1882014 0x04 >;
			reg-names = "sp2soc_irq_status\0sp2soc_irq_clr\0sp2soc_irq_mask\0rmb_err\0rmb_err_spare2";
			interrupts = < 0x00 0x160 0x01 >;
			vdd_cx-supply = < 0x52 >;
			qcom,proxy-reg-names = "vdd_cx";
			qcom,vdd_cx-uV-uA = < 0x180 0x186a0 >;
			vdd_mx-supply = < 0x55 >;
			vdd_mx-uV = < 0x180 0x186a0 >;
			clocks = < 0x14 0x00 >;
			clock-names = "xo";
			qcom,proxy-clock-names = "xo";
			qcom,pil-generic-irq-handler;
			status = "ok";
			qcom,signal-aop;
			qcom,complete-ramdump;
			qcom,pas-id = < 0x0e >;
			qcom,proxy-timeout-ms = < 0x2710 >;
			qcom,firmware-name = "spss";
			memory-region = < 0x73 >;
			qcom,spss-scsr-bits = < 0x18 0x19 >;
			qcom,extra-size = < 0x1000 >;
			mboxes = < 0x51 0x00 >;
			mbox-names = "spss-pil";
		};

		qcom,cvpss@abb0000 {
			compatible = "qcom,pil-tz-generic";
			reg = < 0xabb0000 0x2000 >;
			status = "ok";
			qcom,pas-id = < 0x1a >;
			qcom,firmware-name = "cvpss";
			memory-region = < 0x85 >;
		};

		qcom,npu@9800000 {
			compatible = "qcom,pil-tz-generic";
			reg = < 0x9800000 0x800000 >;
			status = "ok";
			qcom,pas-id = < 0x17 >;
			qcom,firmware-name = "npu";
			memory-region = < 0x86 >;
			qcom,smem-states = < 0x87 0x00 >;
			qcom,smem-state-names = "qcom,force-stop";
		};

		qcom,smp2p_sleepstate {
			compatible = "qcom,smp2p-sleepstate";
			qcom,smem-states = < 0x88 0x00 >;
			interrupt-parent = < 0x89 >;
			interrupts = < 0x00 0x00 >;
			interrupt-names = "smp2p-sleepstate-in";
		};

		qcom,msm-cdsp-loader {
			compatible = "qcom,cdsp-loader";
			qcom,proc-img-to-load = "cdsp";
		};

		qcom,msm-adsprpc-mem {
			compatible = "qcom,msm-adsprpc-mem-region";
			memory-region = < 0x8a >;
			restrict-access;
		};

		qcom,msm_fastrpc {
			compatible = "qcom,msm-fastrpc-compute";
			qcom,adsp-remoteheap-vmid = < 0x16 0x25 >;
			qcom,fastrpc-adsp-audio-pdr;
			qcom,fastrpc-adsp-sensors-pdr;
			qcom,rpc-latency-us = < 0xeb >;
			qcom,qos-cores = < 0x00 0x01 0x02 0x03 >;
			phandle = < 0x24e >;

			qcom,msm_fastrpc_compute_cb1 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1001 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb2 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1002 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb3 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1003 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb4 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1004 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb5 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1005 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb6 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1006 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb7 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1007 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb8 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				iommus = < 0x43 0x1008 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb9 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "cdsprpc-smd";
				qcom,secure-context-bank;
				iommus = < 0x43 0x1009 0x460 >;
				qcom,iommu-dma-addr-pool = < 0x60000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				qcom,iommu-vmid = < 0x0a >;
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb10 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "adsprpc-smd";
				iommus = < 0x43 0x1803 0x00 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb11 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "adsprpc-smd";
				iommus = < 0x43 0x1804 0x00 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb12 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "adsprpc-smd";
				iommus = < 0x43 0x1805 0x00 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb13 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "sdsprpc-smd";
				iommus = < 0x43 0x541 0x00 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb14 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "sdsprpc-smd";
				iommus = < 0x43 0x542 0x00 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				dma-coherent;
			};

			qcom,msm_fastrpc_compute_cb15 {
				compatible = "qcom,msm-fastrpc-compute-cb";
				label = "sdsprpc-smd";
				iommus = < 0x43 0x543 0x00 >;
				qcom,iommu-dma-addr-pool = < 0x80000000 0x78000000 >;
				qcom,iommu-faults = "stall-disable\0HUPCF";
				shared-cb = < 0x04 >;
				dma-coherent;
			};
		};

		qcedev@1de0000 {
			compatible = "qcom,qcedev";
			reg = < 0x1de0000 0x20000 0x1dc4000 0x24000 >;
			reg-names = "crypto-base\0crypto-bam-base";
			interrupts = < 0x00 0x110 0x04 >;
			qcom,bam-pipe-pair = < 0x03 >;
			qcom,ce-hw-instance = < 0x00 >;
			qcom,ce-device = < 0x00 >;
			qcom,ce-hw-shared;
			qcom,bam-ee = < 0x00 >;
			qcom,msm-bus,name = "qcedev-noc";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x7d 0x200 0x00 0x00 0x7d 0x200 0x60180 0x60180 >;
			qcom,smmu-s1-enable;
			qcom,no-clock-support;
			iommus = < 0x43 0x586 0x11 0x43 0x596 0x11 >;
			qcom,iommu-dma = "atomic";
			phandle = < 0x24f >;

			qcom_cedev_ns_cb {
				compatible = "qcom,qcedev,context-bank";
				label = "ns_context";
				iommus = < 0x43 0x592 0x00 0x43 0x598 0x00 0x43 0x599 0x00 0x43 0x59f 0x00 >;
			};

			qcom_cedev_s_cb {
				compatible = "qcom,qcedev,context-bank";
				label = "secure_context";
				iommus = < 0x43 0x593 0x00 0x43 0x59c 0x00 0x43 0x59d 0x00 0x43 0x59e 0x00 >;
				qcom,iommu-vmid = < 0x09 >;
				qcom,secure-context-bank;
			};
		};

		qcrypto@1de0000 {
			compatible = "qcom,qcrypto";
			reg = < 0x1de0000 0x20000 0x1dc4000 0x24000 >;
			reg-names = "crypto-base\0crypto-bam-base";
			interrupts = < 0x00 0x110 0x04 >;
			qcom,bam-pipe-pair = < 0x02 >;
			qcom,ce-hw-instance = < 0x00 >;
			qcom,ce-device = < 0x00 >;
			qcom,bam-ee = < 0x00 >;
			qcom,ce-hw-shared;
			qcom,clk-mgmt-sus-res;
			qcom,msm-bus,name = "qcrypto-noc";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x7d 0x200 0x00 0x00 0x7d 0x200 0x60180 0x60180 >;
			qcom,use-sw-aes-cbc-ecb-ctr-algo;
			qcom,use-sw-aes-xts-algo;
			qcom,use-sw-aes-ccm-algo;
			qcom,use-sw-ahash-algo;
			qcom,use-sw-aead-algo;
			qcom,use-sw-hmac-algo;
			qcom,smmu-s1-enable;
			qcom,no-clock-support;
			iommus = < 0x43 0x584 0x11 0x43 0x594 0x11 >;
			qcom,iommu-dma = "atomic";
			phandle = < 0x250 >;
		};

		qcom,msm_hdcp {
			compatible = "qcom,msm-hdcp";
			phandle = < 0x251 >;
		};

		tz-log@146bf720 {
			compatible = "qcom,tz-log";
			reg = < 0x146bf720 0x3000 >;
			qcom,hyplog-enabled;
			hyplog-address-offset = < 0x410 >;
			hyplog-size-offset = < 0x414 >;
			phandle = < 0x252 >;
		};

		smcinvoke@87900000 {
			compatible = "qcom,smcinvoke";
			reg = < 0x87900000 0x2200000 >;
			reg-names = "secapp-region";
			phandle = < 0x253 >;
		};

		tsens@c222000 {
			compatible = "qcom,tsens24xx";
			reg = < 0xc222000 0x04 0xc263000 0x1ff >;
			reg-names = "tsens_srot_physical\0tsens_tm_physical";
			interrupts = < 0x00 0x1fa 0x04 0x00 0x1fc 0x04 >;
			interrupt-names = "tsens-upper-lower\0tsens-critical";
			tsens-reinit-wa;
			#thermal-sensor-cells = < 0x01 >;
			phandle = < 0x18 >;
		};

		tsens@c223000 {
			compatible = "qcom,tsens24xx";
			reg = < 0xc223000 0x04 0xc265000 0x1ff >;
			reg-names = "tsens_srot_physical\0tsens_tm_physical";
			interrupts = < 0x00 0x1fb 0x04 0x00 0x1fd 0x04 >;
			interrupt-names = "tsens-upper-lower\0tsens-critical";
			tsens-reinit-wa;
			#thermal-sensor-cells = < 0x01 >;
			phandle = < 0x19 >;
		};

		qcom,msm-rtb {
			compatible = "qcom,msm-rtb";
			qcom,rtb-size = < 0x100000 >;
		};

		qcom,mpm2-sleep-counter@c221000 {
			compatible = "qcom,mpm2-sleep-counter";
			reg = < 0xc221000 0x1000 >;
			clock-frequency = < 0x8000 >;
		};

		qcom,gpi-dma@900000 {
			#dma-cells = < 0x05 >;
			compatible = "qcom,gpi-dma";
			reg = < 0x900000 0x70000 >;
			reg-names = "gpi-top";
			interrupts = < 0x00 0xf4 0x04 0x00 0xf5 0x04 0x00 0xf6 0x04 0x00 0xf7 0x04 0x00 0xf8 0x04 0x00 0xf9 0x04 0x00 0xfa 0x04 0x00 0xfb 0x04 0x00 0xfc 0x04 0x00 0xfd 0x04 0x00 0xfe 0x04 0x00 0xff 0x04 0x00 0x100 0x04 >;
			qcom,max-num-gpii = < 0x0f >;
			qcom,gpii-mask = < 0x7ff >;
			qcom,ev-factor = < 0x02 >;
			qcom,gpi-ee-offset = < 0x1000 >;
			iommus = < 0x43 0x5b6 0x00 >;
			qcom,smmu-cfg = < 0x01 >;
			qcom,iommu-dma-addr-pool = < 0x100000 0x100000 >;
			status = "ok";
			phandle = < 0x18d >;
		};

		qcom,gpi-dma@a00000 {
			#dma-cells = < 0x05 >;
			compatible = "qcom,gpi-dma";
			reg = < 0xa00000 0x70000 >;
			reg-names = "gpi-top";
			interrupts = < 0x00 0x117 0x04 0x00 0x118 0x04 0x00 0x119 0x04 0x00 0x11a 0x04 0x00 0x11b 0x04 0x00 0x11c 0x04 0x00 0x125 0x04 0x00 0x126 0x04 0x00 0x127 0x04 0x00 0x128 0x04 >;
			qcom,max-num-gpii = < 0x0a >;
			qcom,gpii-mask = < 0x3f >;
			qcom,ev-factor = < 0x02 >;
			qcom,gpi-ee-offset = < 0x6000 >;
			iommus = < 0x43 0x56 0x00 >;
			qcom,smmu-cfg = < 0x01 >;
			qcom,iommu-dma-addr-pool = < 0x100000 0x100000 >;
			status = "ok";
			phandle = < 0x1b4 >;
		};

		qcom,gpi-dma@800000 {
			#dma-cells = < 0x05 >;
			compatible = "qcom,gpi-dma";
			reg = < 0x800000 0x70000 >;
			reg-names = "gpi-top";
			interrupts = < 0x00 0x24c 0x04 0x00 0x24d 0x04 0x00 0x24e 0x04 0x00 0x24f 0x04 0x00 0x250 0x04 0x00 0x251 0x04 0x00 0x252 0x04 0x00 0x253 0x04 0x00 0x254 0x04 0x00 0x255 0x04 >;
			qcom,max-num-gpii = < 0x0a >;
			qcom,gpii-mask = < 0x3f >;
			qcom,ev-factor = < 0x02 >;
			qcom,gpi-ee-offset = < 0x6000 >;
			iommus = < 0x43 0x76 0x00 >;
			qcom,smmu-cfg = < 0x01 >;
			qcom,iommu-dma-addr-pool = < 0x100000 0x100000 >;
			status = "ok";
			phandle = < 0x1d2 >;
		};

		qcom,cnss-qca6390@b0000000 {
			compatible = "qcom,cnss-qca6390";
			reg = < 0xb0000000 0x10000 0xb2e5510 0x5c0 >;
			reg-names = "smmu_iova_ipa\0tcs_cmd";
			wlan-en-gpio = < 0x8b 0x14 0x00 >;
			qcom,bt-en-gpio = < 0x8b 0x15 0x00 >;
			pinctrl-names = "wlan_en_active\0wlan_en_sleep";
			pinctrl-0 = < 0x8c >;
			pinctrl-1 = < 0x8d >;
			qcom,wlan-rc-num = < 0x00 >;
			qcom,wlan-ramdump-dynamic = < 0x420000 >;
			qcom,smmu-s1-enable;
			qcom,converged-dt;
			cnss-daemon-support;
			qcom,cmd_db_name = "smpf2";
			qcom,set-wlaon-pwr-ctrl;
			qcom,msm-bus,name = "msm-cnss";
			qcom,msm-bus,num-cases = < 0x06 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x2d 0x200 0x00 0x00 0x2d 0x200 0x8ca 0x186a00 0x2d 0x200 0x1d4c 0x186a00 0x2d 0x200 0x7530 0x1b8a00 0x2d 0x200 0x186a0 0x1b8a00 0x2d 0x200 0x2ab98 0x5eec00 >;
			vdd-wlan-aon-supply = < 0x8e >;
			qcom,vdd-wlan-aon-config = < 0xe7ef0 0xe7ef0 0x00 0x00 0x01 >;
			vdd-wlan-dig-supply = < 0x8f >;
			qcom,vdd-wlan-dig-config = < 0xe7ef0 0xe86c0 0x00 0x00 0x01 >;
			vdd-wlan-io-supply = < 0x90 >;
			qcom,vdd-wlan-io-config = < 0x1b7740 0x1b7740 0x00 0x00 0x01 >;
			vdd-wlan-rfa1-supply = < 0x91 >;
			qcom,vdd-wlan-rfa1-config = < 0x1cfde0 0x1cfde0 0x00 0x00 0x01 >;
			vdd-wlan-rfa2-supply = < 0x92 >;
			qcom,vdd-wlan-rfa2-config = < 0x149970 0x149970 0x00 0x00 0x01 >;
			wlan-ant-switch-supply = < 0x93 >;
			qcom,wlan-ant-switch-config = < 0x1b7740 0x1b7740 0x00 0x00 0x00 >;
			mhi,max-channels = < 0x1e >;
			mhi,timeout = < 0x2710 >;
			mhi,buffer-len = < 0x8000 >;
			mhi,m2-no-db-access;
			phandle = < 0x254 >;

			mhi_channels {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				mhi_chan@0 {
					reg = < 0x00 >;
					label = "LOOPBACK";
					mhi,num-elements = < 0x20 >;
					mhi,event-ring = < 0x01 >;
					mhi,chan-dir = < 0x01 >;
					mhi,data-type = < 0x00 >;
					mhi,doorbell-mode = < 0x02 >;
					mhi,ee = < 0x14 >;
				};

				mhi_chan@1 {
					reg = < 0x01 >;
					label = "LOOPBACK";
					mhi,num-elements = < 0x20 >;
					mhi,event-ring = < 0x01 >;
					mhi,chan-dir = < 0x02 >;
					mhi,data-type = < 0x00 >;
					mhi,doorbell-mode = < 0x02 >;
					mhi,ee = < 0x14 >;
				};

				mhi_chan@4 {
					reg = < 0x04 >;
					label = "DIAG";
					mhi,num-elements = < 0x20 >;
					mhi,event-ring = < 0x01 >;
					mhi,chan-dir = < 0x01 >;
					mhi,data-type = < 0x00 >;
					mhi,doorbell-mode = < 0x02 >;
					mhi,ee = < 0x14 >;
				};

				mhi_chan@5 {
					reg = < 0x05 >;
					label = "DIAG";
					mhi,num-elements = < 0x20 >;
					mhi,event-ring = < 0x01 >;
					mhi,chan-dir = < 0x02 >;
					mhi,data-type = < 0x00 >;
					mhi,doorbell-mode = < 0x02 >;
					mhi,ee = < 0x14 >;
				};

				mhi_chan@20 {
					reg = < 0x14 >;
					label = "IPCR";
					mhi,num-elements = < 0x20 >;
					mhi,event-ring = < 0x01 >;
					mhi,chan-dir = < 0x01 >;
					mhi,data-type = < 0x01 >;
					mhi,doorbell-mode = < 0x02 >;
					mhi,ee = < 0x14 >;
					mhi,auto-start;
				};

				mhi_chan@21 {
					reg = < 0x15 >;
					label = "IPCR";
					mhi,num-elements = < 0x20 >;
					mhi,event-ring = < 0x01 >;
					mhi,chan-dir = < 0x02 >;
					mhi,data-type = < 0x00 >;
					mhi,doorbell-mode = < 0x02 >;
					mhi,ee = < 0x14 >;
					mhi,auto-queue;
					mhi,auto-start;
				};
			};

			mhi_events {

				mhi_event@0 {
					mhi,num-elements = < 0x20 >;
					mhi,intmod = < 0x00 >;
					mhi,msi = < 0x01 >;
					mhi,priority = < 0x01 >;
					mhi,brstmode = < 0x02 >;
					mhi,data-type = < 0x01 >;
				};

				mhi_event@1 {
					mhi,num-elements = < 0x100 >;
					mhi,intmod = < 0x00 >;
					mhi,msi = < 0x02 >;
					mhi,priority = < 0x01 >;
					mhi,brstmode = < 0x02 >;
				};

				mhi_event@2 {
					mhi,num-elements = < 0x20 >;
					mhi,intmod = < 0x01 >;
					mhi,msi = < 0x00 >;
					mhi,priority = < 0x02 >;
					mhi,brstmode = < 0x02 >;
					mhi,data-type = < 0x03 >;
				};
			};

			mhi_devices {

				mhi_qrtr {
					mhi,chan = "IPCR";
					qcom,net-id = < 0x00 >;
					qcom,low-latency;
					mhi,early-notify;
				};
			};
		};

		demux {
			compatible = "qcom,demux";
		};

		qfprom@780000 {
			compatible = "qcom,qfprom";
			reg = < 0x784000 0x3000 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x01 >;
			read-only;
			ranges;
			phandle = < 0x255 >;

			gpu_lm_efuse@5c8 {
				reg = < 0x5c8 0x04 >;
				phandle = < 0x1f5 >;
			};

			gpu_speed_bin@19b {
				reg = < 0x19b 0x01 >;
				bits = < 0x05 0x03 >;
				phandle = < 0x1f6 >;
			};
		};

		refgen-regulator@88e7000 {
			compatible = "qcom,refgen-kona-regulator";
			reg = < 0x88e7000 0x84 >;
			regulator-name = "refgen";
			regulator-enable-ramp-delay = < 0x05 >;
			proxy-supply = < 0x94 >;
			qcom,proxy-consumer-enable;
			phandle = < 0x94 >;
		};

		ad-hoc-bus {
			compatible = "qcom,msm-bus-device";
			reg = < 0x16e0000 0x1f180 0x1700000 0x3d180 0x1500000 0x28000 0x90c0000 0x4200 0x9100000 0xae200 0x9100000 0xae200 0x1740000 0x1f080 0x1620000 0x1c200 0x1620000 0x40000 0x1700000 0x3d180 0x9990000 0x1600 >;
			reg-names = "aggre1_noc-base\0aggre2_noc-base\0config_noc-base\0dc_noc-base\0mc_virt-base\0gem_noc-base\0mmss_noc-base\0system_noc-base\0ipa_virt-base\0compute_noc-base\0npu_noc-base";
			phandle = < 0x256 >;

			rsc-apps {
				cell-id = < 0x1f40 >;
				label = "apps_rsc";
				qcom,rsc-dev;
				qcom,req_state = < 0x02 >;
				phandle = < 0x95 >;
			};

			rsc-disp {
				cell-id = < 0x1f41 >;
				label = "disp_rsc";
				qcom,rsc-dev;
				qcom,req_state = < 0x02 >;
				phandle = < 0x96 >;
			};

			bcm-acv {
				cell-id = < 0x1b7e >;
				label = "ACV";
				qcom,bcm-name = "ACV";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x128 >;
			};

			bcm-alc {
				cell-id = < 0x1b7f >;
				label = "ALC";
				qcom,bcm-name = "ALC";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x10b >;
			};

			bcm-mc0 {
				cell-id = < 0x1b58 >;
				label = "MC0";
				qcom,bcm-name = "MC0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x127 >;
			};

			bcm-sh0 {
				cell-id = < 0x1b5b >;
				label = "SH0";
				qcom,bcm-name = "SH0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x124 >;
			};

			bcm-mm0 {
				cell-id = < 0x1b63 >;
				label = "MM0";
				qcom,bcm-name = "MM0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x12a >;
			};

			bcm-ce0 {
				cell-id = < 0x1b7a >;
				label = "CE0";
				qcom,bcm-name = "CE0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xa0 >;
			};

			bcm-ip0 {
				cell-id = < 0x1b7b >;
				label = "IP0";
				qcom,bcm-name = "IP0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x126 >;
			};

			bcm-mm1 {
				cell-id = < 0x1b64 >;
				label = "MM1";
				qcom,bcm-name = "MM1";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xed >;
			};

			bcm-sh2 {
				cell-id = < 0x1b5d >;
				label = "SH2";
				qcom,bcm-name = "SH2";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xdf >;
			};

			bcm-mm2 {
				cell-id = < 0x1b65 >;
				label = "MM2";
				qcom,bcm-name = "MM2";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x12c >;
			};

			bcm-qup0 {
				cell-id = < 0x1b80 >;
				label = "QUP0";
				qcom,bcm-name = "QUP0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x9b >;
			};

			bcm-sh3 {
				cell-id = < 0x1b5e >;
				label = "SH3";
				qcom,bcm-name = "SH3";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xe5 >;
			};

			bcm-mm3 {
				cell-id = < 0x1b66 >;
				label = "MM3";
				qcom,bcm-name = "MM3";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xef >;
			};

			bcm-sh4 {
				cell-id = < 0x1b5f >;
				label = "SH4";
				qcom,bcm-name = "SH4";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xe1 >;
			};

			bcm-sn0 {
				cell-id = < 0x1b6a >;
				label = "SN0";
				qcom,bcm-name = "SN0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x131 >;
			};

			bcm-co0 {
				cell-id = < 0x1b81 >;
				label = "CO0";
				qcom,bcm-name = "CO0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x119 >;
			};

			bcm-cn0 {
				cell-id = < 0x1b7c >;
				label = "CN0";
				qcom,bcm-name = "CN0";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xd7 >;
			};

			bcm-sn1 {
				cell-id = < 0x1b6b >;
				label = "SN1";
				qcom,bcm-name = "SN1";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x132 >;
			};

			bcm-sn2 {
				cell-id = < 0x1b6c >;
				label = "SN2";
				qcom,bcm-name = "SN2";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x12f >;
			};

			bcm-co2 {
				cell-id = < 0x1b83 >;
				label = "CO2";
				qcom,bcm-name = "CO2";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xa4 >;
			};

			bcm-sn3 {
				cell-id = < 0x1b6d >;
				label = "SN3";
				qcom,bcm-name = "SN3";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x133 >;
			};

			bcm-sn4 {
				cell-id = < 0x1b6e >;
				label = "SN4";
				qcom,bcm-name = "SN4";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x136 >;
			};

			bcm-sn5 {
				cell-id = < 0x1b6f >;
				label = "SN5";
				qcom,bcm-name = "SN5";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x135 >;
			};

			bcm-sn6 {
				cell-id = < 0x1b70 >;
				label = "SN6";
				qcom,bcm-name = "SN6";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x134 >;
			};

			bcm-sn7 {
				cell-id = < 0x1b71 >;
				label = "SN7";
				qcom,bcm-name = "SN7";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xfe >;
			};

			bcm-sn8 {
				cell-id = < 0x1b72 >;
				label = "SN8";
				qcom,bcm-name = "SN8";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0xff >;
			};

			bcm-sn9 {
				cell-id = < 0x1b73 >;
				label = "SN9";
				qcom,bcm-name = "SN9";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x109 >;
			};

			bcm-sn11 {
				cell-id = < 0x1b75 >;
				label = "SN11";
				qcom,bcm-name = "SN11";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x105 >;
			};

			bcm-sn12 {
				cell-id = < 0x1b76 >;
				label = "SN12";
				qcom,bcm-name = "SN12";
				qcom,rscs = < 0x95 >;
				qcom,bcm-dev;
				phandle = < 0x116 >;
			};

			bcm-acv_display {
				cell-id = < 0x697e >;
				label = "ACV_DISPLAY";
				qcom,bcm-name = "ACV";
				qcom,rscs = < 0x96 >;
				qcom,bcm-dev;
				phandle = < 0x13a >;
			};

			bcm-alc_display {
				cell-id = < 0x697f >;
				label = "ALC_DISPLAY";
				qcom,bcm-name = "ALC";
				qcom,rscs = < 0x96 >;
				qcom,bcm-dev;
				phandle = < 0x257 >;
			};

			bcm-mc0_display {
				cell-id = < 0x6978 >;
				label = "MC0_DISPLAY";
				qcom,bcm-name = "MC0";
				qcom,rscs = < 0x96 >;
				qcom,bcm-dev;
				phandle = < 0x139 >;
			};

			bcm-sh0_display {
				cell-id = < 0x6979 >;
				label = "SH0_DISPLAY";
				qcom,bcm-name = "SH0";
				qcom,rscs = < 0x96 >;
				qcom,bcm-dev;
				phandle = < 0x138 >;
			};

			bcm-mm0_display {
				cell-id = < 0x697a >;
				label = "MM0_DISPLAY";
				qcom,bcm-name = "MM0";
				qcom,rscs = < 0x96 >;
				qcom,bcm-dev;
				phandle = < 0x13c >;
			};

			bcm-mm1_display {
				cell-id = < 0x697b >;
				label = "MM1_DISPLAY";
				qcom,bcm-name = "MM1";
				qcom,rscs = < 0x96 >;
				qcom,bcm-dev;
				phandle = < 0x112 >;
			};

			bcm-mm2_display {
				cell-id = < 0x697c >;
				label = "MM2_DISPLAY";
				qcom,bcm-name = "MM2";
				qcom,rscs = < 0x96 >;
				qcom,bcm-dev;
				phandle = < 0x13e >;
			};

			fab-aggre1_noc {
				cell-id = < 0x1802 >;
				label = "fab-aggre1_noc";
				qcom,fab-dev;
				qcom,base-name = "aggre1_noc-base";
				qcom,qos-off = < 0x1000 >;
				qcom,base-offset = < 0x2000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0x98 >;
			};

			fab-aggre2_noc {
				cell-id = < 0x1803 >;
				label = "fab-aggre2_noc";
				qcom,fab-dev;
				qcom,base-name = "aggre2_noc-base";
				qcom,qos-off = < 0x1000 >;
				qcom,base-offset = < 0x3000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0x9e >;
			};

			fab-compute_noc {
				cell-id = < 0x180b >;
				label = "fab-compute_noc";
				qcom,fab-dev;
				qcom,base-name = "compute_noc-base";
				qcom,qos-off = < 0x800 >;
				qcom,base-offset = < 0x33000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0xa3 >;
			};

			fab-config_noc {
				cell-id = < 0x1400 >;
				label = "fab-config_noc";
				qcom,fab-dev;
				qcom,base-name = "config_noc-base";
				qcom,qos-off = < 0x00 >;
				qcom,base-offset = < 0x00 >;
				qcom,sbm-offset = < 0x6000 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0xd6 >;
			};

			fab-dc_noc {
				cell-id = < 0x1806 >;
				label = "fab-dc_noc";
				qcom,fab-dev;
				qcom,base-name = "dc_noc-base";
				qcom,qos-off = < 0x00 >;
				qcom,base-offset = < 0x00 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0xdc >;
			};

			fab-gem_noc {
				cell-id = < 0x180c >;
				label = "fab-gem_noc";
				qcom,fab-dev;
				qcom,base-name = "gem_noc-base";
				qcom,qos-off = < 0x1000 >;
				qcom,base-offset = < 0x21000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0xde >;
			};

			fab-ipa_virt {
				cell-id = < 0x1809 >;
				label = "fab-ipa_virt";
				qcom,fab-dev;
				qcom,base-name = "ipa_virt-base";
				qcom,qos-off = < 0x00 >;
				qcom,base-offset = < 0x00 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bypass-qos-prg;
				clocks;
				phandle = < 0xe7 >;
			};

			fab-mc_virt {
				cell-id = < 0x1807 >;
				label = "fab-mc_virt";
				qcom,fab-dev;
				qcom,base-name = "mc_virt-base";
				qcom,qos-off = < 0x00 >;
				qcom,base-offset = < 0x00 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bypass-qos-prg;
				clocks;
				phandle = < 0xe9 >;
			};

			fab-mmss_noc {
				cell-id = < 0x800 >;
				label = "fab-mmss_noc";
				qcom,fab-dev;
				qcom,base-name = "mmss_noc-base";
				qcom,qos-off = < 0x800 >;
				qcom,base-offset = < 0xa000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0xeb >;
			};

			fab-npu_noc {
				cell-id = < 0x180d >;
				label = "fab-npu_noc";
				qcom,fab-dev;
				qcom,base-name = "npu_noc-base";
				qcom,qos-off = < 0x00 >;
				qcom,base-offset = < 0x00 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0xf1 >;
			};

			fab-system_noc {
				cell-id = < 0x400 >;
				label = "fab-system_noc";
				qcom,fab-dev;
				qcom,base-name = "system_noc-base";
				qcom,qos-off = < 0x1000 >;
				qcom,base-offset = < 0x12000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0xfc >;
			};

			fab-gem_noc_display {
				cell-id = < 0x6593 >;
				label = "fab-gem_noc_display";
				qcom,fab-dev;
				qcom,base-name = "gem_noc-base";
				qcom,qos-off = < 0x1000 >;
				qcom,base-offset = < 0x21000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bypass-qos-prg;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0x10d >;
			};

			fab-mc_virt_display {
				cell-id = < 0x6590 >;
				label = "fab-mc_virt_display";
				qcom,fab-dev;
				qcom,base-name = "mc_virt-base";
				qcom,qos-off = < 0x00 >;
				qcom,base-offset = < 0x00 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bypass-qos-prg;
				clocks;
				phandle = < 0x10f >;
			};

			fab-mmss_noc_display {
				cell-id = < 0x6592 >;
				label = "fab-mmss_noc_display";
				qcom,fab-dev;
				qcom,base-name = "mmss_noc-base";
				qcom,qos-off = < 0x800 >;
				qcom,base-offset = < 0xa000 >;
				qcom,sbm-offset = < 0x00 >;
				qcom,bypass-qos-prg;
				qcom,bus-type = < 0x01 >;
				clocks;
				phandle = < 0x111 >;
			};

			mas-qhm-a1noc-cfg {
				cell-id = < 0x79 >;
				label = "mas-qhm-a1noc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0x97 >;
				qcom,bus-dev = < 0x98 >;
				phandle = < 0x11a >;
			};

			mas-qhm-qspi {
				cell-id = < 0xa5 >;
				label = "mas-qhm-qspi";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x07 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x258 >;
			};

			mas-qhm-qup1 {
				cell-id = < 0x98 >;
				label = "mas-qhm-qup1";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x05 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,bcms = < 0x9b >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x259 >;
			};

			mas-qhm-qup2 {
				cell-id = < 0x99 >;
				label = "mas-qhm-qup2";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x06 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,bcms = < 0x9b >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x25a >;
			};

			mas-qhm-tsif {
				cell-id = < 0x52 >;
				label = "mas-qhm-tsif";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x08 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x25b >;
			};

			mas-xm-pcie3-modem {
				cell-id = < 0x6c >;
				label = "mas-xm-pcie3-modem";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x04 >;
				qcom,connections = < 0x9c >;
				qcom,bus-dev = < 0x98 >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x25c >;
			};

			mas-xm-sdc4 {
				cell-id = < 0x50 >;
				label = "mas-xm-sdc4";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x02 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x25d >;
			};

			mas-xm-ufs-mem {
				cell-id = < 0x7b >;
				label = "mas-xm-ufs-mem";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x03 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x25e >;

				qcom,node-qos-clks {
					clocks = < 0x15 0x06 >;
					clock-names = "clk-aggre-ufs-phy-axi-no-rate";
				};
			};

			mas-xm-usb3-0 {
				cell-id = < 0x3d >;
				label = "mas-xm-usb3-0";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x00 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x25f >;

				qcom,node-qos-clks {
					clocks = < 0x15 0x08 >;
					clock-names = "clk-usb3-prim-axi-no-rate";
				};
			};

			mas-xm-usb3-1 {
				cell-id = < 0x65 >;
				label = "mas-xm-usb3-1";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x01 >;
				qcom,connections = < 0x99 >;
				qcom,bus-dev = < 0x98 >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x260 >;

				qcom,node-qos-clks {
					clocks = < 0x15 0x09 >;
					clock-names = "clk-usb3-sec-axi-no-rate";
				};
			};

			mas-qhm-a2noc-cfg {
				cell-id = < 0x7c >;
				label = "mas-qhm-a2noc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0x9d >;
				qcom,bus-dev = < 0x9e >;
				phandle = < 0x11b >;
			};

			mas-qhm-qdss-bam {
				cell-id = < 0x35 >;
				label = "mas-qhm-qdss-bam";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x0b >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x261 >;
			};

			mas-qhm-qup0 {
				cell-id = < 0x97 >;
				label = "mas-qhm-qup0";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x0c >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,bcms = < 0x9b >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x262 >;
			};

			mas-qnm-cnoc {
				cell-id = < 0x76 >;
				label = "mas-qnm-cnoc";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x00 >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				qcom,forwarding;
				phandle = < 0x120 >;
			};

			mas-qxm-crypto {
				cell-id = < 0x7d >;
				label = "mas-qxm-crypto";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x01 >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,bcms = < 0xa0 >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				qcom,forwarding;
				phandle = < 0x263 >;
			};

			mas-qxm-ipa {
				cell-id = < 0x5a >;
				label = "mas-qxm-ipa";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x02 >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				qcom,forwarding;
				qcom,defer-init-qos;
				qcom,node-qos-bcms = < 0x1b7b 0x00 0x01 >;
				phandle = < 0x264 >;
			};

			mas-xm-pcie3-0 {
				cell-id = < 0x2d >;
				label = "mas-xm-pcie3-0";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x08 >;
				qcom,connections = < 0xa1 >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x265 >;
			};

			mas-xm-pcie3-1 {
				cell-id = < 0x64 >;
				label = "mas-xm-pcie3-1";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x09 >;
				qcom,connections = < 0xa1 >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x266 >;
			};

			mas-xm-qdss-etr {
				cell-id = < 0x3c >;
				label = "mas-xm-qdss-etr";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x07 >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x267 >;
			};

			mas-xm-sdc2 {
				cell-id = < 0x51 >;
				label = "mas-xm-sdc2";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x03 >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x268 >;
			};

			mas-xm-ufs-card {
				cell-id = < 0x7a >;
				label = "mas-xm-ufs-card";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x04 >;
				qcom,connections = < 0x9f >;
				qcom,bus-dev = < 0x9e >;
				qcom,blacklist = < 0x9a >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				phandle = < 0x269 >;
			};

			mas-qnm-npu {
				cell-id = < 0x9a >;
				label = "mas-qnm-npu";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x06 0x07 >;
				qcom,connections = < 0xa2 >;
				qcom,bus-dev = < 0xa3 >;
				qcom,bcms = < 0xa4 >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				phandle = < 0x26a >;
			};

			mas-qnm-snoc {
				cell-id = < 0x2733 >;
				label = "mas-qnm-snoc";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0x12d >;
			};

			mas-xm-qdss-dap {
				cell-id = < 0x4c >;
				label = "mas-xm-qdss-dap";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xd8 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				qcom,blacklist = < 0xd9 >;
				phandle = < 0x26b >;
			};

			mas-qhm-cnoc-dc-noc {
				cell-id = < 0x7e >;
				label = "mas-qhm-cnoc-dc-noc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xda 0xdb >;
				qcom,bus-dev = < 0xdc >;
				phandle = < 0x11c >;
			};

			mas-alm-gpu-tcu {
				cell-id = < 0x9b >;
				label = "mas-alm-gpu-tcu";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x7f >;
				qcom,connections = < 0xdd 0xd9 >;
				qcom,bus-dev = < 0xde >;
				qcom,bcms = < 0xdf >;
				qcom,ap-owned;
				qcom,prio = < 0x01 >;
				phandle = < 0x26c >;
			};

			mas-alm-sys-tcu {
				cell-id = < 0x9c >;
				label = "mas-alm-sys-tcu";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x80 >;
				qcom,connections = < 0xdd 0xd9 >;
				qcom,bus-dev = < 0xde >;
				qcom,bcms = < 0xdf >;
				qcom,ap-owned;
				qcom,prio = < 0x06 >;
				phandle = < 0x26d >;
			};

			mas-chm-apps {
				cell-id = < 0x01 >;
				label = "mas-chm-apps";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,connections = < 0xdd 0xd9 0xe0 >;
				qcom,bus-dev = < 0xde >;
				qcom,bcms = < 0xe1 >;
				phandle = < 0x26e >;
			};

			mas-qhm-gemnoc-cfg {
				cell-id = < 0x9d >;
				label = "mas-qhm-gemnoc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xe2 0xe3 0xe4 >;
				qcom,bus-dev = < 0xde >;
				phandle = < 0x121 >;
			};

			mas-qnm-cmpnoc {
				cell-id = < 0x9e >;
				label = "mas-qnm-cmpnoc";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x00 0x40 >;
				qcom,connections = < 0xdd 0xd9 >;
				qcom,bus-dev = < 0xde >;
				qcom,bcms = < 0xe5 >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				phandle = < 0x118 >;
			};

			mas-qnm-gpu {
				cell-id = < 0x1a >;
				label = "mas-qnm-gpu";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x01 0x41 >;
				qcom,connections = < 0xdd 0xd9 >;
				qcom,bus-dev = < 0xde >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				phandle = < 0x26f >;
			};

			mas-qnm-mnoc-hf {
				cell-id = < 0x84 >;
				label = "mas-qnm-mnoc-hf";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x02 0x42 >;
				qcom,connections = < 0xdd >;
				qcom,bus-dev = < 0xde >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x129 >;
			};

			mas-qnm-mnoc-sf {
				cell-id = < 0x85 >;
				label = "mas-qnm-mnoc-sf";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x03 0x43 >;
				qcom,connections = < 0xdd 0xd9 >;
				qcom,bus-dev = < 0xde >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x12b >;
			};

			mas-qnm-pcie {
				cell-id = < 0xaf >;
				label = "mas-qnm-pcie";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x81 >;
				qcom,connections = < 0xdd 0xd9 >;
				qcom,bus-dev = < 0xde >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				phandle = < 0x115 >;
			};

			mas-qnm-snoc-gc {
				cell-id = < 0x86 >;
				label = "mas-qnm-snoc-gc";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x82 >;
				qcom,connections = < 0xdd >;
				qcom,bus-dev = < 0xde >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				phandle = < 0x12e >;
			};

			mas-qnm-snoc-sf {
				cell-id = < 0x87 >;
				label = "mas-qnm-snoc-sf";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x83 >;
				qcom,connections = < 0xdd 0xd9 0xe0 >;
				qcom,bus-dev = < 0xde >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				phandle = < 0x130 >;
			};

			mas-ipa-core-master {
				cell-id = < 0x8f >;
				label = "mas-ipa-core-master";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xe6 >;
				qcom,bus-dev = < 0xe7 >;
				phandle = < 0x270 >;
			};

			mas-llcc-mc {
				cell-id = < 0x81 >;
				label = "mas-llcc-mc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x04 >;
				qcom,connections = < 0xe8 >;
				qcom,bus-dev = < 0xe9 >;
				phandle = < 0x123 >;
			};

			mas-qhm-mnoc-cfg {
				cell-id = < 0x67 >;
				label = "mas-qhm-mnoc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xea >;
				qcom,bus-dev = < 0xeb >;
				phandle = < 0x11d >;
			};

			mas-qnm-camnoc-hf {
				cell-id = < 0xaa >;
				label = "mas-qnm-camnoc-hf";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x04 0x05 >;
				qcom,connections = < 0xec >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xed >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x271 >;
			};

			mas-qnm-camnoc-icp {
				cell-id = < 0xab >;
				label = "mas-qnm-camnoc-icp";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x02 >;
				qcom,connections = < 0xee >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xef >;
				qcom,ap-owned;
				qcom,prio = < 0x05 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x272 >;
			};

			mas-qnm-camnoc-sf {
				cell-id = < 0x89 >;
				label = "mas-qnm-camnoc-sf";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x00 0x01 >;
				qcom,connections = < 0xee >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xef >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x273 >;
			};

			mas-qnm-video0 {
				cell-id = < 0x3f >;
				label = "mas-qnm-video0";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x0c >;
				qcom,connections = < 0xee >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xef >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x274 >;
			};

			mas-qnm-video1 {
				cell-id = < 0x40 >;
				label = "mas-qnm-video1";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x0d >;
				qcom,connections = < 0xee >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xef >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x275 >;
			};

			mas-qnm-video-cvp {
				cell-id = < 0x8a >;
				label = "mas-qnm-video-cvp";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x0e >;
				qcom,connections = < 0xee >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xef >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x276 >;
			};

			mas-qxm-mdp0 {
				cell-id = < 0x16 >;
				label = "mas-qxm-mdp0";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x06 >;
				qcom,connections = < 0xec >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xed >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x277 >;
			};

			mas-qxm-mdp1 {
				cell-id = < 0x17 >;
				label = "mas-qxm-mdp1";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x08 >;
				qcom,connections = < 0xec >;
				qcom,bus-dev = < 0xeb >;
				qcom,bcms = < 0xed >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x278 >;
			};

			mas-qxm-rot {
				cell-id = < 0x19 >;
				label = "mas-qxm-rot";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x0a >;
				qcom,connections = < 0xee >;
				qcom,bus-dev = < 0xeb >;
				qcom,ap-owned;
				qcom,prio = < 0x00 >;
				qcom,forwarding;
				qcom,node-qos-bcms = < 0x1b64 0x00 0x01 >;
				phandle = < 0x279 >;
			};

			mas-amm-npu-sys {
				cell-id = < 0xac >;
				label = "mas-amm-npu-sys";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x04 >;
				qcom,connections = < 0xf0 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0x27a >;
			};

			mas-amm-npu-sys-cdp-w {
				cell-id = < 0xad >;
				label = "mas-amm-npu-sys-cdp-w";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x02 >;
				qcom,connections = < 0xf0 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0x27b >;
			};

			mas-qhm-cfg {
				cell-id = < 0xae >;
				label = "mas-qhm-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0x11e >;
			};

			mas-qhm-snoc-cfg {
				cell-id = < 0x36 >;
				label = "mas-qhm-snoc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xfb >;
				qcom,bus-dev = < 0xfc >;
				phandle = < 0x11f >;
			};

			mas-qnm-aggre1-noc {
				cell-id = < 0x274f >;
				label = "mas-qnm-aggre1-noc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xfd >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0xfe >;
				phandle = < 0x114 >;
			};

			mas-qnm-aggre2-noc {
				cell-id = < 0x2750 >;
				label = "mas-qnm-aggre2-noc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0xfd >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0xff >;
				phandle = < 0x117 >;
			};

			mas-qnm-gemnoc {
				cell-id = < 0xa1 >;
				label = "mas-qnm-gemnoc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0x100 0x101 0x102 0x9a 0x103 0x104 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x105 >;
				phandle = < 0x122 >;
			};

			mas-qnm-gemnoc-pcie {
				cell-id = < 0x9f >;
				label = "mas-qnm-gemnoc-pcie";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,connections = < 0x106 0x107 0x108 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x109 >;
				phandle = < 0x125 >;
			};

			mas-qxm-pimem {
				cell-id = < 0x8d >;
				label = "mas-qxm-pimem";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x00 >;
				qcom,connections = < 0x10a >;
				qcom,bus-dev = < 0xfc >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				qcom,forwarding;
				phandle = < 0x27c >;
			};

			mas-xm-gic {
				cell-id = < 0x95 >;
				label = "mas-xm-gic";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x01 >;
				qcom,connections = < 0x10a >;
				qcom,bus-dev = < 0xfc >;
				qcom,ap-owned;
				qcom,prio = < 0x02 >;
				qcom,forwarding;
				phandle = < 0x27d >;
			};

			mas-alc {
				cell-id = < 0x90 >;
				label = "mas-alc";
				qcom,buswidth = < 0x01 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xe9 >;
				qcom,bcms = < 0x10b >;
				phandle = < 0x27e >;
			};

			mas-qnm-mnoc-hf_display {
				cell-id = < 0x4e21 >;
				label = "mas-qnm-mnoc-hf_display";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x02 0x42 >;
				qcom,connections = < 0x10c >;
				qcom,bus-dev = < 0x10d >;
				phandle = < 0x13b >;
			};

			mas-qnm-mnoc-sf_display {
				cell-id = < 0x4e22 >;
				label = "mas-qnm-mnoc-sf_display";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,qport = < 0x03 0x43 >;
				qcom,connections = < 0x10c >;
				qcom,bus-dev = < 0x10d >;
				phandle = < 0x13d >;
			};

			mas-llcc-mc_display {
				cell-id = < 0x4e20 >;
				label = "mas-llcc-mc_display";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x04 >;
				qcom,connections = < 0x10e >;
				qcom,bus-dev = < 0x10f >;
				phandle = < 0x137 >;
			};

			mas-qxm-mdp0_display {
				cell-id = < 0x4e23 >;
				label = "mas-qxm-mdp0_display";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x06 >;
				qcom,connections = < 0x110 >;
				qcom,bus-dev = < 0x111 >;
				qcom,bcms = < 0x112 >;
				phandle = < 0x27f >;
			};

			mas-qxm-mdp1_display {
				cell-id = < 0x4e24 >;
				label = "mas-qxm-mdp1_display";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x08 >;
				qcom,connections = < 0x110 >;
				qcom,bus-dev = < 0x111 >;
				qcom,bcms = < 0x112 >;
				phandle = < 0x280 >;
			};

			mas-qxm-rot_display {
				cell-id = < 0x4e25 >;
				label = "mas-qxm-rot_display";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x01 >;
				qcom,qport = < 0x0a >;
				qcom,connections = < 0x113 >;
				qcom,bus-dev = < 0x111 >;
				phandle = < 0x281 >;
			};

			slv-qns-a1noc-snoc {
				cell-id = < 0x274e >;
				label = "slv-qns-a1noc-snoc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0x98 >;
				qcom,connections = < 0x114 >;
				phandle = < 0x99 >;
			};

			slv-qns-pcie-modem-mem-noc {
				cell-id = < 0x326 >;
				label = "slv-qns-pcie-modem-mem-noc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0x98 >;
				qcom,connections = < 0x115 >;
				qcom,bcms = < 0x116 >;
				phandle = < 0x9c >;
			};

			slv-srvc-aggre1-noc {
				cell-id = < 0x2e8 >;
				label = "slv-srvc-aggre1-noc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0x98 >;
				phandle = < 0x97 >;
			};

			slv-qns-a2noc-snoc {
				cell-id = < 0x2751 >;
				label = "slv-qns-a2noc-snoc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0x9e >;
				qcom,connections = < 0x117 >;
				phandle = < 0x9f >;
			};

			slv-qns-pcie-mem-noc {
				cell-id = < 0x2755 >;
				label = "slv-qns-pcie-mem-noc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0x9e >;
				qcom,connections = < 0x115 >;
				qcom,bcms = < 0x116 >;
				phandle = < 0xa1 >;
			};

			slv-srvc-aggre2-noc {
				cell-id = < 0x2ea >;
				label = "slv-srvc-aggre2-noc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0x9e >;
				phandle = < 0x9d >;
			};

			slv-qns-cdsp-mem-noc {
				cell-id = < 0x2756 >;
				label = "slv-qns-cdsp-mem-noc";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,bus-dev = < 0xa3 >;
				qcom,connections = < 0x118 >;
				qcom,bcms = < 0x119 >;
				phandle = < 0xa2 >;
			};

			slv-qhs-a1-noc-cfg {
				cell-id = < 0x2af >;
				label = "slv-qhs-a1-noc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,connections = < 0x11a >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xca >;
			};

			slv-qhs-a2-noc-cfg {
				cell-id = < 0x2b0 >;
				label = "slv-qhs-a2-noc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,connections = < 0x11b >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb2 >;
			};

			slv-qhs-ahb2phy0 {
				cell-id = < 0x30b >;
				label = "slv-qhs-ahb2phy0";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xbd >;
			};

			slv-qhs-ahb2phy1 {
				cell-id = < 0x327 >;
				label = "slv-qhs-ahb2phy1";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xbe >;
			};

			slv-qhs-aoss {
				cell-id = < 0x2ec >;
				label = "slv-qhs-aoss";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xcb >;
			};

			slv-qhs-camera-cfg {
				cell-id = < 0x24d >;
				label = "slv-qhs-camera-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				qcom,disable-ports = < 0x00 0x01 0x02 >;
				mmcx-supply = < 0x54 >;
				node-reg-names = "mmcx";
				phandle = < 0xa6 >;
			};

			slv-qhs-clk-ctl {
				cell-id = < 0x26c >;
				label = "slv-qhs-clk-ctl";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xd5 >;
			};

			slv-qhs-compute-dsp {
				cell-id = < 0x2ed >;
				label = "slv-qhs-compute-dsp";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xa5 >;
			};

			slv-qhs-cpr-cx {
				cell-id = < 0x28b >;
				label = "slv-qhs-cpr-cx";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc9 >;
			};

			slv-qhs-cpr-mmcx {
				cell-id = < 0x30c >;
				label = "slv-qhs-cpr-mmcx";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xbb >;
			};

			slv-qhs-cpr-mx {
				cell-id = < 0x28c >;
				label = "slv-qhs-cpr-mx";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xd1 >;
			};

			slv-qhs-crypto0-cfg {
				cell-id = < 0x271 >;
				label = "slv-qhs-crypto0-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xcf >;
			};

			slv-qhs-cx-rdpm {
				cell-id = < 0x328 >;
				label = "slv-qhs-cx-rdpm";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb0 >;
			};

			slv-qhs-dcc-cfg {
				cell-id = < 0x2aa >;
				label = "slv-qhs-dcc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb7 >;
			};

			slv-qhs-ddrss-cfg {
				cell-id = < 0x2ee >;
				label = "slv-qhs-ddrss-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,connections = < 0x11c >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb8 >;
			};

			slv-qhs-display-cfg {
				cell-id = < 0x24e >;
				label = "slv-qhs-display-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				qcom,disable-ports = < 0x03 0x04 >;
				mmcx-supply = < 0x54 >;
				node-reg-names = "mmcx";
				phandle = < 0xb4 >;
			};

			slv-qhs-gpuss-cfg {
				cell-id = < 0x256 >;
				label = "slv-qhs-gpuss-cfg";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xbf >;
			};

			slv-qhs-imem-cfg {
				cell-id = < 0x273 >;
				label = "slv-qhs-imem-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc3 >;
			};

			slv-qhs-ipa {
				cell-id = < 0x2a4 >;
				label = "slv-qhs-ipa";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc2 >;
			};

			slv-qhs-ipc-router {
				cell-id = < 0x329 >;
				label = "slv-qhs-ipc-router";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb9 >;
			};

			slv-qhs-lpass-cfg {
				cell-id = < 0x20a >;
				label = "slv-qhs-lpass-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc8 >;
			};

			slv-qhs-mnoc-cfg {
				cell-id = < 0x280 >;
				label = "slv-qhs-mnoc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,connections = < 0x11d >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xac >;
			};

			slv-qhs-npu-cfg {
				cell-id = < 0x30e >;
				label = "slv-qhs-npu-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,connections = < 0x11e >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xbc >;
			};

			slv-qhs-pcie0-cfg {
				cell-id = < 0x29b >;
				label = "slv-qhs-pcie0-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xba >;
			};

			slv-qhs-pcie1-cfg {
				cell-id = < 0x29c >;
				label = "slv-qhs-pcie1-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb1 >;
			};

			slv-qhs-pcie-modem-cfg {
				cell-id = < 0x2ac >;
				label = "slv-qhs-pcie-modem-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb5 >;
			};

			slv-qhs-pdm {
				cell-id = < 0x267 >;
				label = "slv-qhs-pdm";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xaf >;
			};

			slv-qhs-pimem-cfg {
				cell-id = < 0x2a9 >;
				label = "slv-qhs-pimem-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xd0 >;
			};

			slv-qhs-prng {
				cell-id = < 0x26a >;
				label = "slv-qhs-prng";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xcc >;
			};

			slv-qhs-qdss-cfg {
				cell-id = < 0x27b >;
				label = "slv-qhs-qdss-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb3 >;
			};

			slv-qhs-qspi {
				cell-id = < 0x31b >;
				label = "slv-qhs-qspi";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xce >;
			};

			slv-qhs-qup0 {
				cell-id = < 0x313 >;
				label = "slv-qhs-qup0";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xd2 >;
			};

			slv-qhs-qup1 {
				cell-id = < 0x312 >;
				label = "slv-qhs-qup1";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xd3 >;
			};

			slv-qhs-qup2 {
				cell-id = < 0x311 >;
				label = "slv-qhs-qup2";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xd4 >;
			};

			slv-qhs-sdc2 {
				cell-id = < 0x260 >;
				label = "slv-qhs-sdc2";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xab >;
			};

			slv-qhs-sdc4 {
				cell-id = < 0x261 >;
				label = "slv-qhs-sdc4";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xa9 >;
			};

			slv-qhs-snoc-cfg {
				cell-id = < 0x282 >;
				label = "slv-qhs-snoc-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,connections = < 0x11f >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xae >;
			};

			slv-qhs-tcsr {
				cell-id = < 0x26f >;
				label = "slv-qhs-tcsr";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xb6 >;
			};

			slv-qhs-tlmm0 {
				cell-id = < 0x2db >;
				label = "slv-qhs-tlmm0";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xa8 >;
			};

			slv-qhs-tlmm1 {
				cell-id = < 0x2f3 >;
				label = "slv-qhs-tlmm1";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xa7 >;
			};

			slv-qhs-tlmm2 {
				cell-id = < 0x2dc >;
				label = "slv-qhs-tlmm2";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xaa >;
			};

			slv-qhs-tsif {
				cell-id = < 0x23f >;
				label = "slv-qhs-tsif";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc1 >;
			};

			slv-qhs-ufs-card-cfg {
				cell-id = < 0x2f4 >;
				label = "slv-qhs-ufs-card-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc6 >;
			};

			slv-qhs-ufs-mem-cfg {
				cell-id = < 0x2f5 >;
				label = "slv-qhs-ufs-mem-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xad >;
			};

			slv-qhs-usb3-0 {
				cell-id = < 0x247 >;
				label = "slv-qhs-usb3-0";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc4 >;
			};

			slv-qhs-usb3-1 {
				cell-id = < 0x2ef >;
				label = "slv-qhs-usb3-1";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc7 >;
			};

			slv-qhs-venus-cfg {
				cell-id = < 0x254 >;
				label = "slv-qhs-venus-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				qcom,disable-ports = < 0x05 0x06 0x07 >;
				mmcx-supply = < 0x54 >;
				node-reg-names = "mmcx";
				phandle = < 0xc0 >;
			};

			slv-qhs-vsense-ctrl-cfg {
				cell-id = < 0x2f6 >;
				label = "slv-qhs-vsense-ctrl-cfg";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xcd >;
			};

			slv-qns-cnoc-a2noc {
				cell-id = < 0x2d5 >;
				label = "slv-qns-cnoc-a2noc";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,connections = < 0x120 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xd8 >;
			};

			slv-srvc-cnoc {
				cell-id = < 0x286 >;
				label = "slv-srvc-cnoc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xd6 >;
				qcom,bcms = < 0xd7 >;
				phandle = < 0xc5 >;
			};

			slv-qhs-llcc {
				cell-id = < 0x2f8 >;
				label = "slv-qhs-llcc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xdc >;
				phandle = < 0xdb >;
			};

			slv-qhs-memnoc {
				cell-id = < 0x314 >;
				label = "slv-qhs-memnoc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xdc >;
				qcom,connections = < 0x121 >;
				phandle = < 0xda >;
			};

			slv-qns-gem-noc-snoc {
				cell-id = < 0x2757 >;
				label = "slv-qns-gem-noc-snoc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xde >;
				qcom,connections = < 0x122 >;
				phandle = < 0xd9 >;
			};

			slv-qns-llcc {
				cell-id = < 0x302 >;
				label = "slv-qns-llcc";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x04 >;
				qcom,bus-dev = < 0xde >;
				qcom,connections = < 0x123 >;
				qcom,bcms = < 0x124 >;
				phandle = < 0xdd >;
			};

			slv-qns-sys-pcie {
				cell-id = < 0x324 >;
				label = "slv-qns-sys-pcie";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xde >;
				qcom,connections = < 0x125 >;
				phandle = < 0xe0 >;
			};

			slv-srvc-even-gemnoc {
				cell-id = < 0x320 >;
				label = "slv-srvc-even-gemnoc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xde >;
				phandle = < 0xe3 >;
			};

			slv-srvc-odd-gemnoc {
				cell-id = < 0x32a >;
				label = "slv-srvc-odd-gemnoc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xde >;
				phandle = < 0xe2 >;
			};

			slv-srvc-sys-gemnoc {
				cell-id = < 0x316 >;
				label = "slv-srvc-sys-gemnoc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xde >;
				phandle = < 0xe4 >;
			};

			slv-ipa-core-slave {
				cell-id = < 0x309 >;
				label = "slv-ipa-core-slave";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xe7 >;
				qcom,bcms = < 0x126 >;
				phandle = < 0xe6 >;
			};

			slv-ebi {
				cell-id = < 0x200 >;
				label = "slv-ebi";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x04 >;
				qcom,bus-dev = < 0xe9 >;
				qcom,bcms = < 0x127 0x128 >;
				phandle = < 0xe8 >;
			};

			slv-qns-mem-noc-hf {
				cell-id = < 0x305 >;
				label = "slv-qns-mem-noc-hf";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,bus-dev = < 0xeb >;
				qcom,connections = < 0x129 >;
				qcom,bcms = < 0x12a >;
				phandle = < 0xec >;
			};

			slv-qns-mem-noc-sf {
				cell-id = < 0x304 >;
				label = "slv-qns-mem-noc-sf";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,bus-dev = < 0xeb >;
				qcom,connections = < 0x12b >;
				qcom,bcms = < 0x12c >;
				phandle = < 0xee >;
			};

			slv-srvc-mnoc {
				cell-id = < 0x25b >;
				label = "slv-srvc-mnoc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xeb >;
				phandle = < 0xea >;
			};

			slv-qhs-cal-dp0 {
				cell-id = < 0x32b >;
				label = "slv-qhs-cal-dp0";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf8 >;
			};

			slv-qhs-cal-dp1 {
				cell-id = < 0x32c >;
				label = "slv-qhs-cal-dp1";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf9 >;
			};

			slv-qhs-cp {
				cell-id = < 0x32d >;
				label = "slv-qhs-cp";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf6 >;
			};

			slv-qhs-dma-bwmon {
				cell-id = < 0x32e >;
				label = "slv-qhs-dma-bwmon";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf5 >;
			};

			slv-qhs-dpm {
				cell-id = < 0x32f >;
				label = "slv-qhs-dpm";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xfa >;
			};

			slv-qhs-isense {
				cell-id = < 0x330 >;
				label = "slv-qhs-isense";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf3 >;
			};

			slv-qhs-llm {
				cell-id = < 0x331 >;
				label = "slv-qhs-llm";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf4 >;
			};

			slv-qhs-tcm {
				cell-id = < 0x332 >;
				label = "slv-qhs-tcm";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf7 >;
			};

			slv-qns-npu-sys {
				cell-id = < 0x333 >;
				label = "slv-qns-npu-sys";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf0 >;
			};

			slv-srvc-noc {
				cell-id = < 0x334 >;
				label = "slv-srvc-noc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xf1 >;
				phandle = < 0xf2 >;
			};

			slv-qhs-apss {
				cell-id = < 0x2a1 >;
				label = "slv-qhs-apss";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				phandle = < 0x102 >;
			};

			slv-qns-cnoc {
				cell-id = < 0x2734 >;
				label = "slv-qns-cnoc";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,connections = < 0x12d >;
				phandle = < 0x9a >;
			};

			slv-qns-gemnoc-gc {
				cell-id = < 0x2758 >;
				label = "slv-qns-gemnoc-gc";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,connections = < 0x12e >;
				qcom,bcms = < 0x12f >;
				phandle = < 0x10a >;
			};

			slv-qns-gemnoc-sf {
				cell-id = < 0x2759 >;
				label = "slv-qns-gemnoc-sf";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,connections = < 0x130 >;
				qcom,bcms = < 0x131 >;
				phandle = < 0xfd >;
			};

			slv-qxs-imem {
				cell-id = < 0x249 >;
				label = "slv-qxs-imem";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x132 >;
				phandle = < 0x101 >;
			};

			slv-qxs-pimem {
				cell-id = < 0x2c8 >;
				label = "slv-qxs-pimem";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x133 >;
				phandle = < 0x100 >;
			};

			slv-srvc-snoc {
				cell-id = < 0x24b >;
				label = "slv-srvc-snoc";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				phandle = < 0xfb >;
			};

			slv-xs-pcie-0 {
				cell-id = < 0x299 >;
				label = "slv-xs-pcie-0";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x134 >;
				phandle = < 0x107 >;
			};

			slv-xs-pcie-1 {
				cell-id = < 0x29a >;
				label = "slv-xs-pcie-1";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x134 >;
				phandle = < 0x108 >;
			};

			slv-xs-pcie-modem {
				cell-id = < 0x2ca >;
				label = "slv-xs-pcie-modem";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x135 >;
				phandle = < 0x106 >;
			};

			slv-xs-qdss-stm {
				cell-id = < 0x24c >;
				label = "slv-xs-qdss-stm";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				qcom,bcms = < 0x136 >;
				phandle = < 0x104 >;
			};

			slv-xs-sys-tcu-cfg {
				cell-id = < 0x2a0 >;
				label = "slv-xs-sys-tcu-cfg";
				qcom,buswidth = < 0x08 >;
				qcom,agg-ports = < 0x01 >;
				qcom,bus-dev = < 0xfc >;
				phandle = < 0x103 >;
			};

			slv-qns-llcc_display {
				cell-id = < 0x5021 >;
				label = "slv-qns-llcc_display";
				qcom,buswidth = < 0x10 >;
				qcom,agg-ports = < 0x04 >;
				qcom,bus-dev = < 0x10d >;
				qcom,connections = < 0x137 >;
				qcom,bcms = < 0x138 >;
				phandle = < 0x10c >;
			};

			slv-ebi_display {
				cell-id = < 0x5020 >;
				label = "slv-ebi_display";
				qcom,buswidth = < 0x04 >;
				qcom,agg-ports = < 0x04 >;
				qcom,bus-dev = < 0x10f >;
				qcom,bcms = < 0x139 0x13a >;
				phandle = < 0x10e >;
			};

			slv-qns-mem-noc-hf_display {
				cell-id = < 0x5023 >;
				label = "slv-qns-mem-noc-hf_display";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,bus-dev = < 0x111 >;
				qcom,connections = < 0x13b >;
				qcom,bcms = < 0x13c >;
				phandle = < 0x110 >;
			};

			slv-qns-mem-noc-sf_display {
				cell-id = < 0x5022 >;
				label = "slv-qns-mem-noc-sf_display";
				qcom,buswidth = < 0x20 >;
				qcom,agg-ports = < 0x02 >;
				qcom,bus-dev = < 0x111 >;
				qcom,connections = < 0x13d >;
				qcom,bcms = < 0x13e >;
				phandle = < 0x113 >;
			};
		};

		qcom,ion {
			compatible = "qcom,msm-ion";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;

			qcom,ion-heap@25 {
				reg = < 0x19 >;
				qcom,ion-heap-type = "SYSTEM";
				phandle = < 0x282 >;
			};

			qcom,ion-heap@22 {
				reg = < 0x16 >;
				memory-region = < 0x13f >;
				qcom,ion-heap-type = "DMA";
				phandle = < 0x283 >;
			};

			qcom,ion-heap@9 {
				reg = < 0x09 >;
				qcom,ion-heap-type = "SYSTEM_SECURE";
				phandle = < 0x284 >;
			};

			qcom,ion-heap@26 {
				reg = < 0x1a >;
				memory-region = < 0x140 >;
				qcom,ion-heap-type = "DMA";
			};

			qcom,ion-heap@27 {
				reg = < 0x1b >;
				memory-region = < 0x50 >;
				qcom,ion-heap-type = "DMA";
			};

			qcom,ion-heap@19 {
				reg = < 0x13 >;
				memory-region = < 0x141 >;
				qcom,ion-heap-type = "DMA";
			};

			qcom,ion-heap@13 {
				reg = < 0x0d >;
				memory-region = < 0x142 >;
				qcom,ion-heap-type = "HYP_CMA";
			};

			qcom,ion-heap@10 {
				reg = < 0x0a >;
				memory-region = < 0x143 >;
				qcom,ion-heap-type = "HYP_CMA";
			};
		};

		qcom,pcie@1c00000 {
			compatible = "qcom,pci-msm";
			reg = < 0x1c00000 0x3000 0x1c06000 0x1000 0x60000000 0xf1d 0x60000f20 0xa8 0x60001000 0x1000 0x60100000 0x100000 >;
			reg-names = "parf\0phy\0dm_core\0elbi\0iatu\0conf";
			cell-index = < 0x00 >;
			linux,pci-domain = < 0x00 >;
			#address-cells = < 0x03 >;
			#size-cells = < 0x02 >;
			ranges = < 0x1000000 0x00 0x60200000 0x60200000 0x00 0x100000 0x2000000 0x00 0x60300000 0x60300000 0x00 0x3d00000 >;
			interrupt-parent = < 0x144 >;
			interrupts = < 0x00 0x01 0x02 0x03 0x04 >;
			interrupt-names = "int_global_int\0int_a\0int_b\0int_c\0int_d";
			#interrupt-cells = < 0x01 >;
			interrupt-map-mask = < 0x00 0x00 0x00 0xffffffff >;
			interrupt-map = < 0x00 0x00 0x00 0x00 0x01 0x00 0x8c 0x04 0x00 0x00 0x00 0x01 0x01 0x00 0x95 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x96 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x97 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x98 0x04 >;
			msi-parent = < 0x145 >;
			perst-gpio = < 0x8b 0x4f 0x00 >;
			wake-gpio = < 0x8b 0x51 0x00 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x146 0x147 0x148 >;
			pinctrl-1 = < 0x149 0x147 0x148 >;
			gdsc-vdd-supply = < 0x14a >;
			vreg-1p8-supply = < 0x6a >;
			vreg-0p9-supply = < 0x69 >;
			vreg-cx-supply = < 0x52 >;
			qcom,vreg-1p8-voltage-level = < 0x124f80 0x124f80 0x3e80 >;
			qcom,vreg-0p9-voltage-level = < 0xd6d80 0xd6d80 0x11f1c >;
			qcom,vreg-cx-voltage-level = < 0xffff 0x100 0x00 >;
			qcom,bw-scale = < 0x40 0x124f800 0x40 0x124f800 0x100 0x5f5e100 >;
			qcom,msm-bus,name = "pcie0";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x2d 0x200 0x00 0x00 0x2d 0x200 0x1f4 0x320 >;
			clocks = < 0x15 0x36 0x14 0x00 0x15 0x32 0x15 0x34 0x15 0x35 0x15 0x37 0x15 0x4a 0x15 0x38 0x15 0x03 0x15 0x2f 0x15 0x17 >;
			clock-names = "pcie_0_pipe_clk\0pcie_0_ref_clk_src\0pcie_0_aux_clk\0pcie_0_cfg_ahb_clk\0pcie_0_mstr_axi_clk\0pcie_0_slv_axi_clk\0pcie_0_ldo\0pcie_0_slv_q2a_axi_clk\0pcie_tbu_clk\0pcie_phy_refgen_clk\0pcie_ddrss_sf_tbu_clk";
			max-clock-frequency-hz = < 0x00 0x00 0x124f800 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x5f5e100 0x00 >;
			resets = < 0x15 0x04 0x15 0x07 >;
			reset-names = "pcie_0_core_reset\0pcie_0_phy_reset";
			dma-coherent;
			qcom,smmu-sid-base = < 0x1c00 >;
			iommu-map = < 0x00 0x43 0x1c00 0x01 0x100 0x43 0x1c01 0x01 >;
			qcom,boot-option = < 0x01 >;
			qcom,drv-supported;
			qcom,drv-l1ss-timeout-us = < 0x2710 >;
			qcom,use-19p2mhz-aux-clk;
			qcom,no-l0s-supported;
			qcom,l1-2-th-scale = < 0x02 >;
			qcom,l1-2-th-value = < 0x46 >;
			qcom,slv-addr-space-size = < 0x4000000 >;
			qcom,ep-latency = < 0x0a >;
			qcom,pcie-phy-ver = < 0x44e >;
			qcom,phy-status-offset = < 0x814 >;
			qcom,phy-status-bit = < 0x06 >;
			qcom,phy-power-down-offset = < 0x840 >;
			qcom,phy-sequence = < 0x840 0x03 0x00 0x94 0x08 0x00 0x154 0x34 0x00 0x16c 0x08 0x00 0x58 0x0f 0x00 0xa4 0x42 0x00 0x110 0x24 0x00 0x11c 0x03 0x00 0x118 0xb4 0x00 0x10c 0x02 0x00 0x1bc 0x11 0x00 0xbc 0x82 0x00 0xd4 0x03 0x00 0xd0 0x55 0x00 0xcc 0x55 0x00 0xb0 0x1a 0x00 0xac 0x0a 0x00 0xc4 0x68 0x00 0xe0 0x02 0x00 0xdc 0xaa 0x00 0xd8 0xab 0x00 0xb8 0x34 0x00 0xb4 0x14 0x00 0x158 0x01 0x00 0x74 0x06 0x00 0x7c 0x16 0x00 0x84 0x36 0x00 0x78 0x06 0x00 0x80 0x16 0x00 0x88 0x36 0x00 0x1b0 0x1e 0x00 0x1ac 0xca 0x00 0x1b8 0x18 0x00 0x1b4 0xa2 0x00 0x50 0x07 0x00 0x10 0x01 0x00 0x1c 0x31 0x00 0x20 0x01 0x00 0x24 0xde 0x00 0x28 0x07 0x00 0x30 0x4c 0x00 0x34 0x06 0x00 0x29c 0x12 0x00 0x284 0x35 0x00 0x23c 0x11 0x00 0x51c 0x03 0x00 0x518 0x1c 0x00 0x524 0x1e 0x00 0x4e8 0x00 0x00 0x4ec 0x0e 0x00 0x4f0 0x4a 0x00 0x4f4 0x0f 0x00 0x5b4 0x04 0x00 0x434 0x7f 0x00 0x444 0x70 0x00 0x510 0x17 0x00 0x4d4 0x04 0x00 0x4d8 0x07 0x00 0x598 0xd4 0x00 0x59c 0x54 0x00 0x5a0 0xdb 0x00 0x5a4 0x3b 0x00 0x5a8 0x31 0x00 0x584 0x24 0x00 0x588 0xe4 0x00 0x58c 0xec 0x00 0x590 0x3b 0x00 0x594 0x36 0x00 0x570 0x3f 0x00 0x574 0x3f 0x00 0x578 0xff 0x00 0x57c 0x7f 0x00 0x580 0x14 0x00 0x4fc 0x00 0x00 0x4f8 0xc0 0x00 0x460 0x30 0x00 0x464 0x00 0x00 0x5bc 0x0c 0x00 0x4dc 0x1b 0x00 0x408 0x0c 0x00 0x414 0x03 0x00 0x5b8 0x30 0x00 0x9a4 0x01 0x00 0xc90 0x00 0x00 0xc40 0x01 0x00 0xc48 0x01 0x00 0xc50 0x00 0x00 0xcb4 0x33 0x00 0xcbc 0x00 0x00 0xce0 0x58 0x00 0xca4 0x0f 0x00 0x48 0x90 0x00 0xc1c 0xc1 0x00 0x988 0x77 0x00 0x998 0x0b 0x00 0x8dc 0x0d 0x00 0x9ec 0x12 0x00 0x800 0x00 0x00 0x844 0x03 0x00 >;
			phandle = < 0x144 >;

			pcie0_rp {
				reg = < 0x00 0x00 0x00 0x00 0x00 >;
				#address-cells = < 0x05 >;
				#size-cells = < 0x00 >;
				phandle = < 0x285 >;

				cnss_pci {
					reg = < 0x00 0x00 0x00 0x00 0x00 >;
					qcom,iommu-group = < 0x14b >;
					memory-region = < 0x14c >;
					#address-cells = < 0x01 >;
					#size-cells = < 0x01 >;
					phandle = < 0x286 >;

					cnss_pci_iommu_group {
						qcom,iommu-dma-addr-pool = < 0xa0000000 0x10000000 >;
						qcom,iommu-dma = "fastmap";
						qcom,iommu-pagetable = "coherent";
						qcom,iommu-faults = "stall-disable\0HUPCF\0no-CFRE\0non-fatal";
						phandle = < 0x14b >;
					};
				};
			};
		};

		qcom,pcie0_msi@17a10040 {
			compatible = "qcom,pci-msi";
			msi-controller;
			reg = < 0x17a10040 0x00 >;
			interrupt-parent = < 0x01 >;
			interrupts = < 0x00 0x300 0x01 0x00 0x301 0x01 0x00 0x302 0x01 0x00 0x303 0x01 0x00 0x304 0x01 0x00 0x305 0x01 0x00 0x306 0x01 0x00 0x307 0x01 0x00 0x308 0x01 0x00 0x309 0x01 0x00 0x30a 0x01 0x00 0x30b 0x01 0x00 0x30c 0x01 0x00 0x30d 0x01 0x00 0x30e 0x01 0x00 0x30f 0x01 0x00 0x310 0x01 0x00 0x311 0x01 0x00 0x312 0x01 0x00 0x313 0x01 0x00 0x314 0x01 0x00 0x315 0x01 0x00 0x316 0x01 0x00 0x317 0x01 0x00 0x318 0x01 0x00 0x319 0x01 0x00 0x31a 0x01 0x00 0x31b 0x01 0x00 0x31c 0x01 0x00 0x31d 0x01 0x00 0x31e 0x01 0x00 0x31f 0x01 >;
			phandle = < 0x145 >;
		};

		kgsl-smmu@3da0000 {
			compatible = "qcom,qsmmu-v500";
			reg = < 0x3da0000 0x10000 0x3dc2000 0x20 >;
			reg-names = "base\0tcu-base";
			#iommu-cells = < 0x02 >;
			qcom,skip-init;
			qcom,use-3-lvl-tables;
			#global-interrupts = < 0x02 >;
			#size-cells = < 0x01 >;
			#address-cells = < 0x01 >;
			ranges;
			qcom,regulator-names = "vdd";
			vdd-supply = < 0x14d >;
			clocks = < 0x15 0x26 0x15 0x27 0x59 0x00 >;
			clock-names = "gcc_gpu_memnoc_gfx\0gcc_gpu_snoc_dvm_gfx\0gpu_cc_ahb";
			interrupts = < 0x00 0x2a0 0x04 0x00 0x2a1 0x04 0x00 0x2a6 0x04 0x00 0x2a7 0x04 0x00 0x2a8 0x04 0x00 0x2a9 0x04 0x00 0x2aa 0x04 0x00 0x2ab 0x04 0x00 0x2ac 0x04 0x00 0x2ad 0x04 >;
			qcom,msm-bus,vectors-KBps = < 0x9b 0x200 0x00 0x00 0x9b 0x200 0x00 0x3e8 >;
			qcom,actlr = < 0x02 0x400 0x32b 0x04 0x400 0x32b 0x05 0x400 0x32b 0x07 0x400 0x32b 0x00 0x401 0x32b >;
			phandle = < 0x152 >;

			gfx_0_tbu@3dc5000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x3dc5000 0x1000 0x3dc2200 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x00 0x400 >;
				phandle = < 0x287 >;
			};

			gfx_1_tbu@3dc9000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x3dc9000 0x1000 0x3dc2208 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x400 0x400 >;
				phandle = < 0x288 >;
			};
		};

		apps-smmu@15000000 {
			compatible = "qcom,qsmmu-v500";
			reg = < 0x15000000 0x100000 0x15182000 0x20 >;
			reg-names = "base\0tcu-base";
			#iommu-cells = < 0x02 >;
			qcom,skip-init;
			qcom,use-3-lvl-tables;
			#global-interrupts = < 0x02 >;
			#size-cells = < 0x01 >;
			#address-cells = < 0x01 >;
			ranges;
			interrupts = < 0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x61 0x04 0x00 0x62 0x04 0x00 0x63 0x04 0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04 0x00 0x68 0x04 0x00 0x69 0x04 0x00 0x6a 0x04 0x00 0x6b 0x04 0x00 0x6c 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04 0x00 0x71 0x04 0x00 0x72 0x04 0x00 0x73 0x04 0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0xb5 0x04 0x00 0xb6 0x04 0x00 0xb7 0x04 0x00 0xb8 0x04 0x00 0xb9 0x04 0x00 0xba 0x04 0x00 0xbb 0x04 0x00 0xbc 0x04 0x00 0xbd 0x04 0x00 0xbe 0x04 0x00 0xbf 0x04 0x00 0xc0 0x04 0x00 0x13b 0x04 0x00 0x13c 0x04 0x00 0x13d 0x04 0x00 0x13e 0x04 0x00 0x13f 0x04 0x00 0x140 0x04 0x00 0x141 0x04 0x00 0x142 0x04 0x00 0x143 0x04 0x00 0x144 0x04 0x00 0x145 0x04 0x00 0x146 0x04 0x00 0x147 0x04 0x00 0x148 0x04 0x00 0x149 0x04 0x00 0x14a 0x04 0x00 0x14b 0x04 0x00 0x14c 0x04 0x00 0x14d 0x04 0x00 0x14e 0x04 0x00 0x14f 0x04 0x00 0x150 0x04 0x00 0x151 0x04 0x00 0x152 0x04 0x00 0x153 0x04 0x00 0x154 0x04 0x00 0x155 0x04 0x00 0x156 0x04 0x00 0x157 0x04 0x00 0x158 0x04 0x00 0x159 0x04 0x00 0x18b 0x04 0x00 0x18c 0x04 0x00 0x18d 0x04 0x00 0x18e 0x04 0x00 0x18f 0x04 0x00 0x190 0x04 0x00 0x191 0x04 0x00 0x192 0x04 0x00 0x193 0x04 0x00 0x194 0x04 0x00 0x195 0x04 0x00 0x196 0x04 0x00 0x197 0x04 0x00 0x198 0x04 0x00 0x199 0x04 0x00 0x19c 0x04 0x00 0x1a2 0x04 0x00 0x1a3 0x04 0x00 0x1a5 0x04 0x00 0x1a7 0x04 0x00 0x1a8 0x04 0x00 0x1a9 0x04 0x00 0x2b2 0x04 0x00 0x2b3 0x04 0x00 0x2b4 0x04 0x00 0x2b5 0x04 0x00 0x2b6 0x04 0x00 0x2b7 0x04 0x00 0x2b8 0x04 0x00 0x2b9 0x04 0x00 0x2c3 0x04 >;
			qcom,msm-bus,name = "apps_smmu";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,active-only;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0xa1 0x273 0x00 0x00 0xa1 0x273 0x00 0x3e8 >;
			qcom,actlr = < 0x800 0x3ff 0x103 0xc00 0x3ff 0x103 0x2000 0x3ff 0x103 0x2400 0x3ff 0x103 0x1081 0x400 0x103 0x1082 0x400 0x103 0x1085 0x400 0x103 0x10a1 0x400 0x103 0x10a2 0x400 0x103 0x10a5 0x400 0x103 >;
			phandle = < 0x43 >;

			anoc_1_tbu@15185000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x15185000 0x1000 0x15182200 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x00 0x400 >;
				qcom,msm-bus,name = "apps_smmu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0xa1 0x273 0x00 0x00 0xa1 0x273 0x00 0x3e8 >;
				phandle = < 0x289 >;
			};

			anoc_2_tbu@15189000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x15189000 0x1000 0x15182208 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x400 0x400 >;
				qcom,msm-bus,name = "apps_smmu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0xa1 0x273 0x00 0x00 0xa1 0x273 0x00 0x3e8 >;
				phandle = < 0x28a >;
			};

			mnoc_hf_0_tbu@1518d000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x1518d000 0x1000 0x15182210 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x800 0x400 >;
				qcom,regulator-names = "vdd";
				vdd-supply = < 0x14e >;
				qcom,msm-bus,name = "mnoc_hf_0_tbu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x16 0x305 0x00 0x00 0x16 0x305 0x00 0x3e8 >;
				phandle = < 0x28b >;
			};

			mnoc_hf_1_tbu@15191000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x15191000 0x1000 0x15182218 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0xc00 0x400 >;
				qcom,regulator-names = "vdd";
				vdd-supply = < 0x14f >;
				qcom,msm-bus,name = "mnoc_hf_1_tbu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x16 0x305 0x00 0x00 0x16 0x305 0x00 0x3e8 >;
				phandle = < 0x28c >;
			};

			compute_dsp_1_tbu@15195000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x15195000 0x1000 0x15182220 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x1000 0x400 >;
				qcom,msm-bus,name = "apps_smmu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x9a 0x2756 0x00 0x00 0x9a 0x2756 0x00 0x3e8 >;
				phandle = < 0x28d >;
			};

			compute_dsp_0_tbu@15199000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x15199000 0x1000 0x15182228 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x1400 0x400 >;
				qcom,msm-bus,name = "apps_smmu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x9a 0x2756 0x00 0x00 0x9a 0x2756 0x00 0x3e8 >;
				phandle = < 0x28e >;
			};

			adsp_tbu@1519d000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x1519d000 0x1000 0x15182230 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x1800 0x400 >;
				qcom,msm-bus,name = "apps_smmu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0xa1 0x273 0x00 0x00 0xa1 0x273 0x00 0x3e8 >;
				phandle = < 0x28f >;
			};

			anoc_1_pcie_tbu@151a1000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x151a1000 0x1000 0x15182238 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x1c00 0x400 >;
				clock-names = "gcc_aggre_noc_pcie_tbu_clk";
				clocks = < 0x15 0x03 >;
				qcom,msm-bus,name = "apps_smmu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0xa1 0x273 0x00 0x00 0xa1 0x273 0x00 0x3e8 >;
				phandle = < 0x290 >;
			};

			mnoc_sf_0_tbu@151a5000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x151a5000 0x1000 0x15182240 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x2000 0x400 >;
				qcom,regulator-names = "vdd";
				vdd-supply = < 0x150 >;
				qcom,msm-bus,name = "mnoc_sf_0_tbu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x89 0x304 0x00 0x00 0x89 0x304 0x00 0x3e8 >;
				phandle = < 0x291 >;
			};

			mnoc_sf_1_tbu@151a9000 {
				compatible = "qcom,qsmmuv500-tbu";
				reg = < 0x151a9000 0x1000 0x15182248 0x08 >;
				reg-names = "base\0status-reg";
				qcom,stream-id-range = < 0x2400 0x400 >;
				qcom,regulator-names = "vdd";
				vdd-supply = < 0x151 >;
				qcom,msm-bus,name = "mnoc_sf_1_tbu";
				qcom,msm-bus,num-cases = < 0x02 >;
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x89 0x304 0x00 0x00 0x89 0x304 0x00 0x3e8 >;
				phandle = < 0x292 >;
			};
		};

		kgsl_iommu_test_device {
			compatible = "iommu-debug-test";
			iommus = < 0x152 0x07 0x00 >;
			qcom,iommu-dma = "disabled";
		};

		kgsl_iommu_coherent_test_device {
			status = "disabled";
			compatible = "iommu-debug-test";
			iommus = < 0x152 0x09 0x00 >;
			qcom,iommu-dma = "disabled";
			dma-coherent;
		};

		apps_iommu_test_device {
			compatible = "iommu-debug-test";
			iommus = < 0x43 0x21 0x00 >;
			qcom,iommu-dma = "disabled";
		};

		apps_iommu_coherent_test_device {
			compatible = "iommu-debug-test";
			iommus = < 0x43 0x23 0x00 >;
			qcom,iommu-dma = "disabled";
			dma-coherent;
		};

		pinctrl@f000000 {
			compatible = "qcom,kona-pinctrl";
			reg = < 0xf000000 0x1000000 >;
			interrupts = < 0x00 0xd0 0x04 >;
			gpio-controller;
			#gpio-cells = < 0x02 >;
			interrupt-controller;
			#interrupt-cells = < 0x02 >;
			wakeup-parent = < 0x61 >;
			irqdomain-map = < 0x00 0x00 0x61 0x4f 0x00 0x01 0x00 0x61 0x54 0x00 0x02 0x00 0x61 0x50 0x00 0x03 0x00 0x61 0x52 0x00 0x04 0x00 0x61 0x6b 0x00 0x07 0x00 0x61 0x2b 0x00 0x0b 0x00 0x61 0x2a 0x00 0x0e 0x00 0x61 0x2c 0x00 0x0f 0x00 0x61 0x34 0x00 0x13 0x00 0x61 0x43 0x00 0x17 0x00 0x61 0x44 0x00 0x18 0x00 0x61 0x69 0x00 0x1b 0x00 0x61 0x5c 0x00 0x1c 0x00 0x61 0x6a 0x00 0x1f 0x00 0x61 0x45 0x00 0x23 0x00 0x61 0x46 0x00 0x27 0x00 0x61 0x49 0x00 0x28 0x00 0x61 0x6c 0x00 0x2b 0x00 0x61 0x47 0x00 0x2d 0x00 0x61 0x48 0x00 0x2f 0x00 0x61 0x53 0x00 0x33 0x00 0x61 0x4a 0x00 0x37 0x00 0x61 0x4d 0x00 0x3b 0x00 0x61 0x4e 0x00 0x3f 0x00 0x61 0x4b 0x00 0x40 0x00 0x61 0x51 0x00 0x41 0x00 0x61 0x57 0x00 0x42 0x00 0x61 0x58 0x00 0x43 0x00 0x61 0x59 0x00 0x44 0x00 0x61 0x36 0x00 0x46 0x00 0x61 0x55 0x00 0x4d 0x00 0x61 0x2e 0x00 0x50 0x00 0x61 0x5a 0x00 0x51 0x00 0x61 0x5b 0x00 0x53 0x00 0x61 0x61 0x00 0x54 0x00 0x61 0x62 0x00 0x56 0x00 0x61 0x63 0x00 0x58 0x00 0x61 0x65 0x00 0x59 0x00 0x61 0x66 0x00 0x5c 0x00 0x61 0x67 0x00 0x5d 0x00 0x61 0x68 0x00 0x64 0x00 0x61 0x35 0x00 0x67 0x00 0x61 0x2f 0x00 0x68 0x00 0x61 0x30 0x00 0x6c 0x00 0x61 0x31 0x00 0x6d 0x00 0x61 0x5e 0x00 0x6e 0x00 0x61 0x5f 0x00 0x6f 0x00 0x61 0x60 0x00 0x70 0x00 0x61 0x37 0x00 0x71 0x00 0x61 0x38 0x00 0x76 0x00 0x61 0x32 0x00 0x79 0x00 0x61 0x33 0x00 0x7a 0x00 0x61 0x39 0x00 0x7b 0x00 0x61 0x3a 0x00 0x7c 0x00 0x61 0x2d 0x00 0x7e 0x00 0x61 0x3b 0x00 0x80 0x00 0x61 0x4c 0x00 0x81 0x00 0x61 0x56 0x00 0x84 0x00 0x61 0x5d 0x00 0x85 0x00 0x61 0x41 0x00 0x86 0x00 0x61 0x42 0x00 0x88 0x00 0x61 0x3e 0x00 0x89 0x00 0x61 0x3f 0x00 0x8a 0x00 0x61 0x40 0x00 0x8e 0x00 0x61 0x3c 0x00 0x8f 0x00 0x61 0x3d 0x00 0x93 0x00 0x61 0x6d 0x00 0x96 0x00 0x61 0x6e 0x00 0x9d 0x00 0x61 0x6f 0x00 0x9e 0x00 0x61 0x70 0x00 0xa0 0x00 0x61 0x71 0x00 0xa2 0x00 0x61 0x72 0x00 0xa4 0x00 0x61 0x73 0x00 0xa6 0x00 0x61 0x74 0x00 0xa7 0x00 0x61 0x75 0x00 0xaf 0x00 0x61 0x76 0x00 0xb1 0x00 0x61 0x77 0x00 0xb3 0x00 0x61 0x78 0x00 >;
			irqdomain-map-mask = < 0xff 0x00 >;
			irqdomain-map-pass-thru = < 0x00 0xff >;
			phandle = < 0x8b >;

			trigout_a {
				phandle = < 0x293 >;

				mux {
					pins = "gpio2";
					function = "qdss_cti";
				};

				config {
					pins = "gpio2";
					drive-strength = < 0x02 >;
					bias-disable;
				};
			};

			qupv3_se2_2uart_pins {
				phandle = < 0x294 >;

				qupv3_se2_2uart_active {
					phandle = < 0x17e >;

					mux {
						pins = "gpio117\0gpio118";
						function = "qup2";
					};

					config {
						pins = "gpio117\0gpio118";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se2_2uart_sleep {
					phandle = < 0x17f >;

					mux {
						pins = "gpio117\0gpio118";
						function = "gpio";
					};

					config {
						pins = "gpio117\0gpio118";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};
			};

			qupv3_se3_2uart_pins {
				phandle = < 0x295 >;

				qupv3_se3_2uart_active {
					phandle = < 0x181 >;

					mux {
						pins = "gpio121\0gpio122";
						function = "qup3";
					};

					config {
						pins = "gpio121\0gpio122";
						drive_strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se3_2uart_sleep_tx {
					phandle = < 0x182 >;

					mux {
						pins = "gpio121";
						function = "gpio";
					};

					config {
						pins = "gpio121";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				qupv3_se3_2uart_sleep_rx {
					phandle = < 0x183 >;

					mux {
						pins = "gpio122";
						function = "gpio";
					};

					config {
						pins = "gpio122";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};
			};

			qupv3_se5_2uart_pins {
				phandle = < 0x296 >;

				qupv3_se5_tx {
					phandle = < 0x297 >;

					mux {
						pins = "gpio14";
						function = "qup5";
					};

					config {
						pins = "gpio14";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				qupv3_se5_rx {
					phandle = < 0x298 >;

					mux {
						pins = "gpio15";
						function = "qup5";
					};

					config {
						pins = "gpio15";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			blu_uart_active {
				phandle = < 0x184 >;

				mux {
					pins = "gpio14\0gpio15";
					function = "qup5";
				};

				config {
					pins = "gpio14\0gpio15";
					drive-strength = < 0x02 >;
					bias-disable;
				};
			};

			blu_uart_sleep_tx {
				phandle = < 0x185 >;

				mux {
					pins = "gpio14";
					function = "qup5";
				};

				config {
					pins = "gpio14";
					drive-strength = < 0x02 >;
					bias-pull-up;
				};
			};

			blu_uart_sleep_rx {
				phandle = < 0x186 >;

				mux {
					pins = "gpio15";
					function = "qup5";
				};

				config {
					pins = "gpio15";
					drive-strength = < 0x02 >;
					bias-disable;
				};
			};

			qupv3_se6_4uart_pins {
				phandle = < 0x299 >;

				qupv3_se6_default_cts {
					phandle = < 0x187 >;

					mux {
						pins = "gpio16";
						function = "gpio";
					};

					config {
						pins = "gpio16";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se6_default_rtsrx {
					phandle = < 0x188 >;

					mux {
						pins = "gpio17\0gpio19";
						function = "gpio";
					};

					config {
						pins = "gpio17\0gpio19";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				qupv3_se6_default_tx {
					phandle = < 0x189 >;

					mux {
						pins = "gpio18";
						function = "gpio";
					};

					config {
						pins = "gpio18";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				qupv3_se6_ctsrx {
					phandle = < 0x18a >;

					mux {
						pins = "gpio16\0gpio19";
						function = "qup6";
					};

					config {
						pins = "gpio16\0gpio19";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se6_rts {
					phandle = < 0x18b >;

					mux {
						pins = "gpio17";
						function = "qup6";
					};

					config {
						pins = "gpio17";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				qupv3_se6_tx {
					phandle = < 0x18c >;

					mux {
						pins = "gpio18";
						function = "qup6";
					};

					config {
						pins = "gpio18";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};
			};

			qupv3_se12_2uart_pins {
				phandle = < 0x29a >;

				qupv3_se12_2uart_active {
					phandle = < 0x1ae >;

					mux {
						pins = "gpio34\0gpio35";
						function = "qup12";
					};

					config {
						pins = "gpio34\0gpio35";
						drive-strength = < 0x02 >;
					};
				};

				qupv3_se12_2uart_sleep {
					phandle = < 0x1af >;

					mux {
						pins = "gpio34\0gpio35";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};

					config {
						pins = "gpio34\0gpio35";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};
			};

			qupv3_se13_2uart_pins {
				phandle = < 0x29b >;

				qupv3_se13_2uart_active {
					phandle = < 0x1b1 >;

					mux {
						pins = "gpio38\0gpio39";
						function = "qup13";
					};

					config {
						pins = "gpio38\0gpio39";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se13_2uart_tx {
					phandle = < 0x1b2 >;

					mux {
						pins = "gpio38";
						function = "qup13";
					};

					config {
						pins = "gpio38";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				qupv3_se13_2uart_rx {
					phandle = < 0x1b3 >;

					mux {
						pins = "gpio39";
						function = "qup13";
					};

					config {
						pins = "gpio39";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};
			};

			qupv3_se17_4uart_pins {
				phandle = < 0x29c >;

				qupv3_se17_ctsrx {
					phandle = < 0x1cc >;

					mux {
						pins = "gpio52\0gpio55";
						function = "qup17";
					};

					config {
						pins = "gpio52\0gpio55";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};

				qupv3_se17_rts {
					phandle = < 0x1cd >;

					mux {
						pins = "gpio53";
						function = "qup17";
					};

					config {
						pins = "gpio53";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				qupv3_se17_tx {
					phandle = < 0x1ce >;

					mux {
						pins = "gpio54";
						function = "qup17";
					};

					config {
						pins = "gpio54";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};
			};

			qupv3_se18_2uart_pins {
				phandle = < 0x29d >;

				qupv3_se18_rx {
					phandle = < 0x1d0 >;

					mux {
						pins = "gpio59";
						function = "qup18";
					};

					config {
						pins = "gpio59";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};

				qupv3_se18_tx {
					phandle = < 0x1d1 >;

					mux {
						pins = "gpio58";
						function = "qup18";
					};

					config {
						pins = "gpio58";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};
			};

			pmx_ts_active {

				ts_active {
					phandle = < 0x29e >;

					mux {
						pins = "gpio38\0gpio39";
						function = "gpio";
					};

					config {
						pins = "gpio38\0gpio39";
						drive-strength = < 0x08 >;
						bias-pull-up;
					};
				};
			};

			pmx_ts_int_suspend {

				ts_int_suspend {
					phandle = < 0x29f >;

					mux {
						pins = "gpio39";
						function = "gpio";
					};

					config {
						pins = "gpio39";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};
			};

			pmx_ts_reset_suspend {

				ts_reset_suspend {
					phandle = < 0x2a0 >;

					mux {
						pins = "gpio38";
						function = "gpio";
					};

					config {
						pins = "gpio38";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};
			};

			pmx_ts_release {

				pmx_ts_release {
					phandle = < 0x2a1 >;

					mux {
						pins = "gpio38\0gpio39";
						function = "gpio";
					};

					config {
						pins = "gpio38\0gpio39";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};
			};

			ufs_dev_reset_assert {
				phandle = < 0x65 >;

				config {
					pins = "ufs_reset";
					bias-pull-down;
					drive-strength = < 0x08 >;
					output-low;
				};
			};

			ufs_dev_reset_deassert {
				phandle = < 0x66 >;

				config {
					pins = "ufs_reset";
					bias-pull-down;
					drive-strength = < 0x08 >;
					output-high;
				};
			};

			storage_cd {
				phandle = < 0x2a2 >;

				mux {
					pins = "gpio77";
					function = "gpio";
				};

				config {
					pins = "gpio77";
					bias-pull-up;
					drive-strength = < 0x02 >;
				};
			};

			sdc2_clk_on {
				phandle = < 0x2a3 >;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_clk_off {
				phandle = < 0x2a4 >;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			sdc2_clk_ds_400KHz {
				phandle = < 0x2a5 >;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_clk_ds_50MHz {
				phandle = < 0x2a6 >;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_clk_ds_100MHz {
				phandle = < 0x2a7 >;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_clk_ds_200MHz {
				phandle = < 0x2a8 >;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_cmd_on {
				phandle = < 0x2a9 >;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_cmd_off {
				phandle = < 0x2aa >;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = < 0x02 >;
				};
			};

			sdc2_cmd_ds_400KHz {
				phandle = < 0x2ab >;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_cmd_ds_50MHz {
				phandle = < 0x2ac >;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_cmd_ds_100MHz {
				phandle = < 0x2ad >;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_cmd_ds_200MHz {
				phandle = < 0x2ae >;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_data_on {
				phandle = < 0x2af >;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_data_off {
				phandle = < 0x2b0 >;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = < 0x02 >;
				};
			};

			sdc2_data_ds_400KHz {
				phandle = < 0x2b1 >;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_data_ds_50MHz {
				phandle = < 0x2b2 >;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_data_ds_100MHz {
				phandle = < 0x2b3 >;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sdc2_data_ds_200MHz {
				phandle = < 0x2b4 >;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = < 0x10 >;
				};
			};

			sde_dp_usbplug_cc_active {
				phandle = < 0x2b5 >;

				mux {
					pins = "gpio65";
					function = "gpio";
				};

				config {
					pins = "gpio65";
					bias-disable;
					drive-strength = < 0x10 >;
				};
			};

			sde_dp_usbplug_cc_suspend {
				phandle = < 0x2b6 >;

				mux {
					pins = "gpio65";
					function = "gpio";
				};

				config {
					pins = "gpio65";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			pcie0 {

				pcie0_perst_default {
					phandle = < 0x147 >;

					mux {
						pins = "gpio79";
						function = "gpio";
					};

					config {
						pins = "gpio79";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				pcie0_clkreq_default {
					phandle = < 0x146 >;

					mux {
						pins = "gpio80";
						function = "pci_e0";
					};

					config {
						pins = "gpio80";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				pcie0_wake_default {
					phandle = < 0x148 >;

					mux {
						pins = "gpio81";
						function = "gpio";
					};

					config {
						pins = "gpio81";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				pcie0_clkreq_sleep {
					phandle = < 0x149 >;

					mux {
						pins = "gpio80";
						function = "gpio";
					};

					config {
						pins = "gpio80";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};
			};

			cnss_pins {

				cnss_wlan_en_active {
					phandle = < 0x8c >;

					mux {
						pins = "gpio20";
						function = "gpio";
					};

					config {
						pins = "gpio20";
						drive-strength = < 0x10 >;
						output-high;
						bias-pull-up;
					};
				};

				cnss_wlan_en_sleep {
					phandle = < 0x8d >;

					mux {
						pins = "gpio20";
						function = "gpio";
					};

					config {
						pins = "gpio20";
						drive-strength = < 0x02 >;
						output-low;
						bias-pull-down;
					};
				};
			};

			pmx_sde {
				phandle = < 0x2b7 >;

				sde_dsi_active {
					phandle = < 0x2b8 >;

					mux {
						pins = "gpio75\0gpio60";
						function = "gpio";
					};

					config {
						pins = "gpio75\0gpio60";
						drive-strength = < 0x08 >;
						bias-disable = < 0x00 >;
					};
				};

				sde_dsi_suspend {
					phandle = < 0x2b9 >;

					mux {
						pins = "gpio75\0gpio60";
						function = "gpio";
					};

					config {
						pins = "gpio75\0gpio60";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				sde_dsi1_active {
					phandle = < 0x2ba >;

					mux {
						pins = "gpio128";
						function = "gpio";
					};

					config {
						pins = "gpio128";
						drive-strength = < 0x08 >;
						bias-disable = < 0x00 >;
					};
				};

				sde_dsi1_suspend {
					phandle = < 0x2bb >;

					mux {
						pins = "gpio128";
						function = "gpio";
					};

					config {
						pins = "gpio128";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};
			};

			pmx_sde_te {

				sde_te_active {
					phandle = < 0x2bc >;

					mux {
						pins = "gpio66";
						function = "mdp_vsync";
					};

					config {
						pins = "gpio66";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				sde_te_suspend {
					phandle = < 0x2bd >;

					mux {
						pins = "gpio66";
						function = "mdp_vsync";
					};

					config {
						pins = "gpio66";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				sde_te1_active {
					phandle = < 0x2be >;

					mux {
						pins = "gpio67";
						function = "mdp_vsync";
					};

					config {
						pins = "gpio67";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};

				sde_te1_suspend {
					phandle = < 0x2bf >;

					mux {
						pins = "gpio67";
						function = "mdp_vsync";
					};

					config {
						pins = "gpio67";
						drive-strength = < 0x02 >;
						bias-pull-down;
					};
				};
			};

			pri_aux_pcm_clk {

				pri_aux_pcm_clk_sleep {
					phandle = < 0x2c0 >;

					mux {
						pins = "gpio138";
						function = "gpio";
					};

					config {
						pins = "gpio138";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_aux_pcm_clk_active {
					phandle = < 0x2c1 >;

					mux {
						pins = "gpio138";
						function = "mi2s0_sck";
					};

					config {
						pins = "gpio138";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_aux_pcm_sync {

				pri_aux_pcm_sync_sleep {
					phandle = < 0x2c2 >;

					mux {
						pins = "gpio141";
						function = "gpio";
					};

					config {
						pins = "gpio141";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_aux_pcm_sync_active {
					phandle = < 0x2c3 >;

					mux {
						pins = "gpio141";
						function = "mi2s0_ws";
					};

					config {
						pins = "gpio141";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_aux_pcm_din {

				pri_aux_pcm_din_sleep {
					phandle = < 0x2c4 >;

					mux {
						pins = "gpio139";
						function = "gpio";
					};

					config {
						pins = "gpio139";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_aux_pcm_din_active {
					phandle = < 0x2c5 >;

					mux {
						pins = "gpio139";
						function = "mi2s0_data0";
					};

					config {
						pins = "gpio139";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			pri_aux_pcm_dout {

				pri_aux_pcm_dout_sleep {
					phandle = < 0x2c6 >;

					mux {
						pins = "gpio140";
						function = "gpio";
					};

					config {
						pins = "gpio140";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_aux_pcm_dout_active {
					phandle = < 0x2c7 >;

					mux {
						pins = "gpio140";
						function = "mi2s0_data1";
					};

					config {
						pins = "gpio140";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_aux_pcm {

				sec_aux_pcm_clk_sleep {
					phandle = < 0x2c8 >;

					mux {
						pins = "gpio142";
						function = "gpio";
					};

					config {
						pins = "gpio142";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_aux_pcm_clk_active {
					phandle = < 0x2c9 >;

					mux {
						pins = "gpio142";
						function = "mi2s1_sck";
					};

					config {
						pins = "gpio142";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};

				sec_aux_pcm_ws_sleep {
					phandle = < 0x2ca >;

					mux {
						pins = "gpio145";
						function = "gpio";
					};

					config {
						pins = "gpio145";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_aux_pcm_ws_active {
					phandle = < 0x2cb >;

					mux {
						pins = "gpio145";
						function = "mi2s1_ws";
					};

					config {
						pins = "gpio145";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_aux_pcm_din {

				sec_aux_pcm_din_sleep {
					phandle = < 0x2cc >;

					mux {
						pins = "gpio143";
						function = "gpio";
					};

					config {
						pins = "gpio143";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_aux_pcm_din_active {
					phandle = < 0x2cd >;

					mux {
						pins = "gpio143";
						function = "mi2s1_data0";
					};

					config {
						pins = "gpio143";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_aux_pcm_dout {

				sec_aux_pcm_dout_sleep {
					phandle = < 0x2ce >;

					mux {
						pins = "gpio144";
						function = "gpio";
					};

					config {
						pins = "gpio144";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_aux_pcm_dout_active {
					phandle = < 0x2cf >;

					mux {
						pins = "gpio144";
						function = "mi2s1_data1";
					};

					config {
						pins = "gpio144";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_aux_pcm {

				tert_aux_pcm_clk_sleep {
					phandle = < 0x2d0 >;

					mux {
						pins = "gpio133";
						function = "gpio";
					};

					config {
						pins = "gpio133";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_aux_pcm_clk_active {
					phandle = < 0x2d1 >;

					mux {
						pins = "gpio133";
						function = "mi2s2_sck";
					};

					config {
						pins = "gpio133";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};

				tert_aux_pcm_ws_sleep {
					phandle = < 0x2d2 >;

					mux {
						pins = "gpio135";
						function = "gpio";
					};

					config {
						pins = "gpio135";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_aux_pcm_ws_active {
					phandle = < 0x2d3 >;

					mux {
						pins = "gpio135";
						function = "mi2s2_ws";
					};

					config {
						pins = "gpio135";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			tert_aux_pcm_din {

				tert_aux_pcm_din_sleep {
					phandle = < 0x2d4 >;

					mux {
						pins = "gpio134";
						function = "gpio";
					};

					config {
						pins = "gpio134";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_aux_pcm_din_active {
					phandle = < 0x2d5 >;

					mux {
						pins = "gpio134";
						function = "mi2s2_data0";
					};

					config {
						pins = "gpio134";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_aux_pcm_dout {

				tert_aux_pcm_dout_sleep {
					phandle = < 0x2d6 >;

					mux {
						pins = "gpio137";
						function = "gpio";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_aux_pcm_dout_active {
					phandle = < 0x2d7 >;

					mux {
						pins = "gpio137";
						function = "mi2s2_data1";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			pri_tdm_clk {

				pri_tdm_clk_sleep {
					phandle = < 0x2d8 >;

					mux {
						pins = "gpio138";
						function = "gpio";
					};

					config {
						pins = "gpio138";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_tdm_clk_active {
					phandle = < 0x2d9 >;

					mux {
						pins = "gpio138";
						function = "mi2s0_sck";
					};

					config {
						pins = "gpio138";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_tdm_sync {

				pri_tdm_sync_sleep {
					phandle = < 0x2da >;

					mux {
						pins = "gpio141";
						function = "gpio";
					};

					config {
						pins = "gpio141";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_tdm_sync_active {
					phandle = < 0x2db >;

					mux {
						pins = "gpio141";
						function = "mi2s0_ws";
					};

					config {
						pins = "gpio141";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_tdm_din {

				pri_tdm_din_sleep {
					phandle = < 0x2dc >;

					mux {
						pins = "gpio139";
						function = "gpio";
					};

					config {
						pins = "gpio139";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_tdm_din_active {
					phandle = < 0x2dd >;

					mux {
						pins = "gpio139";
						function = "mi2s0_data0";
					};

					config {
						pins = "gpio139";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			pri_tdm_dout {

				pri_tdm_dout_sleep {
					phandle = < 0x2de >;

					mux {
						pins = "gpio140";
						function = "gpio";
					};

					config {
						pins = "gpio140";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_tdm_dout_active {
					phandle = < 0x2df >;

					mux {
						pins = "gpio140";
						function = "mi2s0_data1";
					};

					config {
						pins = "gpio140";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_tdm {

				sec_tdm_sck_sleep {
					phandle = < 0x2e0 >;

					mux {
						pins = "gpio142";
						function = "gpio";
					};

					config {
						pins = "gpio142";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_tdm_sck_active {
					phandle = < 0x2e1 >;

					mux {
						pins = "gpio142";
						function = "mi2s1_sck";
					};

					config {
						pins = "gpio142";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};

				sec_tdm_ws_sleep {
					phandle = < 0x2e2 >;

					mux {
						pins = "gpio145";
						function = "gpio";
					};

					config {
						pins = "gpio145";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_tdm_ws_active {
					phandle = < 0x2e3 >;

					mux {
						pins = "gpio145";
						function = "mi2s1_ws";
					};

					config {
						pins = "gpio145";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_tdm_din {

				sec_tdm_din_sleep {
					phandle = < 0x2e4 >;

					mux {
						pins = "gpio143";
						function = "gpio";
					};

					config {
						pins = "gpio143";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_tdm_din_active {
					phandle = < 0x2e5 >;

					mux {
						pins = "gpio143";
						function = "mi2s1_data0";
					};

					config {
						pins = "gpio143";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_tdm_dout {

				sec_tdm_dout_sleep {
					phandle = < 0x2e6 >;

					mux {
						pins = "gpio144";
						function = "gpio";
					};

					config {
						pins = "gpio144";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_tdm_dout_active {
					phandle = < 0x2e7 >;

					mux {
						pins = "gpio144";
						function = "mi2s1_data1";
					};

					config {
						pins = "gpio144";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_tdm {

				tert_tdm_clk_sleep {
					phandle = < 0x2e8 >;

					mux {
						pins = "gpio133";
						function = "gpio";
					};

					config {
						pins = "gpio133";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_tdm_clk_active {
					phandle = < 0x2e9 >;

					mux {
						pins = "gpio133";
						function = "mi2s2_sck";
					};

					config {
						pins = "gpio133";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};

				tert_tdm_ws_sleep {
					phandle = < 0x2ea >;

					mux {
						pins = "gpio135";
						function = "gpio";
					};

					config {
						pins = "gpio135";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_tdm_ws_active {
					phandle = < 0x2eb >;

					mux {
						pins = "gpio135";
						function = "mi2s2_ws";
					};

					config {
						pins = "gpio135";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			tert_tdm_din {

				tert_tdm_din_sleep {
					phandle = < 0x2ec >;

					mux {
						pins = "gpio134";
						function = "gpio";
					};

					config {
						pins = "gpio134";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_tdm_din_active {
					phandle = < 0x2ed >;

					mux {
						pins = "gpio134";
						function = "mi2s2_data0";
					};

					config {
						pins = "gpio134";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_tdm_dout {

				tert_tdm_dout_sleep {
					phandle = < 0x2ee >;

					mux {
						pins = "gpio137";
						function = "gpio";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_tdm_dout_active {
					phandle = < 0x2ef >;

					mux {
						pins = "gpio137";
						function = "mi2s2_data1";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			pri_mi2s_mclk {

				pri_mi2s_mclk_sleep {
					phandle = < 0x2f0 >;

					mux {
						pins = "gpio136";
						function = "gpio";
					};

					config {
						pins = "gpio136";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_mclk_active {
					phandle = < 0x2f1 >;

					mux {
						pins = "gpio136";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio136";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_mi2s_sck {

				pri_mi2s_sck_sleep {
					phandle = < 0x2f2 >;

					mux {
						pins = "gpio138";
						function = "gpio";
					};

					config {
						pins = "gpio138";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_sck_active {
					phandle = < 0x2f3 >;

					mux {
						pins = "gpio138";
						function = "mi2s0_sck";
					};

					config {
						pins = "gpio138";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_mi2s_ws {

				pri_mi2s_ws_sleep {
					phandle = < 0x2f4 >;

					mux {
						pins = "gpio141";
						function = "gpio";
					};

					config {
						pins = "gpio141";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_ws_active {
					phandle = < 0x2f5 >;

					mux {
						pins = "gpio141";
						function = "mi2s0_ws";
					};

					config {
						pins = "gpio141";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_mi2s_sd0 {

				pri_mi2s_sd0_sleep {
					phandle = < 0x2f6 >;

					mux {
						pins = "gpio139";
						function = "gpio";
					};

					config {
						pins = "gpio139";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_sd0_active {
					phandle = < 0x2f7 >;

					mux {
						pins = "gpio139";
						function = "mi2s0_data0";
					};

					config {
						pins = "gpio139";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			pri_mi2s_sd1 {

				pri_mi2s_sd1_sleep {
					phandle = < 0x2f8 >;

					mux {
						pins = "gpio140";
						function = "gpio";
					};

					config {
						pins = "gpio140";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_sd1_active {
					phandle = < 0x2f9 >;

					mux {
						pins = "gpio140";
						function = "mi2s0_data1";
					};

					config {
						pins = "gpio140";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			sec_mi2s_mclk {

				sec_mi2s_mclk_sleep {
					phandle = < 0x2fa >;

					mux {
						pins = "gpio137";
						function = "gpio";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_mi2s_mclk_active {
					phandle = < 0x2fb >;

					mux {
						pins = "gpio137";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x08 >;
						bias-disable;
						output-high;
					};
				};
			};

			sec_mi2s_sck {

				sec_mi2s_sck_sleep {
					phandle = < 0x2fc >;

					mux {
						pins = "gpio142";
						function = "gpio";
					};

					config {
						pins = "gpio142";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_mi2s_sck_active {
					phandle = < 0x2fd >;

					mux {
						pins = "gpio142";
						function = "mi2s1_sck";
					};

					config {
						pins = "gpio142";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_mi2s_ws {

				sec_mi2s_ws_sleep {
					phandle = < 0x2fe >;

					mux {
						pins = "gpio145";
						function = "gpio";
					};

					config {
						pins = "gpio145";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_mi2s_ws_active {
					phandle = < 0x2ff >;

					mux {
						pins = "gpio145";
						function = "mi2s1_ws";
					};

					config {
						pins = "gpio145";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_mi2s_sd0 {

				sec_mi2s_sd0_sleep {
					phandle = < 0x300 >;

					mux {
						pins = "gpio143";
						function = "gpio";
					};

					config {
						pins = "gpio143";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_mi2s_sd0_active {
					phandle = < 0x301 >;

					mux {
						pins = "gpio143";
						function = "mi2s1_data0";
					};

					config {
						pins = "gpio143";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			sec_mi2s_sd1 {

				sec_mi2s_sd1_sleep {
					phandle = < 0x302 >;

					mux {
						pins = "gpio144";
						function = "gpio";
					};

					config {
						pins = "gpio144";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				sec_mi2s_sd1_active {
					phandle = < 0x303 >;

					mux {
						pins = "gpio144";
						function = "mi2s1_data1";
					};

					config {
						pins = "gpio144";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_mi2s_sck {

				tert_mi2s_sck_sleep {
					phandle = < 0x304 >;

					mux {
						pins = "gpio133";
						function = "gpio";
					};

					config {
						pins = "gpio133";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_mi2s_sck_active {
					phandle = < 0x305 >;

					mux {
						pins = "gpio133";
						function = "mi2s2_sck";
					};

					config {
						pins = "gpio133";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_mi2s_ws {

				tert_mi2s_ws_sleep {
					phandle = < 0x306 >;

					mux {
						pins = "gpio135";
						function = "gpio";
					};

					config {
						pins = "gpio135";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_mi2s_ws_active {
					phandle = < 0x307 >;

					mux {
						pins = "gpio135";
						function = "mi2s2_ws";
					};

					config {
						pins = "gpio135";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_mi2s_sd0 {

				tert_mi2s_sd0_sleep {
					phandle = < 0x308 >;

					mux {
						pins = "gpio134";
						function = "gpio";
					};

					config {
						pins = "gpio134";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_mi2s_sd0_active {
					phandle = < 0x309 >;

					mux {
						pins = "gpio134";
						function = "mi2s2_data0";
					};

					config {
						pins = "gpio134";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			tert_mi2s_sd1 {

				tert_mi2s_sd1_sleep {
					phandle = < 0x30a >;

					mux {
						pins = "gpio137";
						function = "gpio";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				tert_mi2s_sd1_active {
					phandle = < 0x30b >;

					mux {
						pins = "gpio137";
						function = "mi2s2_data1";
					};

					config {
						pins = "gpio137";
						drive-strength = < 0x08 >;
						bias-disable;
					};
				};
			};

			spkr_1_sd_n {

				spkr_1_sd_n_sleep {
					phandle = < 0x30c >;

					mux {
						pins = "gpio26";
						function = "gpio";
					};

					config {
						pins = "gpio26";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				spkr_1_sd_n_active {
					phandle = < 0x30d >;

					mux {
						pins = "gpio26";
						function = "gpio";
					};

					config {
						pins = "gpio26";
						drive-strength = < 0x10 >;
						bias-disable;
						output-high;
					};
				};
			};

			spkr_2_sd_n {

				spkr_2_sd_n_sleep {
					phandle = < 0x30e >;

					mux {
						pins = "gpio127";
						function = "gpio";
					};

					config {
						pins = "gpio127";
						drive-strength = < 0x02 >;
						bias-pull-down;
						input-enable;
					};
				};

				spkr_2_sd_n_active {
					phandle = < 0x30f >;

					mux {
						pins = "gpio127";
						function = "gpio";
					};

					config {
						pins = "gpio127";
						drive-strength = < 0x10 >;
						bias-disable;
						output-high;
					};
				};
			};

			wcd938x_reset_active {
				phandle = < 0x310 >;

				mux {
					pins = "gpio32";
					function = "func2";
				};

				config {
					pins = "gpio32";
					drive-strength = < 0x10 >;
					output-high;
				};
			};

			wcd938x_reset_sleep {
				phandle = < 0x311 >;

				mux {
					pins = "gpio32";
					function = "func2";
				};

				config {
					pins = "gpio32";
					drive-strength = < 0x10 >;
					bias-disable;
					output-low;
				};
			};

			cam_sensor_mclk0_active {
				phandle = < 0x312 >;

				mux {
					pins = "gpio94";
					function = "cam_mclk";
				};

				config {
					pins = "gpio94";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk0_suspend {
				phandle = < 0x313 >;

				mux {
					pins = "gpio94";
					function = "cam_mclk";
				};

				config {
					pins = "gpio94";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk1_active {
				phandle = < 0x314 >;

				mux {
					pins = "gpio95";
					function = "cam_mclk";
				};

				config {
					pins = "gpio95";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk1_suspend {
				phandle = < 0x315 >;

				mux {
					pins = "gpio95";
					function = "cam_mclk";
				};

				config {
					pins = "gpio95";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk2_active {
				phandle = < 0x316 >;

				mux {
					pins = "gpio96";
					function = "cam_mclk";
				};

				config {
					pins = "gpio96";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk2_suspend {
				phandle = < 0x317 >;

				mux {
					pins = "gpio96";
					function = "cam_mclk";
				};

				config {
					pins = "gpio96";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk3_active {
				phandle = < 0x318 >;

				mux {
					pins = "gpio97";
					function = "cam_mclk";
				};

				config {
					pins = "gpio97";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk3_suspend {
				phandle = < 0x319 >;

				mux {
					pins = "gpio97";
					function = "cam_mclk";
				};

				config {
					pins = "gpio97";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk4_active {
				phandle = < 0x31a >;

				mux {
					pins = "gpio98";
					function = "cam_mclk";
				};

				config {
					pins = "gpio98";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk4_suspend {
				phandle = < 0x31b >;

				mux {
					pins = "gpio98";
					function = "cam_mclk";
				};

				config {
					pins = "gpio98";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk5_active {
				phandle = < 0x31c >;

				mux {
					pins = "gpio99";
					function = "cam_mclk";
				};

				config {
					pins = "gpio99";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk5_suspend {
				phandle = < 0x31d >;

				mux {
					pins = "gpio99";
					function = "cam_mclk";
				};

				config {
					pins = "gpio99";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk6_active {
				phandle = < 0x31e >;

				mux {
					pins = "gpio100";
					function = "cam_mclk";
				};

				config {
					pins = "gpio100";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_mclk6_suspend {
				phandle = < 0x31f >;

				mux {
					pins = "gpio100";
					function = "cam_mclk";
				};

				config {
					pins = "gpio100";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_active_rst4 {
				phandle = < 0x320 >;

				mux {
					pins = "gpio25";
					function = "gpio";
				};

				config {
					pins = "gpio25";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_suspend_rst4 {
				phandle = < 0x321 >;

				mux {
					pins = "gpio25";
					function = "gpio";
				};

				config {
					pins = "gpio25";
					bias-pull-down;
					drive-strength = < 0x02 >;
					output-low;
				};
			};

			cam_sensor_active_rst3 {
				phandle = < 0x322 >;

				mux {
					pins = "gpio144";
					function = "gpio";
				};

				config {
					pins = "gpio144";
					bias-disable;
					drive-strength = < 0x02 >;
				};
			};

			cam_sensor_suspend_rst3 {
				phandle = < 0x323 >;

				mux {
					pins = "gpio144";
					function = "gpio";
				};

				config {
					pins = "gpio144";
					bias-pull-down;
					drive-strength = < 0x02 >;
					output-low;
				};
			};

			cci0_active {
				phandle = < 0x161 >;

				mux {
					pins = "gpio101\0gpio102";
					function = "cci_i2c";
				};

				config {
					pins = "gpio101\0gpio102";
					bias-pull-up;
					drive-strength = < 0x02 >;
				};
			};

			cci0_suspend {
				phandle = < 0x163 >;

				mux {
					pins = "gpio101\0gpio102";
					function = "cci_i2c";
				};

				config {
					pins = "gpio101\0gpio102";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cci1_active {
				phandle = < 0x162 >;

				mux {
					pins = "gpio103\0gpio104";
					function = "cci_i2c";
				};

				config {
					pins = "gpio103\0gpio104";
					bias-pull-up;
					drive-strength = < 0x02 >;
				};
			};

			cci1_suspend {
				phandle = < 0x164 >;

				mux {
					pins = "gpio103\0gpio104";
					function = "cci_i2c";
				};

				config {
					pins = "gpio103\0gpio104";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cci2_active {
				phandle = < 0x165 >;

				mux {
					pins = "gpio105\0gpio106";
					function = "cci_i2c";
				};

				config {
					pins = "gpio105\0gpio106";
					bias-pull-up;
					drive-strength = < 0x02 >;
				};
			};

			cci2_suspend {
				phandle = < 0x167 >;

				mux {
					pins = "gpio105\0gpio106";
					function = "cci_i2c";
				};

				config {
					pins = "gpio105\0gpio106";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			cci3_active {
				phandle = < 0x166 >;

				mux {
					pins = "gpio107\0gpio108";
					function = "cci_i2c";
				};

				config {
					pins = "gpio107\0gpio108";
					bias-pull-up;
					drive-strength = < 0x02 >;
				};
			};

			cci3_suspend {
				phandle = < 0x168 >;

				mux {
					pins = "gpio107\0gpio108";
					function = "cci_i2c";
				};

				config {
					pins = "gpio107\0gpio108";
					bias-pull-down;
					drive-strength = < 0x02 >;
				};
			};

			sde_led_driver_en1_gpio {
				phandle = < 0x324 >;

				mux {
					pins = "gpio144";
					function = "gpio";
				};

				config {
					pins = "gpio144";
					bias-pull-down;
					drive-strength = < 0x10 >;
				};
			};

			sde_led_driver_en2_gpio {
				phandle = < 0x325 >;

				mux {
					pins = "gpio140";
					function = "gpio";
				};

				config {
					pins = "gpio140";
					bias-pull-down;
					drive-strength = < 0x10 >;
				};
			};

			sde_led_5v_en_gpio {
				phandle = < 0x326 >;

				mux {
					pins = "gpio134";
					function = "gpio";
				};

				config {
					pins = "gpio134";
					bias-pull-down;
					drive-strength = < 0x10 >;
				};
			};

			sde_display_1p8_en_gpio {
				phandle = < 0x327 >;

				mux {
					pins = "gpio133";
					function = "gpio";
				};

				config {
					pins = "gpio133";
					bias-pull-down;
					drive-strength = < 0x10 >;
				};
			};

			bt_en_sleep {
				phandle = < 0x328 >;

				mux {
					pins = "gpio21";
					function = "gpio";
				};

				config {
					pins = "gpio21";
					drive-strength = < 0x02 >;
					output-low;
					bias-pull-down;
				};
			};

			qupv3_se0_i2c_pins {
				phandle = < 0x329 >;

				qupv3_se0_i2c_active {
					phandle = < 0x18e >;

					mux {
						pins = "gpio28\0gpio29";
						function = "qup0";
					};

					config {
						pins = "gpio28\0gpio29";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se0_i2c_sleep {
					phandle = < 0x18f >;

					mux {
						pins = "gpio28\0gpio29";
						function = "gpio";
					};

					config {
						pins = "gpio28\0gpio29";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se1_i2c_pins {
				phandle = < 0x32a >;

				qupv3_se1_i2c_active {
					phandle = < 0x190 >;

					mux {
						pins = "gpio4\0gpio5";
						function = "qup1";
					};

					config {
						pins = "gpio4\0gpio5";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se1_i2c_sleep {
					phandle = < 0x191 >;

					mux {
						pins = "gpio4\0gpio5";
						function = "gpio";
					};

					config {
						pins = "gpio4\0gpio5";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			lt9611_pins {
				phandle = < 0x32b >;

				mux {
					pins = "gpio2\0gpio1";
					function = "gpio";
				};

				config {
					pins = "gpio2\0gpio1";
					drive-strength = < 0x08 >;
					bias-disable = < 0x00 >;
				};
			};

			nfc {

				nfc_int_active {
					phandle = < 0x32c >;

					mux {
						pins = "gpio111";
						function = "gpio";
					};

					config {
						pins = "gpio111";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				nfc_int_suspend {
					phandle = < 0x32d >;

					mux {
						pins = "gpio111";
						function = "gpio";
					};

					config {
						pins = "gpio111";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				nfc_enable_active {
					phandle = < 0x32e >;

					mux {
						pins = "gpio6\0gpio110";
						function = "gpio";
					};

					config {
						pins = "gpio6\0gpio110";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				nfc_enable_suspend {
					phandle = < 0x32f >;

					mux {
						pins = "gpio6\0gpio110";
						function = "gpio";
					};

					config {
						pins = "gpio6\0gpio110";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				nfc_clk_req_active {
					phandle = < 0x330 >;

					mux {
						pins = "gpio7";
						function = "gpio";
					};

					config {
						pins = "gpio7";
						drive-strength = < 0x02 >;
						bias-pull-up;
					};
				};

				nfc_clk_req_suspend {
					phandle = < 0x331 >;

					mux {
						pins = "gpio7";
						function = "gpio";
					};

					config {
						pins = "gpio7";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};
			};

			qupv3_se2_i2c_pins {
				phandle = < 0x332 >;

				qupv3_se2_i2c_active {
					phandle = < 0x192 >;

					mux {
						pins = "gpio115\0gpio116";
						function = "qup2";
					};

					config {
						pins = "gpio115\0gpio116";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se2_i2c_sleep {
					phandle = < 0x193 >;

					mux {
						pins = "gpio115\0gpio116";
						function = "gpio";
					};

					config {
						pins = "gpio115\0gpio116";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se3_i2c_pins {
				phandle = < 0x333 >;

				qupv3_se3_i2c_active {
					phandle = < 0x194 >;

					mux {
						pins = "gpio119\0gpio120";
						function = "qup3";
					};

					config {
						pins = "gpio119\0gpio120";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se3_i2c_sleep {
					phandle = < 0x195 >;

					mux {
						pins = "gpio119\0gpio120";
						function = "gpio";
					};

					config {
						pins = "gpio119\0gpio120";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se4_i2c_pins {
				phandle = < 0x334 >;

				qupv3_se4_i2c_active {
					phandle = < 0x196 >;

					mux {
						pins = "gpio8\0gpio9";
						function = "qup4";
					};

					config {
						pins = "gpio8\0gpio9";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se4_i2c_sleep {
					phandle = < 0x197 >;

					mux {
						pins = "gpio8\0gpio9";
						function = "gpio";
					};

					config {
						pins = "gpio8\0gpio9";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se5_i2c_pins {
				phandle = < 0x335 >;

				qupv3_se5_i2c_active {
					phandle = < 0x198 >;

					mux {
						pins = "gpio12\0gpio13";
						function = "qup5";
					};

					config {
						pins = "gpio12\0gpio13";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se5_i2c_sleep {
					phandle = < 0x199 >;

					mux {
						pins = "gpio12\0gpio13";
						function = "gpio";
					};

					config {
						pins = "gpio12\0gpio13";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se6_i2c_pins {
				phandle = < 0x336 >;

				qupv3_se6_i2c_active {
					phandle = < 0x19a >;

					mux {
						pins = "gpio16\0gpio17";
						function = "qup6";
					};

					config {
						pins = "gpio16\0gpio17";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se6_i2c_sleep {
					phandle = < 0x19b >;

					mux {
						pins = "gpio16\0gpio17";
						function = "gpio";
					};

					config {
						pins = "gpio16\0gpio17";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se7_i2c_pins {
				phandle = < 0x337 >;

				qupv3_se7_i2c_active {
					phandle = < 0x19c >;

					mux {
						pins = "gpio20\0gpio21";
						function = "qup7";
					};

					config {
						pins = "gpio20\0gpio21";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se7_i2c_sleep {
					phandle = < 0x19d >;

					mux {
						pins = "gpio20\0gpio21";
						function = "gpio";
					};

					config {
						pins = "gpio20\0gpio21";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se0_spi_pins {
				phandle = < 0x338 >;

				qupv3_se0_spi_active {
					phandle = < 0x19e >;

					mux {
						pins = "gpio28\0gpio29\0gpio30\0gpio31";
						function = "qup0";
					};

					config {
						pins = "gpio28\0gpio29\0gpio30\0gpio31";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se0_spi_sleep {
					phandle = < 0x19f >;

					mux {
						pins = "gpio28\0gpio29\0gpio30\0gpio31";
						function = "gpio";
					};

					config {
						pins = "gpio28\0gpio29\0gpio30\0gpio31";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se1_spi_pins {
				phandle = < 0x339 >;

				qupv3_se1_spi_active {
					phandle = < 0x1a0 >;

					mux {
						pins = "gpio4\0gpio5\0gpio6\0gpio7";
						function = "qup1";
					};

					config {
						pins = "gpio4\0gpio5\0gpio6\0gpio7";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se1_spi_sleep {
					phandle = < 0x1a1 >;

					mux {
						pins = "gpio4\0gpio5\0gpio6\0gpio7";
						function = "gpio";
					};

					config {
						pins = "gpio4\0gpio5\0gpio6\0gpio7";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se2_spi_pins {
				phandle = < 0x33a >;

				qupv3_se2_spi_active {
					phandle = < 0x1a2 >;

					mux {
						pins = "gpio115\0gpio116\0gpio117\0gpio118";
						function = "qup2";
					};

					config {
						pins = "gpio115\0gpio116\0gpio117\0gpio118";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se2_spi_sleep {
					phandle = < 0x1a3 >;

					mux {
						pins = "gpio115\0gpio116\0gpio117\0gpio118";
						function = "gpio";
					};

					config {
						pins = "gpio115\0gpio116\0gpio117\0gpio118";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se3_spi_pins {
				phandle = < 0x33b >;

				qupv3_se3_spi_active {
					phandle = < 0x1a4 >;

					mux {
						pins = "gpio119\0gpio120\0gpio121\0gpio122";
						function = "qup3";
					};

					config {
						pins = "gpio119\0gpio120\0gpio121\0gpio122";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se3_spi_sleep {
					phandle = < 0x1a5 >;

					mux {
						pins = "gpio119\0gpio120\0gpio121\0gpio122";
						function = "gpio";
					};

					config {
						pins = "gpio119\0gpio120\0gpio121\0gpio122";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se4_spi_pins {
				phandle = < 0x33c >;

				qupv3_se4_spi_active {
					phandle = < 0x1a6 >;

					mux {
						pins = "gpio8\0gpio9\0gpio10\0gpio11";
						function = "qup4";
					};

					config {
						pins = "gpio8\0gpio9\0gpio10\0gpio11";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se4_spi_sleep {
					phandle = < 0x1a7 >;

					mux {
						pins = "gpio8\0gpio9\0gpio10\0gpio11";
						function = "gpio";
					};

					config {
						pins = "gpio8\0gpio9\0gpio10\0gpio11";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se5_spi_pins {
				phandle = < 0x33d >;

				qupv3_se5_spi_active {
					phandle = < 0x1a8 >;

					mux {
						pins = "gpio12\0gpio13\0gpio14\0gpio15";
						function = "qup5";
					};

					config {
						pins = "gpio12\0gpio13\0gpio14\0gpio15";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se5_spi_sleep {
					phandle = < 0x1a9 >;

					mux {
						pins = "gpio12\0gpio13\0gpio14\0gpio15";
						function = "gpio";
					};

					config {
						pins = "gpio12\013\0gpio14\0gpio15";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se6_spi_pins {
				phandle = < 0x33e >;

				qupv3_se6_spi_active {
					phandle = < 0x1aa >;

					mux {
						pins = "gpio16\0gpio17\0gpio18\0gpio19";
						function = "qup6";
					};

					config {
						pins = "gpio16\0gpio17\0gpio18\0gpio19";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se6_spi_sleep {
					phandle = < 0x1ab >;

					mux {
						pins = "gpio16\0gpio17\0gpio18\0gpio19";
						function = "gpio";
					};

					config {
						pins = "gpio16\0gpio17\0gpio18\0gpio19";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se7_spi_pins {
				phandle = < 0x33f >;

				qupv3_se7_spi_active {
					phandle = < 0x1ac >;

					mux {
						pins = "gpio20\0gpio21\0gpio22\0gpio23";
						function = "qup7";
					};

					config {
						pins = "gpio20\0gpio21\0gpio22\0gpio23";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se7_spi_sleep {
					phandle = < 0x1ad >;

					mux {
						pins = "gpio20\0gpio21\0gpio22\0gpio23";
						function = "gpio";
					};

					config {
						pins = "gpio20\0gpio21\0gpio22\0gpio23";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se8_i2c_pins {
				phandle = < 0x340 >;

				qupv3_se8_i2c_active {
					phandle = < 0x1b5 >;

					mux {
						pins = "gpio24\0gpio25";
						function = "qup8";
					};

					config {
						pins = "gpio24\0gpio25";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se8_i2c_sleep {
					phandle = < 0x1b6 >;

					mux {
						pins = "gpio24\0gpio25";
						function = "gpio";
					};

					config {
						pins = "gpio24\0gpio25";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se9_i2c_pins {
				phandle = < 0x341 >;

				qupv3_se9_i2c_active {
					phandle = < 0x1b7 >;

					mux {
						pins = "gpio125\0gpio126";
						function = "qup9";
					};

					config {
						pins = "gpio125\0gpio126";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se9_i2c_sleep {
					phandle = < 0x1b8 >;

					mux {
						pins = "gpio125\0gpio126";
						function = "gpio";
					};

					config {
						pins = "gpio125\0gpio126";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se10_i2c_pins {
				phandle = < 0x342 >;

				qupv3_se10_i2c_active {
					phandle = < 0x1b9 >;

					mux {
						pins = "gpio129\0gpio130";
						function = "qup10";
					};

					config {
						pins = "gpio129\0gpio130";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se10_i2c_sleep {
					phandle = < 0x1ba >;

					mux {
						pins = "gpio129\0gpio130";
						function = "gpio";
					};

					config {
						pins = "gpio129\0gpio130";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se11_i2c_pins {
				phandle = < 0x343 >;

				qupv3_se11_i2c_active {
					phandle = < 0x1bb >;

					mux {
						pins = "gpio60\0gpio61";
						function = "qup11";
					};

					config {
						pins = "gpio60\0gpio61";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se11_i2c_sleep {
					phandle = < 0x1bc >;

					mux {
						pins = "gpio60\0gpio61";
						function = "gpio";
					};

					config {
						pins = "gpio60\0gpio61";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se12_i2c_pins {
				phandle = < 0x344 >;

				qupv3_se12_i2c_active {
					phandle = < 0x1bd >;

					mux {
						pins = "gpio32\0gpio33";
						function = "qup12";
					};

					config {
						pins = "gpio32\0gpio33";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se12_i2c_sleep {
					phandle = < 0x1be >;

					mux {
						pins = "gpio32\0gpio33";
						function = "gpio";
					};

					config {
						pins = "gpio32\0gpio33";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se13_i2c_pins {
				phandle = < 0x345 >;

				qupv3_se13_i2c_active {
					phandle = < 0x1bf >;

					mux {
						pins = "gpio36\0gpio37";
						function = "qup13";
					};

					config {
						pins = "gpio36\0gpio37";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se13_i2c_sleep {
					phandle = < 0x1c0 >;

					mux {
						pins = "gpio36\0gpio37";
						function = "gpio";
					};

					config {
						pins = "gpio36\0gpio37";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se8_spi_pins {
				phandle = < 0x346 >;

				qupv3_se8_spi_active {
					phandle = < 0x1c1 >;

					mux {
						pins = "gpio24\0gpio25\0gpio26\0gpio27";
						function = "qup8";
					};

					config {
						pins = "gpio24\0gpio25\0gpio26\0gpio27";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se8_spi_sleep {
					phandle = < 0x347 >;

					mux {
						pins = "gpio24\0gpio25\0gpio26\0gpio27";
						function = "gpio";
					};

					config {
						pins = "gpio24\0gpio25\0gpio26\0gpio27";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se9_spi_pins {
				phandle = < 0x348 >;

				qupv3_se9_spi_active {
					phandle = < 0x1c2 >;

					mux {
						pins = "gpio125\0gpio126\0gpio127\0gpio128";
						function = "qup9";
					};

					config {
						pins = "gpio125\0gpio126\0gpio127\0gpio128";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se9_spi_sleep {
					phandle = < 0x1c3 >;

					mux {
						pins = "gpio125\0gpio126\0gpio127\0gpio128";
						function = "gpio";
					};

					config {
						pins = "gpio125\0gpio126\0gpio127\0gpio128";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se10_spi_pins {
				phandle = < 0x349 >;

				qupv3_se10_spi_active {
					phandle = < 0x1c4 >;

					mux {
						pins = "gpio129\0gpio130\0gpio131\0gpio132";
						function = "qup10";
					};

					config {
						pins = "gpio129\0gpio130\0gpio131\0gpio132";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se10_spi_sleep {
					phandle = < 0x1c5 >;

					mux {
						pins = "gpio129\0gpio130\0gpio131\0gpio132";
						function = "gpio";
					};

					config {
						pins = "gpio129\0gpio130\0gpio131\0gpio132";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se11_spi_pins {
				phandle = < 0x34a >;

				qupv3_se11_spi_active {
					phandle = < 0x1c6 >;

					mux {
						pins = "gpio60\0gpio61\0gpio62\0gpio63";
						function = "qup11";
					};

					config {
						pins = "gpio60\0gpio61\0gpio62\0gpio63";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se11_spi_sleep {
					phandle = < 0x1c7 >;

					mux {
						pins = "gpio60\0gpio61\0gpio62\0gpio63";
						function = "gpio";
					};

					config {
						pins = "gpio60\0gpio61\0gpio62\0gpio63";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se12_spi_pins {
				phandle = < 0x34b >;

				qupv3_se12_spi_active {
					phandle = < 0x1c8 >;

					mux {
						pins = "gpio32\0gpio33\0gpio34\0gpio35";
						function = "qup12";
					};

					config {
						pins = "gpio32\0gpio33\0gpio34\0gpio35";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se12_spi_sleep {
					phandle = < 0x1c9 >;

					mux {
						pins = "gpio32\0gpio33\0gpio34\0gpio35";
						function = "gpio";
					};

					config {
						pins = "gpio32\0gpio33\0gpio34\0gpio35";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se13_spi_pins {
				phandle = < 0x34c >;

				qupv3_se13_spi_active {
					phandle = < 0x1ca >;

					mux {
						pins = "gpio36\0gpio37\0gpio38\0gpio39";
						function = "qup13";
					};

					config {
						pins = "gpio36\0gpio37\0gpio38\0gpio39";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se13_spi_sleep {
					phandle = < 0x1cb >;

					mux {
						pins = "gpio36\0gpio37\0gpio38\0gpio39";
						function = "gpio";
					};

					config {
						pins = "gpio36\0gpio37\0gpio38\0gpio39";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se14_i2c_pins {
				phandle = < 0x34d >;

				qupv3_se14_i2c_active {
					phandle = < 0x1d3 >;

					mux {
						pins = "gpio40\0gpio41";
						function = "qup14";
					};

					config {
						pins = "gpio40\0gpio41";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se14_i2c_sleep {
					phandle = < 0x1d4 >;

					mux {
						pins = "gpio40\0gpio41";
						function = "gpio";
					};

					config {
						pins = "gpio40\0gpio41";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se15_i2c_pins {
				phandle = < 0x34e >;

				qupv3_se15_i2c_active {
					phandle = < 0x1d5 >;

					mux {
						pins = "gpio44\0gpio45";
						function = "qup15";
					};

					config {
						pins = "gpio44\0gpio45";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se15_i2c_sleep {
					phandle = < 0x1d6 >;

					mux {
						pins = "gpio44\0gpio45";
						function = "gpio";
					};

					config {
						pins = "gpio44\0gpio45";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se16_i2c_pins {
				phandle = < 0x34f >;

				qupv3_se16_i2c_active {
					phandle = < 0x1d8 >;

					mux {
						pins = "gpio48\0gpio49";
						function = "qup16";
					};

					config {
						pins = "gpio48\0gpio49";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se16_i2c_sleep {
					phandle = < 0x1d9 >;

					mux {
						pins = "gpio48\0gpio49";
						function = "gpio";
					};

					config {
						pins = "gpio48\0gpio49";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se17_i2c_pins {
				phandle = < 0x350 >;

				qupv3_se17_i2c_active {
					phandle = < 0x1da >;

					mux {
						pins = "gpio52\0gpio53";
						function = "qup17";
					};

					config {
						pins = "gpio52\0gpio53";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se17_i2c_sleep {
					phandle = < 0x1db >;

					mux {
						pins = "gpio52\0gpio53";
						function = "gpio";
					};

					config {
						pins = "gpio52\0gpio53";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se18_i2c_pins {
				phandle = < 0x351 >;

				qupv3_se18_i2c_active {
					phandle = < 0x1dc >;

					mux {
						pins = "gpio56\0gpio57";
						function = "qup18";
					};

					config {
						pins = "gpio56\0gpio57";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se18_i2c_sleep {
					phandle = < 0x1dd >;

					mux {
						pins = "gpio56\0gpio57";
						function = "gpio";
					};

					config {
						pins = "gpio56\0gpio57";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se19_i2c_pins {
				phandle = < 0x352 >;

				qupv3_se19_i2c_active {
					phandle = < 0x1de >;

					mux {
						pins = "gpio0\0gpio1";
						function = "qup19";
					};

					config {
						pins = "gpio0\0gpio1";
						drive-strength = < 0x02 >;
						bias-disable;
					};
				};

				qupv3_se19_i2c_sleep {
					phandle = < 0x1df >;

					mux {
						pins = "gpio0\0gpio1";
						function = "gpio";
					};

					config {
						pins = "gpio0\0gpio1";
						drive-strength = < 0x02 >;
						bias-no-pull;
					};
				};
			};

			qupv3_se14_spi_pins {
				phandle = < 0x353 >;

				qupv3_se14_spi_active {
					phandle = < 0x1e0 >;

					mux {
						pins = "gpio40\0gpio41\0gpio42\0gpio43";
						function = "qup14";
					};

					config {
						pins = "gpio40\0gpio41\0gpio42\0gpio43";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se14_spi_sleep {
					phandle = < 0x1e1 >;

					mux {
						pins = "gpio40\0gpio41\0gpio42\0gpio43";
						function = "gpio";
					};

					config {
						pins = "gpio40\0gpio41\0gpio42\0gpio43";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se15_spi_pins {
				phandle = < 0x354 >;

				qupv3_se15_spi_active {
					phandle = < 0x1e2 >;

					mux {
						pins = "gpio44\0gpio45\0gpio46\0gpio47";
						function = "qup15";
					};

					config {
						pins = "gpio44\0gpio45\0gpio46\0gpio47";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se15_spi_sleep {
					phandle = < 0x1e3 >;

					mux {
						pins = "gpio44\0gpio45\0gpio46\0gpio47";
						function = "gpio";
					};

					config {
						pins = "gpio44\0gpio45\0gpio46\0gpio47";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se16_spi_pins {
				phandle = < 0x355 >;

				qupv3_se16_spi_active {
					phandle = < 0x1e4 >;

					mux {
						pins = "gpio48\0gpio49\0gpio50\0gpio51";
						function = "qup16";
					};

					config {
						pins = "gpio48\0gpio49\0gpio50\0gpio51";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se16_spi_sleep {
					phandle = < 0x1e5 >;

					mux {
						pins = "gpio48\0gpio49\0gpio50\0gpio51";
						function = "gpio";
					};

					config {
						pins = "gpio48\0gpio49\0gpio50\0gpio51";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se17_spi_pins {
				phandle = < 0x356 >;

				qupv3_se17_spi_active {
					phandle = < 0x1e6 >;

					mux {
						pins = "gpio52\0gpio53\0gpio54\0gpio55";
						function = "qup17";
					};

					config {
						pins = "gpio52\0gpio53\0gpio54\0gpio55";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se17_spi_sleep {
					phandle = < 0x1e7 >;

					mux {
						pins = "gpio52\0gpio53\0gpio54\0gpio55";
						function = "gpio";
					};

					config {
						pins = "gpio52\0gpio53\0gpio54\0gpio55";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se18_spi_pins {
				phandle = < 0x357 >;

				qupv3_se18_spi_active {
					phandle = < 0x1e8 >;

					mux {
						pins = "gpio56\0gpio57\0gpio58\0gpio59";
						function = "qup18";
					};

					config {
						pins = "gpio56\0gpio57\0gpio58\0gpio59";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se18_spi_sleep {
					phandle = < 0x1e9 >;

					mux {
						pins = "gpio56\0gpio57\0gpio58\0gpio59";
						function = "gpio";
					};

					config {
						pins = "gpio56\0gpio57\0gpio58\0gpio59";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			qupv3_se19_spi_pins {
				phandle = < 0x358 >;

				qupv3_se19_spi_active {
					phandle = < 0x1ea >;

					mux {
						pins = "gpio0\0gpio1\0gpio2\0gpio3";
						function = "qup19";
					};

					config {
						pins = "gpio0\0gpio1\0gpio2\0gpio3";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};

				qupv3_se19_spi_sleep {
					phandle = < 0x1eb >;

					mux {
						pins = "gpio0\0gpio1\0gpio2\0gpio3";
						function = "gpio";
					};

					config {
						pins = "gpio0\0gpio1\0gpio2\0gpio3";
						drive-strength = < 0x06 >;
						bias-disable;
					};
				};
			};

			usb2_id_det_default {
				phandle = < 0x359 >;

				config {
					pins = "gpio91";
					function = "gpio";
					input-enable;
					bias-pull-up;
				};
			};
		};

		qcom,smp2p-adsp {
			compatible = "qcom,smp2p";
			qcom,smem = < 0x1bb 0x1ad >;
			interrupt-parent = < 0x74 >;
			interrupts = < 0x03 0x02 0x01 >;
			mboxes = < 0x74 0x03 0x02 >;
			qcom,local-pid = < 0x00 >;
			qcom,remote-pid = < 0x02 >;

			master-kernel {
				qcom,entry-name = "master-kernel";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x7f >;
			};

			slave-kernel {
				qcom,entry-name = "slave-kernel";
				interrupt-controller;
				#interrupt-cells = < 0x02 >;
				phandle = < 0x7e >;
			};

			qcom,smp2p-rdbg2-out {
				qcom,entry-name = "rdbg";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x15c >;
			};

			qcom,smp2p-rdbg2-in {
				qcom,entry-name = "rdbg";
				interrupt-controller;
				#interrupt-cells = < 0x02 >;
				phandle = < 0x15d >;
			};
		};

		qcom,smp2p-dsps {
			compatible = "qcom,smp2p";
			qcom,smem = < 0x1e1 0x1ae >;
			interrupt-parent = < 0x74 >;
			interrupts = < 0x04 0x02 0x01 >;
			mboxes = < 0x74 0x04 0x02 >;
			qcom,local-pid = < 0x00 >;
			qcom,remote-pid = < 0x03 >;

			master-kernel {
				qcom,entry-name = "master-kernel";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x35a >;
			};

			slave-kernel {
				qcom,entry-name = "slave-kernel";
				interrupt-controller;
				#interrupt-cells = < 0x02 >;
				phandle = < 0x35b >;
			};

			sleepstate-out {
				qcom,entry-name = "sleepstate";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x88 >;
			};

			qcom,sleepstate-in {
				qcom,entry-name = "sleepstate_see";
				interrupt-controller;
				#interrupt-cells = < 0x02 >;
				phandle = < 0x89 >;
			};
		};

		qcom,smp2p-cdsp {
			compatible = "qcom,smp2p";
			qcom,smem = < 0x5e 0x1b0 >;
			interrupt-parent = < 0x74 >;
			interrupts = < 0x06 0x02 0x01 >;
			mboxes = < 0x74 0x06 0x02 >;
			qcom,local-pid = < 0x00 >;
			qcom,remote-pid = < 0x05 >;

			master-kernel {
				qcom,entry-name = "master-kernel";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x82 >;
			};

			slave-kernel {
				qcom,entry-name = "slave-kernel";
				interrupt-controller;
				#interrupt-cells = < 0x02 >;
				phandle = < 0x81 >;
			};

			qcom,smp2p-qvrexternal5-out {
				qcom,entry-name = "qvrexternal";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x1f7 >;
			};

			qcom,smp2p-rdbg5-out {
				qcom,entry-name = "rdbg";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x15e >;
			};

			qcom,smp2p-rdbg5-in {
				qcom,entry-name = "rdbg";
				interrupt-controller;
				#interrupt-cells = < 0x02 >;
				phandle = < 0x15f >;
			};
		};

		qcom,smp2p-npu {
			compatible = "qcom,smp2p";
			qcom,smem = < 0x269 0x268 >;
			interrupt-parent = < 0x74 >;
			interrupts = < 0x07 0x02 0x01 >;
			mboxes = < 0x3c 0x07 0x02 >;
			qcom,local-pid = < 0x00 >;
			qcom,remote-pid = < 0x0a >;

			master-kernel {
				qcom,entry-name = "master-kernel";
				#qcom,smem-state-cells = < 0x01 >;
				phandle = < 0x87 >;
			};

			slave-kernel {
				qcom,entry-name = "slave-kernel";
				interrupt-controller;
				#interrupt-cells = < 0x02 >;
				phandle = < 0x35c >;
			};
		};

		ssusb@a600000 {
			compatible = "qcom,dwc-usb3-msm";
			reg = < 0xa600000 0x100000 >;
			reg-names = "core_base";
			iommus = < 0x43 0x00 0x00 >;
			qcom,iommu-dma = "atomic";
			qcom,iommu-dma-addr-pool = < 0x90000000 0x60000000 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x01 >;
			ranges;
			interrupts-extended = < 0x61 0x0e 0x03 0x01 0x00 0x82 0x04 0x61 0x11 0x04 0x61 0x0f 0x03 >;
			interrupt-names = "dp_hs_phy_irq\0pwr_event_irq\0ss_phy_irq\0dm_hs_phy_irq";
			qcom,use-pdc-interrupts;
			USB3_GDSC-supply = < 0x153 >;
			dpdm-supply = < 0x154 >;
			clocks = < 0x15 0xb6 0x15 0x0f 0x15 0x08 0x15 0xb8 0x15 0xbb 0x15 0xc7 >;
			clock-names = "core_clk\0iface_clk\0bus_aggr_clk\0utmi_clk\0sleep_clk\0xo";
			resets = < 0x15 0x22 >;
			reset-names = "core_reset";
			qcom,core-clk-rate = < 0xbebc200 >;
			qcom,core-clk-rate-hs = < 0x3f940ab >;
			qcom,num-gsi-evt-buffs = < 0x03 >;
			qcom,gsi-reg-offset = < 0xfc 0x110 0x120 0x130 0x144 0x1a4 >;
			qcom,dwc-usb3-msm-tx-fifo-size = < 0x6c30 >;
			qcom,msm-bus,name = "usb0";
			qcom,msm-bus,num-cases = < 0x04 >;
			qcom,msm-bus,num-paths = < 0x03 >;
			qcom,msm-bus,vectors-KBps = < 0x3d 0x200 0x00 0x00 0x3d 0x2a4 0x00 0x00 0x01 0x247 0x00 0x00 0x3d 0x200 0xf4240 0x2625a0 0x3d 0x2a4 0x00 0x960 0x01 0x247 0x00 0x9c40 0x3d 0x200 0x3a980 0xaae60 0x3d 0x2a4 0x00 0x960 0x01 0x247 0x00 0x9c40 0x3d 0x200 0x01 0x01 0x3d 0x2a4 0x01 0x01 0x01 0x247 0x01 0x01 >;
			phandle = < 0x35d >;

			dwc3@a600000 {
				compatible = "snps,dwc3";
				reg = < 0xa600000 0xd93c >;
				interrupts = < 0x00 0x85 0x04 >;
				usb-phy = < 0x154 0x155 >;
				linux,sysdev_is_parent;
				snps,disable-clk-gating;
				snps,has-lpm-erratum;
				snps,hird-threshold = [ 10 ];
				snps,usb3-u1u2-disable;
				usb-core-id = < 0x00 >;
				tx-fifo-resize;
				maximum-speed = "super-speed-plus";
				dr_mode = "drd";
				phandle = < 0x35e >;
			};

			qcom,usbbam@a704000 {
				compatible = "qcom,usb-bam-msm";
				reg = < 0xa704000 0x17000 >;
				interrupts = < 0x00 0x84 0x04 >;
				qcom,usb-bam-fifo-baseaddr = < 0x146bb000 >;
				qcom,usb-bam-num-pipes = < 0x04 >;
				qcom,disable-clk-gating;
				qcom,usb-bam-override-threshold = < 0x4001 >;
				qcom,usb-bam-max-mbps-highspeed = < 0x190 >;
				qcom,usb-bam-max-mbps-superspeed = < 0xe10 >;
				qcom,reset-bam-on-connect;

				qcom,pipe0 {
					label = "ssusb-qdss-in-0";
					qcom,usb-bam-mem-type = < 0x02 >;
					qcom,dir = < 0x01 >;
					qcom,pipe-num = < 0x00 >;
					qcom,peer-bam = < 0x00 >;
					qcom,peer-bam-physical-address = < 0x6064000 >;
					qcom,src-bam-pipe-index = < 0x00 >;
					qcom,dst-bam-pipe-index = < 0x00 >;
					qcom,data-fifo-offset = < 0x00 >;
					qcom,data-fifo-size = < 0x1800 >;
					qcom,descriptor-fifo-offset = < 0x1800 >;
					qcom,descriptor-fifo-size = < 0x800 >;
				};
			};
		};

		hsphy@88e3000 {
			compatible = "qcom,usb-hsphy-snps-femto";
			reg = < 0x88e3000 0x110 0x88e2000 0x04 >;
			reg-names = "hsusb_phy_base\0eud_enable_reg";
			vdd-supply = < 0x69 >;
			vdda18-supply = < 0x156 >;
			vdda33-supply = < 0x157 >;
			qcom,vdd-voltage-level = < 0x00 0xd6d80 0xd6d80 >;
			clocks = < 0x14 0x00 >;
			clock-names = "ref_clk_src";
			resets = < 0x15 0x1b >;
			reset-names = "phy_reset";
			qcom,param-override-seq = < 0x43 0x70 >;
			phandle = < 0x154 >;
		};

		ssphy@88e8000 {
			compatible = "qcom,usb-ssphy-qmp-dp-combo";
			reg = < 0x88e8000 0x3000 >;
			reg-names = "qmp_phy_base";
			vdd-supply = < 0x158 >;
			qcom,vdd-voltage-level = < 0x00 0xdea80 0xdea80 >;
			qcom,vdd-max-load-uA = < 0xb798 >;
			core-supply = < 0x6a >;
			qcom,vbus-valid-override;
			qcom,qmp-phy-init-seq = < 0x1010 0x01 0x00 0x101c 0x31 0x00 0x1020 0x01 0x00 0x1024 0xde 0x00 0x1028 0x07 0x00 0x1030 0xde 0x00 0x1034 0x07 0x00 0x1050 0x0a 0x00 0x1060 0x20 0x00 0x1074 0x06 0x00 0x1078 0x06 0x00 0x107c 0x16 0x00 0x1080 0x16 0x00 0x1084 0x36 0x00 0x1088 0x36 0x00 0x1094 0x1a 0x00 0x10a4 0x04 0x00 0x10ac 0x14 0x00 0x10b0 0x34 0x00 0x10b4 0x34 0x00 0x10b8 0x82 0x00 0x10bc 0x82 0x00 0x10c4 0x82 0x00 0x10cc 0xab 0x00 0x10d0 0xea 0x00 0x10d4 0x02 0x00 0x10d8 0xab 0x00 0x10dc 0xea 0x00 0x10e0 0x02 0x00 0x110c 0x02 0x00 0x1110 0x24 0x00 0x1118 0x24 0x00 0x111c 0x02 0x00 0x1158 0x01 0x00 0x116c 0x08 0x00 0x11ac 0xca 0x00 0x11b0 0x1e 0x00 0x11b4 0xca 0x00 0x11b8 0x1e 0x00 0x11bc 0x11 0x00 0x1234 0x60 0x00 0x1238 0x60 0x00 0x123c 0x11 0x00 0x1240 0x02 0x00 0x1284 0xd5 0x00 0x1288 0x00 0x00 0x129c 0x12 0x00 0x1304 0x40 0x00 0x1408 0x09 0x00 0x1414 0x05 0x00 0x1430 0x2f 0x00 0x1434 0x7f 0x00 0x143c 0xff 0x00 0x1440 0x0f 0x00 0x1444 0x99 0x00 0x144c 0x08 0x00 0x1450 0x08 0x00 0x1454 0x00 0x00 0x1458 0x04 0x00 0x14d4 0x54 0x00 0x14d8 0x0c 0x00 0x14ec 0x0f 0x00 0x14f0 0x4a 0x00 0x14f4 0x0a 0x00 0x14f8 0xc0 0x00 0x14fc 0x00 0x00 0x1510 0x77 0x00 0x151c 0x04 0x00 0x1524 0x0e 0x00 0x1570 0xff 0x00 0x1574 0x7f 0x00 0x1578 0x7f 0x00 0x157c 0x7f 0x00 0x1580 0x97 0x00 0x1584 0xdc 0x00 0x1588 0xdc 0x00 0x158c 0x5c 0x00 0x1590 0x7b 0x00 0x1594 0xb4 0x00 0x15b4 0x04 0x00 0x15b8 0x38 0x00 0x1460 0xa0 0x00 0x15bc 0x0c 0x00 0x14dc 0x1f 0x00 0x15c4 0x10 0x00 0x1634 0x60 0x00 0x1638 0x60 0x00 0x163c 0x11 0x00 0x1640 0x02 0x00 0x1684 0xd5 0x00 0x1688 0x00 0x00 0x169c 0x12 0x00 0x1704 0x54 0x00 0x1808 0x09 0x00 0x1814 0x05 0x00 0x1830 0x2f 0x00 0x1834 0x7f 0x00 0x183c 0xff 0x00 0x1840 0x0f 0x00 0x1844 0x99 0x00 0x184c 0x08 0x00 0x1850 0x08 0x00 0x1854 0x00 0x00 0x1858 0x04 0x00 0x18d4 0x54 0x00 0x18d8 0x0c 0x00 0x18ec 0x0f 0x00 0x18f0 0x4a 0x00 0x18f4 0x0a 0x00 0x18f8 0xc0 0x00 0x18fc 0x00 0x00 0x1910 0x77 0x00 0x191c 0x04 0x00 0x1924 0x0e 0x00 0x1970 0x7f 0x00 0x1974 0xff 0x00 0x1978 0x3f 0x00 0x197c 0x7f 0x00 0x1980 0xa6 0x00 0x1984 0xdc 0x00 0x1988 0xdc 0x00 0x198c 0x5c 0x00 0x1990 0x7b 0x00 0x1994 0xb4 0x00 0x19b4 0x04 0x00 0x19b8 0x38 0x00 0x1860 0xa0 0x00 0x19bc 0x0c 0x00 0x18dc 0x1f 0x00 0x19c4 0x10 0x00 0x1cc4 0xd0 0x00 0x1cc8 0x07 0x00 0x1ccc 0x20 0x00 0x1cd8 0x13 0x00 0x1cdc 0x21 0x00 0x1d88 0xa9 0x00 0x1db0 0x0a 0x00 0x1dc0 0x88 0x00 0x1dc4 0x13 0x00 0x1dd0 0x0c 0x00 0x1ddc 0x4b 0x00 0x1dec 0x10 0x00 0x1f18 0xf8 0x00 0x1f38 0x07 0x00 0xffffffff 0xffffffff 0x00 >;
			qcom,qmp-phy-reg-offset = < 0x1c14 0x1f08 0x1f14 0x1c40 0x1c00 0x1c44 0xffff 0x2a18 0x08 0x04 0x1c 0x00 0x10 0x0c 0x1c8c >;
			clocks = < 0x15 0xc2 0x15 0xc5 0x15 0xc6 0x15 0x01 0x14 0x00 0x15 0xc4 >;
			clock-names = "aux_clk\0pipe_clk\0pipe_clk_mux\0pipe_clk_ext_src\0ref_clk_src\0com_aux_clk";
			resets = < 0x15 0x24 0x15 0x26 >;
			reset-names = "global_phy_reset\0phy_reset";
			phandle = < 0x155 >;
		};

		usb_audio_qmi_dev {
			compatible = "qcom,usb-audio-qmi-dev";
			iommus = < 0x43 0x180f 0x00 >;
			qcom,iommu-dma = "disabled";
			qcom,usb-audio-stream-id = < 0x0f >;
			qcom,usb-audio-intr-num = < 0x02 >;
		};

		hsphy@88e4000 {
			compatible = "qcom,usb-hsphy-snps-femto";
			reg = < 0x88e4000 0x110 >;
			reg-names = "hsusb_phy_base";
			vdd-supply = < 0x69 >;
			vdda18-supply = < 0x156 >;
			vdda33-supply = < 0x157 >;
			qcom,vdd-voltage-level = < 0x00 0xd6d80 0xd6d80 >;
			clocks = < 0x14 0x00 >;
			clock-names = "ref_clk_src";
			resets = < 0x15 0x1c >;
			reset-names = "phy_reset";
			qcom,param-override-seq = < 0x43 0x70 >;
			phandle = < 0x35f >;
		};

		ssphy@88eb000 {
			compatible = "qcom,usb-ssphy-qmp-v2";
			reg = < 0x88eb000 0x1000 0x88eb88c 0x04 >;
			reg-names = "qmp_phy_base\0pcs_clamp_enable_reg";
			vdd-supply = < 0x158 >;
			qcom,vdd-voltage-level = < 0x00 0xdea80 0xdea80 >;
			qcom,vdd-max-load-uA = < 0xb798 >;
			core-supply = < 0x6a >;
			qcom,vbus-valid-override;
			qcom,qmp-phy-init-seq = < 0x94 0x1a 0x00 0x1bc 0x11 0x00 0x158 0x01 0x00 0xbc 0x82 0x00 0xcc 0xab 0x00 0xd0 0xea 0x00 0xd4 0x02 0x00 0x1ac 0xca 0x00 0x1b0 0x1e 0x00 0x74 0x06 0x00 0x7c 0x16 0x00 0x84 0x36 0x00 0x110 0x24 0x00 0xb0 0x34 0x00 0xac 0x14 0x00 0xa4 0x04 0x00 0x50 0x0a 0x00 0x11c 0x02 0x00 0x118 0x24 0x00 0x16c 0x08 0x00 0xc4 0x82 0x00 0xd8 0xab 0x00 0xdc 0xea 0x00 0xe0 0x02 0x00 0xb8 0x82 0x00 0xb4 0x34 0x00 0x78 0x06 0x00 0x80 0x16 0x00 0x88 0x36 0x00 0x1b4 0xca 0x00 0x1b8 0x1e 0x00 0x60 0x20 0x00 0x10 0x01 0x00 0x1c 0x31 0x00 0x20 0x01 0x00 0x30 0xde 0x00 0x34 0x07 0x00 0x24 0xde 0x00 0x28 0x07 0x00 0x10c 0x02 0x00 0x580 0xb8 0x00 0x57c 0xff 0x00 0x578 0xbf 0x00 0x574 0x7f 0x00 0x570 0x7f 0x00 0x594 0xb4 0x00 0x590 0x7b 0x00 0x58c 0x5c 0x00 0x588 0xdc 0x00 0x584 0xdc 0x00 0x444 0x99 0x00 0x44c 0x04 0x00 0x450 0x08 0x00 0x454 0x05 0x00 0x458 0x05 0x00 0x430 0x2f 0x00 0x43c 0xff 0x00 0x440 0x0f 0x00 0x434 0x7f 0x00 0x408 0x0a 0x00 0x4d4 0x54 0x00 0x4d8 0x0c 0x00 0x4ec 0x0f 0x00 0x4f0 0x4a 0x00 0x4f4 0x0a 0x00 0x5b4 0x04 0x00 0x510 0x47 0x00 0x514 0x80 0x00 0x51c 0x04 0x00 0x524 0x0e 0x00 0x4fc 0x00 0x00 0x4f8 0xc0 0x00 0x5b8 0x38 0x00 0x414 0x06 0x00 0x5bc 0x0c 0x00 0x4dc 0x1f 0x00 0x29c 0x12 0x00 0x284 0xd5 0x00 0x288 0x82 0x00 0x304 0x40 0x00 0x23c 0x11 0x00 0x240 0x02 0x00 0x8c4 0xd0 0x00 0x8c8 0x07 0x00 0x8cc 0x20 0x00 0x8d8 0x13 0x00 0x990 0xe7 0x00 0x994 0x03 0x00 0x988 0xa9 0x00 0x9d0 0x0c 0x00 0xe38 0x07 0x00 0xe18 0xf8 0x00 0x9b0 0x0a 0x00 0x9c0 0x88 0x00 0x9c4 0x13 0x00 0x9dc 0x4b 0x00 0x9ec 0x10 0x00 0x8dc 0x21 0x00 0xffffffff 0xffffffff 0x00 >;
			qcom,qmp-phy-reg-offset = < 0x814 0xe08 0xe14 0x840 0x800 0x844 >;
			clocks = < 0x15 0xc8 0x15 0xcb 0x15 0xcc 0x15 0x02 0x14 0x00 0x15 0xc7 0x15 0xca >;
			clock-names = "aux_clk\0pipe_clk\0pipe_clk_mux\0pipe_clk_ext_src\0ref_clk_src\0ref_clk\0com_aux_clk";
			resets = < 0x15 0x27 0x15 0x29 >;
			reset-names = "phy_reset\0phy_phy_reset";
			phandle = < 0x360 >;
		};

		qcom,mdss_mdp@ae00000 {
			compatible = "qcom,sde-kms";
			reg = < 0xae00000 0x84208 0xaeb0000 0x2008 0xaeac000 0x214 0xae8f000 0x2c 0xaf50000 0x38 >;
			reg-names = "mdp_phys\0vbif_phys\0regdma_phys\0sid_phys\0swfuse_phys";
			clocks = < 0x15 0x18 0x15 0x19 0x15 0x1a 0x57 0x00 0x57 0x2a 0x57 0x36 0x57 0x2c 0x57 0x32 >;
			clock-names = "gcc_iface\0gcc_bus\0gcc_nrt_bus\0iface_clk\0core_clk\0vsync_clk\0lut_clk\0rot_clk";
			clock-rate = < 0x00 0x00 0x00 0x00 0x11e1a300 0x124f800 0x11e1a300 0x124f800 >;
			clock-max-rate = < 0x00 0x00 0x00 0x00 0x1b6b0b00 0x124f800 0x1b6b0b00 0x1b6b0b00 >;
			mmcx-supply = < 0x54 >;
			interrupts = < 0x00 0x53 0x04 >;
			interrupt-controller;
			#interrupt-cells = < 0x01 >;
			#power-domain-cells = < 0x00 >;
			qcom,sde-off = < 0x1000 >;
			qcom,sde-len = < 0x494 >;
			qcom,sde-ctl-off = < 0x2000 0x2200 0x2400 0x2600 0x2800 0x2a00 >;
			qcom,sde-ctl-size = < 0x1dc >;
			qcom,sde-ctl-display-pref = "primary\0none\0none\0none\0none";
			qcom,sde-mixer-off = < 0x45000 0x46000 0x47000 0x48000 0x49000 0x4a000 >;
			qcom,sde-mixer-size = < 0x320 >;
			qcom,sde-mixer-display-pref = "primary\0primary\0primary\0primary\0none\0none";
			qcom,sde-mixer-cwb-pref = "none\0none\0cwb\0cwb\0cwb\0cwb";
			qcom,sde-dspp-top-off = < 0x1300 >;
			qcom,sde-dspp-top-size = < 0x80 >;
			qcom,sde-dspp-off = < 0x55000 0x57000 0x59000 0x5b000 >;
			qcom,sde-dspp-size = < 0x1800 >;
			qcom,sde-dest-scaler-top-off = < 0x61000 >;
			qcom,sde-dest-scaler-top-size = < 0x1c >;
			qcom,sde-dest-scaler-off = < 0x800 0x1000 >;
			qcom,sde-dest-scaler-size = < 0x800 >;
			qcom,sde-wb-off = < 0x66000 >;
			qcom,sde-wb-size = < 0x2c8 >;
			qcom,sde-wb-xin-id = < 0x06 >;
			qcom,sde-wb-id = < 0x02 >;
			qcom,sde-wb-clk-ctrl = < 0x2bc 0x10 >;
			qcom,sde-wb-clk-status = < 0x3bc 0x14 >;
			qcom,sde-intf-off = < 0x6b000 0x6b800 0x6c000 0x6c800 >;
			qcom,sde-intf-size = < 0x2b8 >;
			qcom,sde-intf-type = "dp\0dsi\0dsi\0dp";
			qcom,sde-pp-off = < 0x71000 0x71800 0x72000 0x72800 0x73000 0x73800 >;
			qcom,sde-pp-slave = < 0x00 0x00 0x00 0x00 0x00 0x00 >;
			qcom,sde-pp-size = < 0xd4 >;
			qcom,sde-pp-merge-3d-id = < 0x00 0x00 0x01 0x01 0x02 0x02 >;
			qcom,sde-merge-3d-off = < 0x84000 0x84100 0x84200 >;
			qcom,sde-merge-3d-size = < 0x100 >;
			qcom,sde-te2-off = < 0x2000 0x2000 0x00 0x00 0x00 0x00 >;
			qcom,sde-cdm-off = < 0x7a200 >;
			qcom,sde-cdm-size = < 0x224 >;
			qcom,sde-dsc-off = < 0x81000 0x81400 0x81800 0x81c00 >;
			qcom,sde-dsc-size = < 0x140 >;
			qcom,sde-dsc-pair-mask = < 0x1e 0x1e 0x1e 0x1e >;
			qcom,sde-dsc-linewidth = < 0x800 >;
			qcom,sde-dither-off = < 0x30e0 0x30e0 0x30e0 0x30e0 0x30e0 0x30e0 >;
			qcom,sde-dither-version = < 0x10000 >;
			qcom,sde-dither-size = < 0x20 >;
			qcom,sde-sspp-type = "vig\0vig\0vig\0vig\0dma\0dma\0dma\0dma";
			qcom,sde-sspp-off = < 0x5000 0x7000 0x9000 0xb000 0x25000 0x27000 0x29000 0x2b000 >;
			qcom,sde-sspp-src-size = < 0x1f8 >;
			qcom,sde-sspp-xin-id = < 0x00 0x04 0x08 0x0c 0x01 0x05 0x09 0x0d >;
			qcom,sde-sspp-excl-rect = < 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 >;
			qcom,sde-sspp-smart-dma-priority = < 0x05 0x06 0x07 0x08 0x01 0x02 0x03 0x04 >;
			qcom,sde-smart-dma-rev = "smart_dma_v2p5";
			qcom,sde-mixer-pair-mask = < 0x1e 0x1e 0x1e 0x1e 0x7e 0x7e >;
			qcom,sde-mixer-blend-op-off = < 0x20 0x38 0x50 0x68 0x80 0x98 0xb0 0xc8 0xe0 0xf8 0x110 >;
			qcom,sde-max-per-pipe-bw-kbps = < 0x432380 0x432380 0x432380 0x432380 0x432380 0x432380 0x432380 0x432380 >;
			qcom,sde-max-per-pipe-bw-high-kbps = < 0x50df20 0x50df20 0x50df20 0x50df20 0x50df20 0x50df20 0x50df20 0x50df20 >;
			qcom,sde-sspp-clk-ctrl = < 0x2ac 0x00 0x2b4 0x00 0x2bc 0x00 0x2c4 0x00 0x2ac 0x08 0x2b4 0x08 0x2bc 0x08 0x2c4 0x08 >;
			qcom,sde-sspp-csc-off = < 0x1a00 >;
			qcom,sde-csc-type = "csc-10bit";
			qcom,sde-qseed-type = "qseedv3lite";
			qcom,sde-sspp-qseed-off = < 0xa00 >;
			qcom,sde-mixer-linewidth = < 0xa00 >;
			qcom,sde-sspp-linewidth = < 0x1000 >;
			qcom,sde-wb-linewidth = < 0x1000 >;
			qcom,sde-mixer-blendstages = < 0x0b >;
			qcom,sde-highest-bank-bit = < 0x03 >;
			qcom,sde-ubwc-version = < 0x400 >;
			qcom,sde-ubwc-swizzle = < 0x06 >;
			qcom,sde-ubwc-bw-calc-version = < 0x01 >;
			qcom,sde-ubwc-static = < 0x01 >;
			qcom,sde-macrotile-mode = < 0x01 >;
			qcom,sde-smart-panel-align-mode = < 0x0c >;
			qcom,sde-panic-per-pipe;
			qcom,sde-has-cdp;
			qcom,sde-has-src-split;
			qcom,sde-pipe-order-version = < 0x01 >;
			qcom,sde-has-dim-layer;
			qcom,sde-has-idle-pc;
			qcom,sde-max-dest-scaler-input-linewidth = < 0x800 >;
			qcom,sde-max-dest-scaler-output-linewidth = < 0xa00 >;
			qcom,sde-max-bw-low-kbps = < 0xd10ba0 >;
			qcom,sde-max-bw-high-kbps = < 0xfd4bc0 >;
			qcom,sde-min-core-ib-kbps = < 0x493e00 >;
			qcom,sde-min-llcc-ib-kbps = < 0x00 >;
			qcom,sde-min-dram-ib-kbps = < 0xc3500 >;
			qcom,sde-dram-channels = < 0x02 >;
			qcom,sde-num-nrt-paths = < 0x00 >;
			qcom,sde-dspp-ltm-version = < 0x10000 >;
			qcom,sde-dspp-ltm-off = < 0x2a000 0x28100 >;
			qcom,sde-uidle-off = < 0x80000 >;
			qcom,sde-uidle-size = < 0x70 >;
			qcom,sde-vbif-off = < 0x00 >;
			qcom,sde-vbif-size = < 0x1040 >;
			qcom,sde-vbif-id = < 0x00 >;
			qcom,sde-vbif-memtype-0 = < 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 >;
			qcom,sde-vbif-memtype-1 = < 0x03 0x03 0x03 0x03 0x03 0x03 >;
			qcom,sde-vbif-qos-rt-remap = < 0x03 0x03 0x04 0x04 0x05 0x05 0x06 0x06 >;
			qcom,sde-vbif-qos-nrt-remap = < 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 >;
			qcom,sde-vbif-qos-cwb-remap = < 0x03 0x03 0x04 0x04 0x05 0x05 0x06 0x03 >;
			qcom,sde-vbif-qos-lutdma-remap = < 0x03 0x03 0x03 0x03 0x04 0x04 0x04 0x04 >;
			qcom,sde-danger-lut = < 0xff 0xffff 0x00 0x00 0xffff >;
			qcom,sde-safe-lut-linear = < 0x00 0xfff0 >;
			qcom,sde-safe-lut-macrotile = < 0x00 0xff00 >;
			qcom,sde-safe-lut-macrotile-qseed = < 0x00 0xff00 >;
			qcom,sde-safe-lut-nrt = < 0x00 0xffff >;
			qcom,sde-safe-lut-cwb = < 0x00 0x3ff >;
			qcom,sde-qos-lut-linear = < 0x00 0x112222 0x22335777 >;
			qcom,sde-qos-lut-macrotile = < 0x00 0x112233 0x44556677 >;
			qcom,sde-qos-lut-macrotile-qseed = < 0x00 0x112233 0x66777777 >;
			qcom,sde-qos-lut-nrt = < 0x00 0x00 0x00 >;
			qcom,sde-qos-lut-cwb = < 0x00 0x66666541 0x00 >;
			qcom,sde-cdp-setting = < 0x01 0x01 0x01 0x00 >;
			qcom,sde-qos-cpu-mask = < 0x03 >;
			qcom,sde-qos-cpu-dma-latency = < 0x12c >;
			qcom,sde-qos-cpu-irq-latency = < 0x12c >;
			qcom,sde-reg-dma-off = < 0x00 >;
			qcom,sde-reg-dma-version = < 0x10002 >;
			qcom,sde-reg-dma-trigger-off = < 0x119c >;
			qcom,sde-reg-dma-xin-id = < 0x07 >;
			qcom,sde-reg-dma-clk-ctrl = < 0x2bc 0x14 >;
			qcom,sde-secure-sid-mask = < 0x4000821 >;
			phandle = < 0x159 >;

			qcom,sde-sspp-vig-blocks {
				qcom,sde-vig-csc-off = < 0x1a00 >;
				qcom,sde-vig-qseed-off = < 0xa00 >;
				qcom,sde-vig-qseed-size = < 0xa0 >;
				qcom,sde-vig-gamut = < 0x1d00 0x60000 >;
				qcom,sde-vig-igc = < 0x1d00 0x60000 >;
				qcom,sde-vig-inverse-pma;
			};

			qcom,sde-sspp-dma-blocks {

				dgm@0 {
					qcom,sde-dma-igc = < 0x400 0x50000 >;
					qcom,sde-dma-gc = < 0x600 0x50000 >;
					qcom,sde-dma-inverse-pma;
					qcom,sde-dma-csc-off = < 0x200 >;
				};

				dgm@1 {
					qcom,sde-dma-igc = < 0x1400 0x50000 >;
					qcom,sde-dma-gc = < 0x600 0x50000 >;
					qcom,sde-dma-inverse-pma;
					qcom,sde-dma-csc-off = < 0x1200 >;
				};
			};

			qcom,sde-dspp-blocks {
				qcom,sde-dspp-igc = < 0x00 0x30001 >;
				qcom,sde-dspp-hsic = < 0x800 0x10007 >;
				qcom,sde-dspp-memcolor = < 0x880 0x10007 >;
				qcom,sde-dspp-hist = < 0x800 0x10007 >;
				qcom,sde-dspp-sixzone = < 0x900 0x10007 >;
				qcom,sde-dspp-vlut = < 0xa00 0x10008 >;
				qcom,sde-dspp-gamut = < 0x1000 0x40002 >;
				qcom,sde-dspp-pcc = < 0x1700 0x40000 >;
				qcom,sde-dspp-gc = < 0x17c0 0x10008 >;
				qcom,sde-dspp-dither = < 0x82c 0x10007 >;
			};

			qcom,platform-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,platform-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "mmcx";
					qcom,supply-min-voltage = < 0x00 >;
					qcom,supply-max-voltage = < 0x00 >;
					qcom,supply-enable-load = < 0x00 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};

			qcom,smmu_sde_unsec_cb {
				compatible = "qcom,smmu_sde_unsec";
				iommus = < 0x43 0x820 0x402 >;
				qcom,iommu-dma-addr-pool = < 0x20000 0xfffe0000 >;
				qcom,iommu-faults = "non-fatal";
				qcom,iommu-earlymap;
				phandle = < 0x361 >;
			};

			qcom,smmu_sde_sec_cb {
				compatible = "qcom,smmu_sde_sec";
				iommus = < 0x43 0x821 0x400 >;
				qcom,iommu-dma-addr-pool = < 0x20000 0xfffe0000 >;
				qcom,iommu-faults = "non-fatal";
				qcom,iommu-vmid = < 0x0a >;
				phandle = < 0x362 >;
			};

			qcom,sde-data-bus {
				qcom,msm-bus,name = "mdss_sde";
				qcom,msm-bus,num-cases = < 0x03 >;
				qcom,msm-bus,num-paths = < 0x02 >;
				qcom,msm-bus,vectors-KBps = < 0x16 0x200 0x00 0x00 0x17 0x200 0x00 0x00 0x16 0x200 0x00 0x61a800 0x17 0x200 0x00 0x61a800 0x16 0x200 0x00 0x61a800 0x17 0x200 0x00 0x61a800 >;
			};

			qcom,sde-reg-bus {
				qcom,msm-bus,name = "mdss_reg";
				qcom,msm-bus,num-cases = < 0x04 >;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x12c00 0x01 0x24e 0x00 0x249f0 0x01 0x24e 0x00 0x493e0 >;
			};
		};

		qcom,dp_display@ae90000 {
			cell-index = < 0x00 >;
			compatible = "qcom,dp-display";
			vdda-1p2-supply = < 0x6a >;
			vdda-0p9-supply = < 0x158 >;
			reg = < 0xae90000 0xdc 0xae90200 0xc0 0xae90400 0x508 0xae91000 0x94 0x88eaa00 0x200 0x88ea200 0x200 0x88ea600 0x200 0xaf02000 0x1a0 0x88ea040 0x10 0x88e8000 0x20 0xaee1000 0x34 0xae91400 0x94 >;
			reg-names = "dp_ahb\0dp_aux\0dp_link\0dp_p0\0dp_phy\0dp_ln_tx0\0dp_ln_tx1\0dp_mmss_cc\0dp_pll\0usb3_dp_com\0hdcp_physical\0dp_p1";
			interrupt-parent = < 0x159 >;
			interrupts = < 0x0c 0x00 >;
			clocks = < 0x57 0x0c 0x14 0x00 0x15 0xc5 0x57 0x12 0x57 0x15 0x57 0x1b 0x15a 0x05 0x57 0x17 0x15a 0x05 0x57 0x1a 0x57 0x16 >;
			clock-names = "core_aux_clk\0core_usb_ref_clk_src\0core_usb_pipe_clk\0link_clk\0link_iface_clk\0pixel_clk_rcg\0pixel_parent\0pixel1_clk_rcg\0pixel1_parent\0strm0_pixel_clk\0strm1_pixel_clk";
			qcom,phy-version = < 0x420 >;
			qcom,aux-cfg0-settings = [ 20 00 ];
			qcom,aux-cfg1-settings = [ 24 13 ];
			qcom,aux-cfg2-settings = [ 28 a4 ];
			qcom,aux-cfg3-settings = [ 2c 00 ];
			qcom,aux-cfg4-settings = [ 30 0a ];
			qcom,aux-cfg5-settings = [ 34 26 ];
			qcom,aux-cfg6-settings = [ 38 0a ];
			qcom,aux-cfg7-settings = [ 3c 03 ];
			qcom,aux-cfg8-settings = [ 40 b7 ];
			qcom,aux-cfg9-settings = [ 44 03 ];
			qcom,max-pclk-frequency-khz = < 0xa4cb8 >;
			qcom,mst-enable;
			qcom,widebus-enable;
			qcom,dsc-feature-enable;
			qcom,fec-feature-enable;
			qcom,max-dp-dsc-blks = < 0x02 >;
			qcom,max-dp-dsc-input-width-pixs = < 0x800 >;
			phandle = < 0x363 >;

			qcom,ctrl-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,ctrl-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "vdda-1p2";
					qcom,supply-min-voltage = < 0x124f80 >;
					qcom,supply-max-voltage = < 0x124f80 >;
					qcom,supply-enable-load = < 0x80e8 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};

			qcom,phy-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,phy-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "vdda-0p9";
					qcom,supply-min-voltage = < 0xdea80 >;
					qcom,supply-max-voltage = < 0xdea80 >;
					qcom,supply-enable-load = < 0x1ec30 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};

			qcom,core-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,core-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "refgen";
					qcom,supply-min-voltage = < 0x00 >;
					qcom,supply-max-voltage = < 0x00 >;
					qcom,supply-enable-load = < 0x00 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};
		};

		qcom,sde_rscc@af20000 {
			cell-index = < 0x00 >;
			compatible = "qcom,sde-rsc";
			reg = < 0xaf20000 0x3c50 0xaf30000 0x3fd4 >;
			reg-names = "drv\0wrapper";
			qcom,sde-rsc-version = < 0x03 >;
			qcom,sde-dram-channels = < 0x02 >;
			vdd-supply = < 0x5c >;
			clocks = < 0x57 0x35 0x57 0x2d 0x57 0x34 >;
			clock-names = "vsync_clk\0gdsc_clk\0iface_clk";
			phandle = < 0x364 >;

			qcom,sde-data-bus {
				qcom,msm-bus,name = "disp_rsc_mnoc_llcc";
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-cases = < 0x03 >;
				qcom,msm-bus,num-paths = < 0x02 >;
				qcom,msm-bus,vectors-KBps = < 0x4e23 0x5021 0x00 0x00 0x4e24 0x5021 0x00 0x00 0x4e23 0x5021 0x00 0x61a800 0x4e24 0x5021 0x00 0x61a800 0x4e23 0x5021 0x00 0x61a800 0x4e24 0x5021 0x00 0x61a800 >;
			};

			qcom,sde-ebi-bus {
				qcom,msm-bus,name = "disp_rsc_ebi";
				qcom,msm-bus,active-only;
				qcom,msm-bus,num-cases = < 0x03 >;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x4e20 0x5020 0x00 0x00 0x4e20 0x5020 0x00 0x61a800 0x4e20 0x5020 0x00 0x61a800 >;
			};

			qcom,sde-reg-bus {
				qcom,msm-bus,name = "disp_rsc_reg";
				qcom,msm-bus,num-cases = < 0x04 >;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x12c00 0x01 0x24e 0x00 0x249f0 0x01 0x24e 0x00 0x493e0 >;
			};
		};

		qcom,mdss_dsi_ctrl0@ae94000 {
			compatible = "qcom,dsi-ctrl-hw-v2.4";
			label = "dsi-ctrl-0";
			cell-index = < 0x00 >;
			frame-threshold-time-us = < 0x320 >;
			reg = < 0xae94000 0x400 0xaf08000 0x04 >;
			reg-names = "dsi_ctrl\0disp_cc_base";
			interrupt-parent = < 0x159 >;
			interrupts = < 0x04 0x00 >;
			vdda-1p2-supply = < 0x6a >;
			refgen-supply = < 0x94 >;
			clocks = < 0x57 0x02 0x57 0x03 0x57 0x05 0x57 0x2e 0x57 0x2f 0x57 0x26 >;
			clock-names = "byte_clk\0byte_clk_rcg\0byte_intf_clk\0pixel_clk\0pixel_clk_rcg\0esc_clk";
			phandle = < 0x365 >;

			qcom,ctrl-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,ctrl-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "vdda-1p2";
					qcom,supply-min-voltage = < 0x124f80 >;
					qcom,supply-max-voltage = < 0x124f80 >;
					qcom,supply-enable-load = < 0x684c >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};

			qcom,core-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,core-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "refgen";
					qcom,supply-min-voltage = < 0x00 >;
					qcom,supply-max-voltage = < 0x00 >;
					qcom,supply-enable-load = < 0x00 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};
		};

		qcom,mdss_dsi_ctrl1@ae96000 {
			compatible = "qcom,dsi-ctrl-hw-v2.4";
			label = "dsi-ctrl-1";
			cell-index = < 0x01 >;
			frame-threshold-time-us = < 0x320 >;
			reg = < 0xae96000 0x400 0xaf08000 0x04 >;
			reg-names = "dsi_ctrl\0disp_cc_base";
			interrupt-parent = < 0x159 >;
			interrupts = < 0x05 0x00 >;
			vdda-1p2-supply = < 0x6a >;
			refgen-supply = < 0x94 >;
			clocks = < 0x57 0x06 0x57 0x07 0x57 0x09 0x57 0x30 0x57 0x31 0x57 0x28 >;
			clock-names = "byte_clk\0byte_clk_rcg\0byte_intf_clk\0pixel_clk\0pixel_clk_rcg\0esc_clk";
			phandle = < 0x366 >;

			qcom,ctrl-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,ctrl-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "vdda-1p2";
					qcom,supply-min-voltage = < 0x124f80 >;
					qcom,supply-max-voltage = < 0x124f80 >;
					qcom,supply-enable-load = < 0x684c >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};

			qcom,core-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,core-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "refgen";
					qcom,supply-min-voltage = < 0x00 >;
					qcom,supply-max-voltage = < 0x00 >;
					qcom,supply-enable-load = < 0x00 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};
		};

		qcom,mdss_dsi_phy0@ae94400 {
			compatible = "qcom,dsi-phy-v4.1";
			label = "dsi-phy-0";
			cell-index = < 0x00 >;
			reg = < 0xae94400 0x7c0 0xae94200 0x100 >;
			reg-names = "dsi_phy\0dyn_refresh_base";
			vdda-0p9-supply = < 0x69 >;
			qcom,platform-strength-ctrl = [ 55 03 55 03 55 03 55 03 55 00 ];
			qcom,platform-lane-config = < 0xa0a 0xa0a 0xa0a 0xa0a 0x8a8a >;
			qcom,platform-regulator-settings = [ 1d 1d 1d 1d 1d ];
			phandle = < 0x367 >;

			qcom,phy-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,phy-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "vdda-0p9";
					qcom,supply-min-voltage = < 0xd6d80 >;
					qcom,supply-max-voltage = < 0xd6d80 >;
					qcom,supply-enable-load = < 0xb3b0 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};
		};

		qcom,mdss_dsi_phy1@ae96400 {
			compatible = "qcom,dsi-phy-v4.1";
			label = "dsi-phy-1";
			cell-index = < 0x01 >;
			reg = < 0xae96400 0x7c0 0xae96200 0x100 >;
			reg-names = "dsi_phy\0dyn_refresh_base";
			vdda-0p9-supply = < 0x69 >;
			qcom,platform-strength-ctrl = [ 55 03 55 03 55 03 55 03 55 00 ];
			qcom,platform-regulator-settings = [ 1d 1d 1d 1d 1d ];
			qcom,platform-lane-config = < 0xa0a 0xa0a 0xa0a 0xa0a 0x8a8a >;
			phandle = < 0x368 >;

			qcom,phy-supply-entries {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;

				qcom,phy-supply-entry@0 {
					reg = < 0x00 >;
					qcom,supply-name = "vdda-0p9";
					qcom,supply-min-voltage = < 0xd6d80 >;
					qcom,supply-max-voltage = < 0xd6d80 >;
					qcom,supply-enable-load = < 0xb3b0 >;
					qcom,supply-disable-load = < 0x00 >;
				};
			};
		};

		qcom,mdss_dsi_pll@ae94900 {
			compatible = "qcom,mdss_dsi_pll_7nm_v4_1";
			label = "MDSS DSI 0 PLL";
			cell-index = < 0x00 >;
			#clock-cells = < 0x01 >;
			reg = < 0xae94900 0x260 0xae94400 0x800 0xaf03000 0x08 0xae94200 0x100 >;
			reg-names = "pll_base\0phy_base\0gdsc_base\0dynamic_pll_base";
			clocks = < 0x57 0x00 >;
			clock-names = "iface_clk";
			clock-rate = < 0x00 >;
			memory-region = < 0x15b >;
			qcom,dsi-pll-ssc-en;
			qcom,dsi-pll-ssc-mode = "down-spread";
			phandle = < 0x369 >;
		};

		qcom,mdss_dsi_pll@ae96900 {
			compatible = "qcom,mdss_dsi_pll_7nm_v4_1";
			label = "MDSS DSI 1 PLL";
			cell-index = < 0x01 >;
			#clock-cells = < 0x01 >;
			reg = < 0xae96900 0x260 0xae96400 0x800 0xaf03000 0x08 0xae96200 0x100 >;
			reg-names = "pll_base\0phy_base\0gdsc_base\0dynamic_pll_base";
			clocks = < 0x57 0x00 >;
			clock-names = "iface_clk";
			clock-rate = < 0x00 >;
			qcom,dsi-pll-ssc-en;
			qcom,dsi-pll-ssc-mode = "down-spread";
			phandle = < 0x36a >;
		};

		qcom,mdss_dp_pll@c011000 {
			compatible = "qcom,mdss_dp_pll_7nm";
			label = "MDSS DP PLL";
			cell-index = < 0x00 >;
			#clock-cells = < 0x01 >;
			reg = < 0x88ea000 0x200 0x88eaa00 0x200 0x88ea200 0x200 0x88ea2b8 0x08 0x88ea2e8 0x04 0x88ea600 0x200 0x88ea6b8 0x08 0x88ea6e8 0x04 0xaf03000 0x08 >;
			reg-names = "pll_base\0phy_base\0ln_tx0_base\0ln_tx0_tran_base\0ln_tx0_vmode_base\0ln_tx1_base\0ln_tx1_tran_base\0ln_tx1_vmode_base\0gdsc_base";
			clocks = < 0x57 0x00 0x14 0x00 0x15 0x18 0x15 0xc5 >;
			clock-names = "iface_clk\0ref_clk_src\0gcc_iface\0pipe_clk";
			clock-rate = < 0x00 >;
			phandle = < 0x15a >;
		};

		qcom,smp2p_interrupt_rdbg_2_out {
			compatible = "qcom,smp2p-interrupt-rdbg-2-out";
			qcom,smem-states = < 0x15c 0x00 >;
			qcom,smem-state-names = "rdbg-smp2p-out";
		};

		qcom,smp2p_interrupt_rdbg_2_in {
			compatible = "qcom,smp2p-interrupt-rdbg-2-in";
			interrupts-extended = < 0x15d 0x00 0x00 >;
			interrupt-names = "rdbg-smp2p-in";
		};

		qcom,smp2p_interrupt_rdbg_5_out {
			compatible = "qcom,smp2p-interrupt-rdbg-5-out";
			qcom,smem-states = < 0x15e 0x00 >;
			qcom,smem-state-names = "rdbg-smp2p-out";
		};

		qcom,smp2p_interrupt_rdbg_5_in {
			compatible = "qcom,smp2p-interrupt-rdbg-5-in";
			interrupts-extended = < 0x15f 0x00 0x00 >;
			interrupt-names = "rdbg-smp2p-in";
		};

		qcom,lpm-levels {
			compatible = "qcom,lpm-levels";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;

			qcom,pm-cluster@0 {
				reg = < 0x00 >;
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;
				label = "L3";
				qcom,clstr-tmr-add = < 0x3e8 >;
				qcom,psci-mode-shift = < 0x04 >;
				qcom,psci-mode-mask = < 0xfff >;

				qcom,pm-cluster-level@0 {
					reg = < 0x00 >;
					label = "l3-wfi";
					qcom,psci-mode = < 0x01 >;
					qcom,entry-latency-us = < 0x30 >;
					qcom,exit-latency-us = < 0x33 >;
					qcom,min-residency-us = < 0x63 >;
				};

				qcom,pm-cluster-level@1 {
					reg = < 0x01 >;
					label = "llcc-off";
					qcom,psci-mode = < 0xc24 >;
					qcom,entry-latency-us = < 0xcbf >;
					qcom,exit-latency-us = < 0x19a2 >;
					qcom,min-residency-us = < 0x2703 >;
					qcom,min-child-idx = < 0x01 >;
					qcom,is-reset;
					qcom,notify-rpm;
				};

				qcom,pm-cpu@0 {
					reg = < 0x00 >;
					#address-cells = < 0x01 >;
					#size-cells = < 0x00 >;
					qcom,psci-mode-shift = < 0x00 >;
					qcom,psci-mode-mask = < 0x0f >;
					qcom,ref-stddev = < 0x1f4 >;
					qcom,tmr-add = < 0x3e8 >;
					qcom,ref-premature-cnt = < 0x01 >;
					qcom,disable-ipi-prediction;
					qcom,cpu = < 0x0c 0x0d 0x0e 0x0f >;

					qcom,pm-cpu-level@0 {
						reg = < 0x00 >;
						label = "wfi";
						qcom,psci-cpu-mode = < 0x01 >;
						qcom,entry-latency-us = < 0x39 >;
						qcom,exit-latency-us = < 0x2b >;
						qcom,min-residency-us = < 0x64 >;
					};

					qcom,pm-cpu-level@1 {
						reg = < 0x01 >;
						label = "rail-pc";
						qcom,psci-cpu-mode = < 0x04 >;
						qcom,entry-latency-us = < 0x168 >;
						qcom,exit-latency-us = < 0x213 >;
						qcom,min-residency-us = < 0xf5e >;
						qcom,is-reset;
						qcom,use-broadcast-timer;
					};
				};

				qcom,pm-cpu@1 {
					reg = < 0x01 >;
					#address-cells = < 0x01 >;
					#size-cells = < 0x00 >;
					qcom,psci-mode-shift = < 0x00 >;
					qcom,psci-mode-mask = < 0x0f >;
					qcom,disable-ipi-prediction;
					qcom,cpu = < 0x10 0x11 0x12 0x13 >;

					qcom,pm-cpu-level@2 {
						reg = < 0x02 >;
						label = "wfi";
						qcom,psci-cpu-mode = < 0x01 >;
						qcom,entry-latency-us = < 0x39 >;
						qcom,exit-latency-us = < 0x2b >;
						qcom,min-residency-us = < 0x53 >;
					};

					qcom,pm-cpu-level@3 {
						reg = < 0x03 >;
						label = "rail-pc";
						qcom,psci-cpu-mode = < 0x04 >;
						qcom,entry-latency-us = < 0x2be >;
						qcom,exit-latency-us = < 0x425 >;
						qcom,min-residency-us = < 0x1188 >;
						qcom,is-reset;
						qcom,use-broadcast-timer;
					};
				};
			};
		};

		qcom,rpm-stats@c3f0004 {
			compatible = "qcom,rpm-stats";
			reg = < 0xc300000 0x1000 0xc3f0004 0x04 >;
			reg-names = "phys_addr_base\0offset_addr";
			qcom,num-records = < 0x03 >;
		};

		qcom,ddr-stats@c3f0000 {
			compatible = "qcom,ddr-stats";
			reg = < 0xc300000 0x1000 0xc3f001c 0x04 >;
			reg-names = "phys_addr_base\0offset_addr";
		};

		qcom,rpmh-master-stats@b221200 {
			compatible = "qcom,rpmh-master-stats-v1";
			reg = < 0xb221200 0x60 >;
		};

		qcom,cam-req-mgr {
			compatible = "qcom,cam-req-mgr";
			status = "ok";
		};

		qcom,csiphy@ac6a000 {
			cell-index = < 0x00 >;
			compatible = "qcom,csiphy-v1.2.1\0qcom,csiphy";
			reg = < 0xac6a000 0x2000 >;
			reg-names = "csiphy";
			reg-cam-base = < 0x6a000 >;
			interrupts = < 0x00 0x1dd 0x01 >;
			interrupt-names = "csiphy";
			gdscr-supply = < 0x160 >;
			refgen-supply = < 0x94 >;
			regulator-names = "gdscr\0refgen";
			csi-vdd-voltage = < 0x124f80 >;
			mipi-csi-vdd-supply = < 0x6a >;
			clocks = < 0x58 0x0e 0x58 0x1b 0x58 0x10 0x58 0x0f >;
			clock-names = "cphy_rx_clk_src\0csiphy0_clk\0csi0phytimer_clk_src\0csi0phytimer_clk";
			src-clock-name = "csi0phytimer_clk_src";
			clock-cntl-level = "turbo";
			clock-rates = < 0x17d78400 0x00 0x11e1a300 0x00 >;
			status = "ok";
			phandle = < 0x36b >;
		};

		qcom,csiphy@ac6c000 {
			cell-index = < 0x01 >;
			compatible = "qcom,csiphy-v1.2.1\0qcom,csiphy";
			reg = < 0xac6c000 0x2000 >;
			reg-names = "csiphy";
			reg-cam-base = < 0x6c000 >;
			interrupts = < 0x00 0x1de 0x01 >;
			interrupt-names = "csiphy";
			gdscr-supply = < 0x160 >;
			refgen-supply = < 0x94 >;
			regulator-names = "gdscr\0refgen";
			csi-vdd-voltage = < 0x124f80 >;
			mipi-csi-vdd-supply = < 0x6a >;
			clocks = < 0x58 0x0e 0x58 0x1c 0x58 0x12 0x58 0x11 >;
			clock-names = "cphy_rx_clk_src\0csiphy1_clk\0csi1phytimer_clk_src\0csi1phytimer_clk";
			src-clock-name = "csi1phytimer_clk_src";
			clock-cntl-level = "turbo";
			clock-rates = < 0x17d78400 0x00 0x11e1a300 0x00 >;
			status = "ok";
			phandle = < 0x36c >;
		};

		qcom,csiphy@ac6e000 {
			cell-index = < 0x02 >;
			compatible = "qcom,csiphy-v1.2.1\0qcom,csiphy";
			reg = < 0xac6e000 0x2000 >;
			reg-names = "csiphy";
			reg-cam-base = < 0x6e000 >;
			interrupts = < 0x00 0x1df 0x01 >;
			interrupt-names = "csiphy";
			gdscr-supply = < 0x160 >;
			refgen-supply = < 0x94 >;
			regulator-names = "gdscr\0refgen";
			csi-vdd-voltage = < 0x124f80 >;
			mipi-csi-vdd-supply = < 0x6a >;
			clocks = < 0x58 0x0e 0x58 0x1d 0x58 0x14 0x58 0x13 >;
			clock-names = "cphy_rx_clk_src\0csiphy2_clk\0csi2phytimer_clk_src\0csi2phytimer_clk";
			src-clock-name = "csi2phytimer_clk_src";
			clock-cntl-level = "turbo";
			clock-rates = < 0x17d78400 0x00 0x11e1a300 0x00 >;
			status = "ok";
			phandle = < 0x36d >;
		};

		qcom,csiphy@ac70000 {
			cell-index = < 0x03 >;
			compatible = "qcom,csiphy-v1.2.1\0qcom,csiphy";
			reg = < 0xac70000 0x2000 >;
			reg-names = "csiphy";
			reg-cam-base = < 0x70000 >;
			interrupts = < 0x00 0x1c0 0x01 >;
			interrupt-names = "csiphy";
			gdscr-supply = < 0x160 >;
			refgen-supply = < 0x94 >;
			regulator-names = "gdscr\0refgen";
			csi-vdd-voltage = < 0x124f80 >;
			mipi-csi-vdd-supply = < 0x6a >;
			clocks = < 0x58 0x0e 0x58 0x1e 0x58 0x16 0x58 0x15 >;
			clock-names = "cphy_rx_clk_src\0csiphy3_clk\0csi3phytimer_clk_src\0csi3phytimer_clk";
			src-clock-name = "csi3phytimer_clk_src";
			clock-cntl-level = "turbo";
			clock-rates = < 0x17d78400 0x00 0x11e1a300 0x00 >;
			status = "ok";
			phandle = < 0x36e >;
		};

		qcom,csiphy@ac72000 {
			cell-index = < 0x04 >;
			compatible = "qcom,csiphy-v1.2.1\0qcom,csiphy";
			reg = < 0xac72000 0x2000 >;
			reg-names = "csiphy";
			reg-cam-base = < 0x72000 >;
			interrupts = < 0x00 0x56 0x01 >;
			interrupt-names = "csiphy";
			gdscr-supply = < 0x160 >;
			refgen-supply = < 0x94 >;
			regulator-names = "gdscr\0refgen";
			csi-vdd-voltage = < 0x124f80 >;
			mipi-csi-vdd-supply = < 0x6a >;
			clocks = < 0x58 0x0e 0x58 0x1f 0x58 0x18 0x58 0x17 >;
			clock-names = "cphy_rx_clk_src\0csiphy4_clk\0csi4phytimer_clk_src\0csi4phytimer_clk";
			src-clock-name = "csi4phytimer_clk_src";
			clock-cntl-level = "turbo";
			clock-rates = < 0x17d78400 0x00 0x11e1a300 0x00 >;
			status = "ok";
			phandle = < 0x36f >;
		};

		qcom,csiphy@ac74000 {
			cell-index = < 0x05 >;
			compatible = "qcom,csiphy-v1.2.1\0qcom,csiphy";
			reg = < 0xac74000 0x2000 >;
			reg-names = "csiphy";
			reg-cam-base = < 0x74000 >;
			interrupts = < 0x00 0x59 0x01 >;
			interrupt-names = "csiphy";
			gdscr-supply = < 0x160 >;
			refgen-supply = < 0x94 >;
			regulator-names = "gdscr\0refgen";
			csi-vdd-voltage = < 0x124f80 >;
			mipi-csi-vdd-supply = < 0x6a >;
			clocks = < 0x58 0x0e 0x58 0x20 0x58 0x1a 0x58 0x19 >;
			clock-names = "cphy_rx_clk_src\0csiphy5_clk\0csi5phytimer_clk_src\0csi5phytimer_clk";
			src-clock-name = "csi5phytimer_clk_src";
			clock-cntl-level = "turbo";
			clock-rates = < 0x17d78400 0x00 0x11e1a300 0x00 >;
			status = "ok";
			phandle = < 0x370 >;
		};

		qcom,cci@ac4f000 {
			cell-index = < 0x00 >;
			compatible = "qcom,cci";
			reg = < 0xac4f000 0x1000 >;
			reg-names = "cci";
			reg-cam-base = < 0x4f000 >;
			interrupt-names = "cci";
			interrupts = < 0x00 0x1cc 0x01 >;
			status = "ok";
			gdscr-supply = < 0x160 >;
			regulator-names = "gdscr";
			clocks = < 0x58 0x09 0x58 0x08 >;
			clock-names = "cci_0_clk_src\0cci_0_clk";
			src-clock-name = "cci_0_clk_src";
			clock-cntl-level = "lowsvs";
			clock-rates = < 0x23c3460 0x00 >;
			pinctrl-names = "cam_default\0cam_suspend";
			pinctrl-0 = < 0x161 0x162 >;
			pinctrl-1 = < 0x163 0x164 >;
			gpios = < 0x8b 0x65 0x00 0x8b 0x66 0x00 0x8b 0x67 0x00 0x8b 0x68 0x00 >;
			gpio-req-tbl-num = < 0x00 0x01 0x02 0x03 >;
			gpio-req-tbl-flags = < 0x01 0x01 0x01 0x01 >;
			gpio-req-tbl-label = "CCI_I2C_DATA0\0CCI_I2C_CLK0\0CCI_I2C_DATA1\0CCI_I2C_CLK1";
			phandle = < 0x371 >;

			qcom,i2c_standard_mode {
				hw-thigh = < 0xc9 >;
				hw-tlow = < 0xae >;
				hw-tsu-sto = < 0xcc >;
				hw-tsu-sta = < 0xe7 >;
				hw-thd-dat = < 0x16 >;
				hw-thd-sta = < 0xa2 >;
				hw-tbuf = < 0xe3 >;
				hw-scl-stretch-en = < 0x00 >;
				hw-trdhld = < 0x06 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x372 >;
			};

			qcom,i2c_fast_mode {
				hw-thigh = < 0x26 >;
				hw-tlow = < 0x38 >;
				hw-tsu-sto = < 0x28 >;
				hw-tsu-sta = < 0x28 >;
				hw-thd-dat = < 0x16 >;
				hw-thd-sta = < 0x23 >;
				hw-tbuf = < 0x3e >;
				hw-scl-stretch-en = < 0x00 >;
				hw-trdhld = < 0x06 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x373 >;
			};

			qcom,i2c_custom_mode {
				hw-thigh = < 0x26 >;
				hw-tlow = < 0x38 >;
				hw-tsu-sto = < 0x28 >;
				hw-tsu-sta = < 0x28 >;
				hw-thd-dat = < 0x16 >;
				hw-thd-sta = < 0x23 >;
				hw-tbuf = < 0x3e >;
				hw-scl-stretch-en = < 0x01 >;
				hw-trdhld = < 0x06 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x374 >;
			};

			qcom,i2c_fast_plus_mode {
				hw-thigh = < 0x10 >;
				hw-tlow = < 0x16 >;
				hw-tsu-sto = < 0x11 >;
				hw-tsu-sta = < 0x12 >;
				hw-thd-dat = < 0x10 >;
				hw-thd-sta = < 0x0f >;
				hw-tbuf = < 0x18 >;
				hw-scl-stretch-en = < 0x00 >;
				hw-trdhld = < 0x03 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x375 >;
			};
		};

		qcom,cci@ac50000 {
			cell-index = < 0x01 >;
			compatible = "qcom,cci";
			reg = < 0xac50000 0x1000 >;
			reg-names = "cci";
			reg-cam-base = < 0x50000 >;
			interrupt-names = "cci";
			interrupts = < 0x00 0x10f 0x01 >;
			status = "ok";
			gdscr-supply = < 0x160 >;
			regulator-names = "gdscr";
			clocks = < 0x58 0x0b 0x58 0x0a >;
			clock-names = "cci_1_clk_src\0cci_1_clk";
			src-clock-name = "cci_1_clk_src";
			clock-cntl-level = "lowsvs";
			clock-rates = < 0x23c3460 0x00 >;
			pinctrl-names = "cam_default\0cam_suspend";
			pinctrl-0 = < 0x165 0x166 >;
			pinctrl-1 = < 0x167 0x168 >;
			gpios = < 0x8b 0x69 0x00 0x8b 0x6a 0x00 0x8b 0x6b 0x00 0x8b 0x6c 0x00 >;
			gpio-req-tbl-num = < 0x00 0x01 0x02 0x03 >;
			gpio-req-tbl-flags = < 0x01 0x01 0x01 0x01 >;
			gpio-req-tbl-label = "CCI_I2C_DATA2\0CCI_I2C_CLK2\0CCI_I2C_DATA3\0CCI_I2C_CLK3";
			phandle = < 0x376 >;

			qcom,i2c_standard_mode {
				hw-thigh = < 0xc9 >;
				hw-tlow = < 0xae >;
				hw-tsu-sto = < 0xcc >;
				hw-tsu-sta = < 0xe7 >;
				hw-thd-dat = < 0x16 >;
				hw-thd-sta = < 0xa2 >;
				hw-tbuf = < 0xe3 >;
				hw-scl-stretch-en = < 0x00 >;
				hw-trdhld = < 0x06 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x377 >;
			};

			qcom,i2c_fast_mode {
				hw-thigh = < 0x26 >;
				hw-tlow = < 0x38 >;
				hw-tsu-sto = < 0x28 >;
				hw-tsu-sta = < 0x28 >;
				hw-thd-dat = < 0x16 >;
				hw-thd-sta = < 0x23 >;
				hw-tbuf = < 0x3e >;
				hw-scl-stretch-en = < 0x00 >;
				hw-trdhld = < 0x06 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x378 >;
			};

			qcom,i2c_custom_mode {
				hw-thigh = < 0x26 >;
				hw-tlow = < 0x38 >;
				hw-tsu-sto = < 0x28 >;
				hw-tsu-sta = < 0x28 >;
				hw-thd-dat = < 0x16 >;
				hw-thd-sta = < 0x23 >;
				hw-tbuf = < 0x3e >;
				hw-scl-stretch-en = < 0x01 >;
				hw-trdhld = < 0x06 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x379 >;
			};

			qcom,i2c_fast_plus_mode {
				hw-thigh = < 0x10 >;
				hw-tlow = < 0x16 >;
				hw-tsu-sto = < 0x11 >;
				hw-tsu-sta = < 0x12 >;
				hw-thd-dat = < 0x10 >;
				hw-thd-sta = < 0x0f >;
				hw-tbuf = < 0x18 >;
				hw-scl-stretch-en = < 0x00 >;
				hw-trdhld = < 0x03 >;
				hw-tsp = < 0x03 >;
				cci-clk-src = < 0x23c3460 >;
				status = "ok";
				phandle = < 0x37a >;
			};
		};

		qcom,cam_smmu {
			compatible = "qcom,msm-cam-smmu";
			status = "ok";

			msm_cam_smmu_ife {
				compatible = "qcom,msm-cam-smmu-cb";
				iommus = < 0x43 0x800 0x400 0x43 0x801 0x400 0x43 0x840 0x400 0x43 0x841 0x400 0x43 0xc00 0x400 0x43 0xc01 0x400 0x43 0xc40 0x400 0x43 0xc41 0x400 >;
				qcom,iommu-dma-addr-pool = < 0x7400000 0xd8c00000 >;
				label = "ife";

				iova-mem-map {
					phandle = < 0x37b >;

					iova-mem-region-io {
						iova-region-name = "io";
						iova-region-start = < 0x7400000 >;
						iova-region-len = < 0xd8c00000 >;
						iova-region-id = < 0x03 >;
						status = "ok";
					};
				};
			};

			msm_cam_smmu_jpeg {
				compatible = "qcom,msm-cam-smmu-cb";
				iommus = < 0x43 0x2040 0x400 0x43 0x2440 0x400 >;
				label = "jpeg";
				qcom,iommu-dma-addr-pool = < 0x7400000 0xd8c00000 >;

				iova-mem-map {
					phandle = < 0x37c >;

					iova-mem-region-io {
						iova-region-name = "io";
						iova-region-start = < 0x7400000 >;
						iova-region-len = < 0xd8c00000 >;
						iova-region-id = < 0x03 >;
						status = "ok";
					};
				};
			};

			msm_cam_icp_fw {
				compatible = "qcom,msm-cam-smmu-fw-dev";
				label = "icp";
				memory-region = < 0x169 >;
			};

			msm_cam_smmu_icp {
				compatible = "qcom,msm-cam-smmu-cb";
				iommus = < 0x43 0x20e2 0x400 0x43 0x24e2 0x400 0x43 0x2000 0x400 0x43 0x2001 0x400 0x43 0x2400 0x400 0x43 0x2401 0x400 0x43 0x2060 0x400 0x43 0x2061 0x400 0x43 0x2460 0x400 0x43 0x2461 0x400 0x43 0x2020 0x400 0x43 0x2021 0x400 0x43 0x2420 0x400 0x43 0x2421 0x400 >;
				label = "icp";
				qcom,iommu-dma-addr-pool = < 0x10c00000 0xee300000 >;
				iova-region-discard = < 0xdff00000 0x300000 >;

				iova-mem-map {
					phandle = < 0x37d >;

					iova-mem-region-firmware {
						iova-region-name = "firmware";
						iova-region-start = < 0x00 >;
						iova-region-len = < 0x500000 >;
						iova-region-id = < 0x00 >;
						status = "ok";
					};

					iova-mem-region-shared {
						iova-region-name = "shared";
						iova-region-start = < 0x7400000 >;
						iova-region-len = < 0x9600000 >;
						iova-region-id = < 0x01 >;
						status = "ok";
					};

					iova-mem-region-secondary-heap {
						iova-region-name = "secheap";
						iova-region-start = < 0x10a00000 >;
						iova-region-len = < 0x100000 >;
						iova-region-id = < 0x04 >;
						status = "ok";
					};

					iova-mem-region-io {
						iova-region-name = "io";
						iova-region-start = < 0x10c00000 >;
						iova-region-len = < 0xee300000 >;
						iova-region-id = < 0x03 >;
						iova-region-discard = < 0xdff00000 0x300000 >;
						status = "ok";
					};

					iova-mem-qdss-region {
						iova-region-name = "qdss";
						iova-region-start = < 0x10b00000 >;
						iova-region-len = < 0x100000 >;
						iova-region-id = < 0x05 >;
						qdss-phy-addr = < 0x16790000 >;
						status = "ok";
					};
				};
			};

			msm_cam_smmu_cpas_cdm {
				compatible = "qcom,msm-cam-smmu-cb";
				iommus = < 0x43 0x20c0 0x400 0x43 0x24c0 0x400 >;
				label = "cpas-cdm0";
				qcom,iommu-dma-addr-pool = < 0x7400000 0xd8c00000 >;

				iova-mem-map {
					phandle = < 0x37e >;

					iova-mem-region-io {
						iova-region-name = "io";
						iova-region-start = < 0x7400000 >;
						iova-region-len = < 0xd8c00000 >;
						iova-region-id = < 0x03 >;
						status = "ok";
					};
				};
			};

			msm_cam_smmu_secure {
				compatible = "qcom,msm-cam-smmu-cb";
				label = "cam-secure";
				qcom,secure-cb;
			};
		};

		qcom,cam-cpas@ac40000 {
			cell-index = < 0x00 >;
			compatible = "qcom,cam-cpas";
			label = "cpas";
			arch-compat = "cpas_top";
			status = "ok";
			reg-names = "cam_cpas_top\0cam_camnoc";
			reg = < 0xac40000 0x1000 0xac42000 0x8000 >;
			reg-cam-base = < 0x40000 0x42000 >;
			interrupt-names = "cpas_camnoc";
			interrupts = < 0x00 0x1cb 0x01 >;
			camnoc-axi-min-ib-bw = < 0xb2d05e00 >;
			regulator-names = "camss-vdd";
			camss-vdd-supply = < 0x160 >;
			clock-names = "gcc_ahb_clk\0gcc_axi_hf_clk\0gcc_axi_sf_clk\0slow_ahb_clk_src\0cpas_ahb_clk\0cpas_core_ahb_clk\0camnoc_axi_clk_src\0camnoc_axi_clk";
			clocks = < 0x15 0x0b 0x15 0x0c 0x15 0x0d 0x58 0x6d 0x58 0x0d 0x58 0x0c 0x58 0x06 0x58 0x05 >;
			src-clock-name = "camnoc_axi_clk_src";
			clock-rates = < 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x124f800 0x00 0x00 0x124f800 0x00 0x00 0x00 0x00 0x4c4b400 0x00 0x00 0x11e1a300 0x00 0x00 0x00 0x00 0x4c4b400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x00 0x4c4b400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x00 0x4c4b400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x00 0x4c4b400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x00 0x4c4b400 0x00 0x00 0x1c9c3800 0x00 >;
			clock-cntl-level = "suspend\0minsvs\0lowsvs\0svs\0svs_l1\0nominal\0nominal_l1\0turbo";
			control-camnoc-axi-clk;
			camnoc-bus-width = < 0x20 >;
			camnoc-axi-clk-bw-margin-perc = < 0x14 >;
			qcom,msm-bus,name = "cam_ahb";
			qcom,msm-bus,num-cases = < 0x08 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x12c00 0x01 0x24d 0x00 0x12c00 0x01 0x24d 0x00 0x249f0 0x01 0x24d 0x00 0x249f0 0x01 0x24d 0x00 0x493e0 0x01 0x24d 0x00 0x493e0 0x01 0x24d 0x00 0x493e0 >;
			vdd-corners = < 0x10 0x30 0x40 0x80 0xc0 0x100 0x140 0x150 0x180 0x1a0 >;
			vdd-corner-ahb-mapping = "suspend\0minsvs\0lowsvs\0svs\0svs_l1\0nominal\0nominal\0nominal\0turbo\0turbo";
			client-id-based;
			client-names = "csiphy0\0csiphy1\0csiphy2\0csiphy3\0csiphy4\0csiphy5\0cci0\0cci1\0csid0\0csid1\0csid2\0csid3\0csid4\0csid5\0csid6\0ife0\0ife1\0ife2\0ife3\0ife4\0ife5\0ife6\0custom0\0ipe0\0cam-cdm-intf0\0cpas-cdm0\0bps0\0icp0\0jpeg-dma0\0jpeg-enc0\0fd0";

			camera-bus-nodes {

				level3-nodes {
					level-index = < 0x03 >;

					level3-rt0-rd-wr-sum {
						cell-index = < 0x00 >;
						node-name = "level3-rt0-rd-wr-sum";
						traffic-merge-type = < 0x00 >;
						qcom,axi-port-name = "cam_hf_0";
						ib-bw-voting-needed;
						phandle = < 0x16a >;

						qcom,axi-port-mnoc {
							qcom,msm-bus,name = "cam_hf_0_mnoc";
							qcom,msm-bus-vector-dyn-vote;
							qcom,msm-bus,num-cases = < 0x02 >;
							qcom,msm-bus,num-paths = < 0x01 >;
							qcom,msm-bus,vectors-KBps = < 0xaa 0x200 0x00 0x00 0xaa 0x200 0x00 0x00 >;
						};
					};

					level3-nrt0-rd-wr-sum {
						cell-index = < 0x01 >;
						node-name = "level3-nrt0-rd-wr-sum";
						traffic-merge-type = < 0x00 >;
						qcom,axi-port-name = "cam_sf_0";
						phandle = < 0x16b >;

						qcom,axi-port-mnoc {
							qcom,msm-bus,name = "cam_sf_0_mnoc";
							qcom,msm-bus-vector-dyn-vote;
							qcom,msm-bus,num-cases = < 0x02 >;
							qcom,msm-bus,num-paths = < 0x01 >;
							qcom,msm-bus,vectors-KBps = < 0x89 0x200 0x00 0x00 0x89 0x200 0x00 0x00 >;
						};
					};

					level3-nrt1-rd-wr-sum {
						cell-index = < 0x02 >;
						node-name = "level3-nrt1-rd-wr-sum";
						traffic-merge-type = < 0x00 >;
						qcom,axi-port-name = "cam_sf_icp";
						phandle = < 0x16c >;

						qcom,axi-port-mnoc {
							qcom,msm-bus,name = "cam_sf_icp_mnoc";
							qcom,msm-bus-vector-dyn-vote;
							qcom,msm-bus,num-cases = < 0x02 >;
							qcom,msm-bus,num-paths = < 0x01 >;
							qcom,msm-bus,vectors-KBps = < 0xab 0x200 0x00 0x00 0xab 0x200 0x00 0x00 >;
						};
					};
				};

				level2-nodes {
					level-index = < 0x02 >;
					camnoc-max-needed;

					level2-rt0-wr {
						cell-index = < 0x03 >;
						node-name = "level2-rt0-wr";
						parent-node = < 0x16a >;
						traffic-merge-type = < 0x01 >;
						phandle = < 0x16d >;
					};

					level2-rt0-rd {
						cell-index = < 0x04 >;
						node-name = "level2-rt0-rd";
						parent-node = < 0x16a >;
						traffic-merge-type = < 0x01 >;
						phandle = < 0x16e >;
					};

					level2-nrt0-wr {
						cell-index = < 0x05 >;
						node-name = "level2-nrt0-wr";
						parent-node = < 0x16b >;
						traffic-merge-type = < 0x01 >;
						phandle = < 0x16f >;
					};

					level2-nrt0-rd {
						cell-index = < 0x06 >;
						node-name = "level2-nrt0-rd";
						parent-node = < 0x16b >;
						traffic-merge-type = < 0x01 >;
						phandle = < 0x170 >;
					};

					level2-nrt1-rd {
						cell-index = < 0x07 >;
						node-name = "level2-nrt1-rd";
						parent-node = < 0x16c >;
						traffic-merge-type = < 0x00 >;
						bus-width-factor = < 0x04 >;
						phandle = < 0x179 >;
					};
				};

				level1-nodes {
					level-index = < 0x01 >;
					camnoc-max-needed;

					level1-rt0-wr0 {
						cell-index = < 0x08 >;
						node-name = "level1-rt0-wr0";
						parent-node = < 0x16d >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x171 >;
					};

					level1-rt0-wr1 {
						cell-index = < 0x09 >;
						node-name = "level1-rt0-wr1";
						parent-node = < 0x16d >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x172 >;
					};

					level1-rt0-rd0 {
						cell-index = < 0x0a >;
						node-name = "level1-rt0-rd0";
						parent-node = < 0x16e >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x173 >;
					};

					level1-rt0-wr2 {
						cell-index = < 0x0b >;
						node-name = "level1-rt0-wr2";
						parent-node = < 0x16d >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x174 >;
					};

					level1-nrt0-wr0 {
						cell-index = < 0x0c >;
						node-name = "level1-nrt0-wr0";
						parent-node = < 0x16f >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x175 >;
					};

					level1-nrt0-rd0 {
						cell-index = < 0x0d >;
						node-name = "level1-nrt0-rd0";
						parent-node = < 0x170 >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x176 >;
					};

					level1-nrt0-wr1 {
						cell-index = < 0x0e >;
						node-name = "level1-nrt0-wr1";
						parent-node = < 0x16f >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x177 >;
					};

					level1-nrt0-rd2 {
						cell-index = < 0x0f >;
						node-name = "level1-nrt0-rd2";
						parent-node = < 0x170 >;
						traffic-merge-type = < 0x00 >;
						phandle = < 0x178 >;
					};
				};

				level0-nodes {
					level-index = < 0x00 >;

					ife0-ubwc-stats-wr {
						cell-index = < 0x10 >;
						node-name = "ife0-ubwc-stats-wr";
						client-name = "ife0";
						traffic-data = < 0x102 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x01 0x02 0x03 >;
						parent-node = < 0x171 >;
						phandle = < 0x37f >;
					};

					ife1-ubwc-stats-wr {
						cell-index = < 0x11 >;
						node-name = "ife1-ubwc-stats-wr";
						client-name = "ife1";
						traffic-data = < 0x102 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x01 0x02 0x03 >;
						parent-node = < 0x171 >;
						phandle = < 0x380 >;
					};

					ife0-linear-pdaf-wr {
						cell-index = < 0x12 >;
						node-name = "ife0-linear-pdaf-wr";
						client-name = "ife0";
						traffic-data = < 0x101 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x00 0x08 >;
						parent-node = < 0x172 >;
						phandle = < 0x381 >;
					};

					ife1-linear-pdaf-wr {
						cell-index = < 0x13 >;
						node-name = "ife1-linear-pdaf-wr";
						client-name = "ife1";
						traffic-data = < 0x101 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x00 0x08 >;
						parent-node = < 0x172 >;
						phandle = < 0x382 >;
					};

					ife2-rdi-all-wr {
						cell-index = < 0x14 >;
						node-name = "ife2-rdi-all-wr";
						client-name = "ife2";
						traffic-data = < 0x105 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x04 0x05 0x06 0x07 >;
						parent-node = < 0x172 >;
						phandle = < 0x383 >;
					};

					ife3-rdi-all-wr {
						cell-index = < 0x15 >;
						node-name = "ife3-rdi-all-wr";
						client-name = "ife3";
						traffic-data = < 0x105 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x04 0x05 0x06 0x07 >;
						parent-node = < 0x172 >;
						phandle = < 0x384 >;
					};

					ife4-rdi-all-wr {
						cell-index = < 0x16 >;
						node-name = "ife4-rdi-all-wr";
						client-name = "ife4";
						traffic-data = < 0x105 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x04 0x05 0x06 0x07 >;
						parent-node = < 0x172 >;
						phandle = < 0x385 >;
					};

					ife5-rdi-all-wr {
						cell-index = < 0x17 >;
						node-name = "ife5-rdi-all-wr";
						client-name = "ife5";
						traffic-data = < 0x105 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x04 0x05 0x06 0x07 >;
						parent-node = < 0x172 >;
						phandle = < 0x386 >;
					};

					ife0-rdi-all-rd {
						cell-index = < 0x18 >;
						node-name = "ife0-rdi-all-rd";
						client-name = "ife0";
						traffic-data = < 0x105 >;
						traffic-transaction-type = < 0x00 >;
						constituent-paths = < 0x04 0x05 0x06 0x07 >;
						parent-node = < 0x173 >;
						phandle = < 0x387 >;
					};

					ife1-rdi-all-rd {
						cell-index = < 0x19 >;
						node-name = "ife1-rdi-all-rd";
						client-name = "ife1";
						traffic-data = < 0x105 >;
						traffic-transaction-type = < 0x00 >;
						constituent-paths = < 0x04 0x05 0x06 0x07 >;
						parent-node = < 0x173 >;
						phandle = < 0x388 >;
					};

					custom0-all-rd {
						cell-index = < 0x1a >;
						node-name = "custom0-all-rd";
						client-name = "custom0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x173 >;
						phandle = < 0x389 >;
					};

					ife0-rdi-pixel-raw-wr {
						cell-index = < 0x1b >;
						node-name = "ife0-rdi-pixel-raw-wr";
						client-name = "ife0";
						traffic-data = < 0x104 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x04 0x05 0x06 0x09 >;
						parent-node = < 0x174 >;
						phandle = < 0x38a >;
					};

					ife1-rdi-pixel-raw-wr {
						cell-index = < 0x1c >;
						node-name = "ife1-rdi-pixel-raw-wr";
						client-name = "ife1";
						traffic-data = < 0x104 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x04 0x05 0x06 0x09 >;
						parent-node = < 0x174 >;
						phandle = < 0x38b >;
					};

					ife6-rdi-all-wr {
						cell-index = < 0x1d >;
						node-name = "ife6-rdi-all-wr";
						client-name = "ife6";
						traffic-data = < 0x105 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x04 0x05 0x06 0x07 >;
						parent-node = < 0x174 >;
						phandle = < 0x38c >;
					};

					custom0-all-wr {
						cell-index = < 0x1e >;
						node-name = "custom0-all-wr";
						client-name = "custom0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x01 >;
						parent-node = < 0x174 >;
						phandle = < 0x38d >;
					};

					ipe0-all-wr {
						cell-index = < 0x1f >;
						node-name = "ipe0-all-wr";
						client-name = "ipe0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x01 >;
						constituent-paths = < 0x22 0x23 0x24 >;
						parent-node = < 0x175 >;
						phandle = < 0x38e >;
					};

					bps0-all-wr {
						cell-index = < 0x20 >;
						node-name = "bps0-all-wr";
						client-name = "bps0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x01 >;
						parent-node = < 0x175 >;
						phandle = < 0x38f >;
					};

					ipe0-ref-rd {
						cell-index = < 0x21 >;
						node-name = "ipe0-ref-rd";
						client-name = "ipe0";
						traffic-data = < 0x21 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x176 >;
						phandle = < 0x390 >;
					};

					bps0-all-rd {
						cell-index = < 0x22 >;
						node-name = "bps0-all-rd";
						client-name = "bps0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x176 >;
						phandle = < 0x391 >;
					};

					ipe0-in-rd {
						cell-index = < 0x23 >;
						node-name = "ipe0-in-rd";
						client-name = "ipe0";
						traffic-data = < 0x20 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x170 >;
						phandle = < 0x392 >;
					};

					jpeg-enc0-all-wr {
						cell-index = < 0x24 >;
						node-name = "jpeg-enc0-all-wr";
						client-name = "jpeg-enc0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x01 >;
						parent-node = < 0x177 >;
						phandle = < 0x393 >;
					};

					jpeg-dma0-all-wr {
						cell-index = < 0x25 >;
						node-name = "jpeg-dma0-all-wr";
						client-name = "jpeg-dma0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x01 >;
						parent-node = < 0x177 >;
						phandle = < 0x394 >;
					};

					jpeg-enc0-all-rd {
						cell-index = < 0x26 >;
						node-name = "jpeg-enc0-all-rd";
						client-name = "jpeg-enc0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x178 >;
						phandle = < 0x395 >;
					};

					jpeg-dma0-all-rd {
						cell-index = < 0x27 >;
						node-name = "jpeg-dma0-all-rd";
						client-name = "jpeg-dma0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x178 >;
						phandle = < 0x396 >;
					};

					fd0-all-wr {
						cell-index = < 0x28 >;
						node-name = "fd0-all-wr";
						client-name = "fd0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x01 >;
						parent-node = < 0x16f >;
						phandle = < 0x397 >;
					};

					fd0-all-rd {
						cell-index = < 0x29 >;
						node-name = "fd0-all-rd";
						client-name = "fd0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x170 >;
						phandle = < 0x398 >;
					};

					cpas-cdm0-all-rd {
						cell-index = < 0x2a >;
						node-name = "cpas-cdm0-all-rd";
						client-name = "cpas-cdm0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x170 >;
						phandle = < 0x399 >;
					};

					icp0-all-rd {
						cell-index = < 0x2b >;
						node-name = "icp0-all-rd";
						client-name = "icp0";
						traffic-data = < 0x100 >;
						traffic-transaction-type = < 0x00 >;
						parent-node = < 0x179 >;
						phandle = < 0x39a >;
					};
				};
			};
		};

		qcom,cam-cdm-intf {
			compatible = "qcom,cam-cdm-intf";
			cell-index = < 0x00 >;
			label = "cam-cdm-intf";
			num-hw-cdm = < 0x03 >;
			cdm-client-names = "vfe\0jpegdma\0jpegenc\0fd";
			status = "ok";
		};

		qcom,cpas-cdm0@ac4d000 {
			cell-index = < 0x00 >;
			compatible = "qcom,cam170-cpas-cdm0";
			label = "cpas-cdm";
			reg = < 0xac4d000 0x1000 >;
			reg-names = "cpas-cdm";
			reg-cam-base = < 0x4d000 >;
			interrupts = < 0x00 0x1cd 0x01 >;
			interrupt-names = "cpas-cdm";
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "cam_cc_cpas_slow_ahb_clk\0cam_cc_cpas_ahb_clk";
			clocks = < 0x58 0x6d 0x58 0x0d >;
			clock-rates = < 0x00 0x00 >;
			clock-cntl-level = "svs";
			cdm-client-names = "ife";
			status = "ok";
		};

		qcom,cpas-cdm1@acb4200 {
			cell-index = < 0x01 >;
			compatible = "qcom,cam480-cpas-cdm1";
			label = "cpas-cdm";
			reg = < 0xacb4200 0x1000 >;
			reg-names = "cpas-cdm";
			reg-cam-base = < 0xb4200 >;
			interrupts = < 0x00 0x1c8 0x01 >;
			interrupt-names = "cpas-cdm";
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "cam_cc_cpas_slow_ahb_clk\0cam_cc_cpas_ahb_clk";
			clocks = < 0x58 0x6d 0x58 0x0d >;
			clock-rates = < 0x00 0x00 >;
			clock-cntl-level = "svs";
			cdm-client-names = "ife0";
			status = "disabled";
		};

		qcom,cpas-cdm2@acc3200 {
			cell-index = < 0x02 >;
			compatible = "qcom,cam480-cpas-cdm2";
			label = "cpas-cdm";
			reg = < 0xacc3200 0x1000 >;
			reg-names = "cpas-cdm";
			reg-cam-base = < 0xc3200 >;
			interrupts = < 0x00 0x11f 0x01 >;
			interrupt-names = "cpas-cdm";
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "cam_cc_cpas_slow_ahb_clk\0cam_cc_cpas_ahb_clk";
			clocks = < 0x58 0x6d 0x58 0x0d >;
			clock-rates = < 0x00 0x00 >;
			clock-cntl-level = "svs";
			cdm-client-names = "ife1";
			status = "disabled";
		};

		qcom,cam-isp {
			compatible = "qcom,cam-isp";
			arch-compat = "ife";
			status = "ok";
		};

		qcom,csid0@acb5200 {
			cell-index = < 0x00 >;
			compatible = "qcom,csid480";
			reg-names = "csid";
			reg = < 0xacb5200 0x1000 >;
			reg-cam-base = < 0xb5200 >;
			interrupt-names = "csid";
			interrupts = < 0x00 0x1d0 0x01 >;
			regulator-names = "camss\0ife0";
			camss-supply = < 0x160 >;
			ife0-supply = < 0x17a >;
			clock-names = "ife_csid_clk_src\0ife_csid_clk\0cphy_rx_clk_src\0ife_cphy_rx_clk\0ife_clk_src\0ife_clk\0ife_0_areg\0ife_0_ahb\0ife_axi_clk";
			clocks = < 0x58 0x30 0x58 0x2f 0x58 0x0e 0x58 0x2e 0x58 0x2d 0x58 0x2c 0x58 0x2a 0x58 0x29 0x58 0x2b >;
			clock-rates = < 0x17d78400 0x00 0x17d78400 0x00 0x14dc9380 0x00 0x5f5e100 0x00 0x00 0x17d78400 0x00 0x17d78400 0x00 0x1c4fecc0 0x00 0xbebc200 0x00 0x00 0x17d78400 0x00 0x17d78400 0x00 0x22551000 0x00 0x11e1a300 0x00 0x00 0x17d78400 0x00 0x17d78400 0x00 0x2aea5400 0x00 0x17d78400 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_csid_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x39b >;
		};

		qcom,ife0@acb4000 {
			cell-index = < 0x00 >;
			compatible = "qcom,vfe480";
			reg-names = "ife\0cam_camnoc";
			reg = < 0xacb4000 0xd000 0xac42000 0x8000 >;
			reg-cam-base = < 0xb4000 0x42000 >;
			interrupt-names = "ife";
			interrupts = < 0x00 0x1d1 0x01 >;
			regulator-names = "camss\0ife0";
			camss-supply = < 0x160 >;
			ife0-supply = < 0x17a >;
			clock-names = "ife_0_ahb\0ife_0_areg\0ife_clk_src\0ife_clk\0ife_axi_clk";
			clocks = < 0x58 0x29 0x58 0x2a 0x58 0x2d 0x58 0x2c 0x58 0x2b >;
			clock-rates = < 0x00 0x5f5e100 0x14dc9380 0x00 0x00 0x00 0xbebc200 0x1c4fecc0 0x00 0x00 0x00 0x11e1a300 0x22551000 0x00 0x00 0x00 0x17d78400 0x2aea5400 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_clk_src";
			scl-clk-names = "ife_0_areg";
			clock-control-debugfs = "true";
			clock-names-option = "ife_dsp_clk";
			clocks-option = < 0x58 0x31 >;
			clock-rates-option = < 0x2aea5400 >;
			ubwc-static-cfg = < 0x1026 0x1036 >;
			status = "ok";
			phandle = < 0x39c >;
		};

		qcom,csid1@acc4200 {
			cell-index = < 0x01 >;
			compatible = "qcom,csid480";
			reg-names = "csid";
			reg = < 0xacc4200 0x1000 >;
			reg-cam-base = < 0xc4200 >;
			interrupt-names = "csid";
			interrupts = < 0x00 0x1d2 0x01 >;
			regulator-names = "camss\0ife1";
			camss-supply = < 0x160 >;
			ife1-supply = < 0x17b >;
			clock-names = "ife_csid_clk_src\0ife_csid_clk\0cphy_rx_clk_src\0ife_cphy_rx_clk\0ife_clk_src\0ife_clk\0ife_1_areg\0ife_1_ahb\0ife_axi_clk";
			clocks = < 0x58 0x39 0x58 0x38 0x58 0x0e 0x58 0x37 0x58 0x36 0x58 0x35 0x58 0x33 0x58 0x32 0x58 0x34 >;
			clock-rates = < 0x17d78400 0x00 0x17d78400 0x00 0x14dc9380 0x00 0x5f5e100 0x00 0x00 0x17d78400 0x00 0x17d78400 0x00 0x1c4fecc0 0x00 0xbebc200 0x00 0x00 0x17d78400 0x00 0x17d78400 0x00 0x22551000 0x00 0x11e1a300 0x00 0x00 0x17d78400 0x00 0x17d78400 0x00 0x2aea5400 0x00 0x17d78400 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_csid_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x39d >;
		};

		qcom,ife1@acc3000 {
			cell-index = < 0x01 >;
			compatible = "qcom,vfe480";
			reg-names = "ife\0cam_camnoc";
			reg = < 0xacc3000 0xd000 0xac42000 0x8000 >;
			reg-cam-base = < 0xc3000 0x42000 >;
			interrupt-names = "ife";
			interrupts = < 0x00 0x1d3 0x01 >;
			regulator-names = "camss\0ife1";
			camss-supply = < 0x160 >;
			ife1-supply = < 0x17b >;
			clock-names = "ife_1_ahb\0ife_1_areg\0ife_clk_src\0ife_clk\0ife_axi_clk";
			clocks = < 0x58 0x32 0x58 0x33 0x58 0x36 0x58 0x35 0x58 0x34 >;
			clock-rates = < 0x00 0x5f5e100 0x14dc9380 0x00 0x00 0x00 0xbebc200 0x1c4fecc0 0x00 0x00 0x00 0x11e1a300 0x22551000 0x00 0x00 0x00 0x17d78400 0x2aea5400 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_clk_src";
			scl-clk-names = "ife_1_areg";
			clock-control-debugfs = "true";
			clock-names-option = "ife_dsp_clk";
			clocks-option = < 0x58 0x3a >;
			clock-rates-option = < 0x2aea5400 >;
			ubwc-static-cfg = < 0x1026 0x1036 >;
			status = "ok";
			phandle = < 0x39e >;
		};

		qcom,csid-lite0@acd9200 {
			cell-index = < 0x02 >;
			compatible = "qcom,csid-lite480";
			reg-names = "csid-lite";
			reg = < 0xacd9200 0x1000 >;
			reg-cam-base = < 0xd9200 >;
			interrupt-names = "csid-lite";
			interrupts = < 0x00 0x1d4 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_csid_clk_src\0ife_csid_clk\0cphy_rx_clk_src\0ife_cphy_rx_clk\0ife_clk_src\0ife_lite_ahb\0ife_clk";
			clocks = < 0x58 0x41 0x58 0x40 0x58 0x0e 0x58 0x3f 0x58 0x3e 0x58 0x3b 0x58 0x3d >;
			clock-rates = < 0x17d78400 0x00 0x00 0x00 0x17d78400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_csid_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x39f >;
		};

		qcom,ife-lite0@acd9000 {
			cell-index = < 0x02 >;
			compatible = "qcom,vfe-lite480";
			reg-names = "ife-lite";
			reg = < 0xacd9000 0x2200 >;
			reg-cam-base = < 0xd9000 >;
			interrupt-names = "ife-lite";
			interrupts = < 0x00 0x1d5 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_lite_ahb\0ife_lite_axi\0ife_clk_src\0ife_clk";
			clocks = < 0x58 0x3b 0x58 0x3c 0x58 0x3e 0x58 0x3d >;
			clock-rates = < 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a0 >;
		};

		qcom,csid-lite1@acdb400 {
			cell-index = < 0x03 >;
			compatible = "qcom,csid-lite480";
			reg-names = "csid-lite";
			reg = < 0xacdb400 0x1000 >;
			reg-cam-base = < 0xdb400 >;
			interrupt-names = "csid-lite";
			interrupts = < 0x00 0x167 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_csid_clk_src\0ife_csid_clk\0cphy_rx_clk_src\0ife_cphy_rx_clk\0ife_clk_src\0ife_lite_ahb\0ife_clk";
			clocks = < 0x58 0x41 0x58 0x40 0x58 0x0e 0x58 0x3f 0x58 0x3e 0x58 0x3b 0x58 0x3d >;
			clock-rates = < 0x17d78400 0x00 0x00 0x00 0x17d78400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_csid_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a1 >;
		};

		qcom,ife-lite1@acdb200 {
			cell-index = < 0x03 >;
			compatible = "qcom,vfe-lite480";
			reg-names = "ife-lite";
			reg = < 0xacdb200 0x2200 >;
			reg-cam-base = < 0xdb200 >;
			interrupt-names = "ife-lite";
			interrupts = < 0x00 0x168 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_lite_ahb\0ife_lite_axi\0ife_clk_src\0ife_clk";
			clocks = < 0x58 0x3b 0x58 0x3c 0x58 0x3e 0x58 0x3d >;
			clock-rates = < 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a2 >;
		};

		qcom,csid-lite2@acdd600 {
			cell-index = < 0x04 >;
			compatible = "qcom,csid-lite480";
			reg-names = "csid-lite";
			reg = < 0xacdd600 0x1000 >;
			reg-cam-base = < 0xdd600 >;
			interrupt-names = "csid-lite";
			interrupts = < 0x00 0x1c1 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_csid_clk_src\0ife_csid_clk\0cphy_rx_clk_src\0ife_cphy_rx_clk\0ife_clk_src\0ife_lite_ahb\0ife_clk";
			clocks = < 0x58 0x41 0x58 0x40 0x58 0x0e 0x58 0x3f 0x58 0x3e 0x58 0x3b 0x58 0x3d >;
			clock-rates = < 0x17d78400 0x00 0x00 0x00 0x17d78400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_csid_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a3 >;
		};

		qcom,ife-lite2@acdd400 {
			cell-index = < 0x04 >;
			compatible = "qcom,vfe-lite480";
			reg-names = "ife-lite";
			reg = < 0xacdd400 0x2200 >;
			reg-cam-base = < 0xdd400 >;
			interrupt-names = "ife-lite";
			interrupts = < 0x00 0x10a 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_lite_ahb\0ife_lite_axi\0ife_clk_src\0ife_clk";
			clocks = < 0x58 0x3b 0x58 0x3c 0x58 0x3e 0x58 0x3d >;
			clock-rates = < 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a4 >;
		};

		qcom,csid-lite3@acdf800 {
			cell-index = < 0x05 >;
			compatible = "qcom,csid-lite480";
			reg-names = "csid-lite";
			reg = < 0xacdf800 0x1000 >;
			reg-cam-base = < 0xdf800 >;
			interrupt-names = "csid-lite";
			interrupts = < 0x00 0x1c3 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_csid_clk_src\0ife_csid_clk\0cphy_rx_clk_src\0ife_cphy_rx_clk\0ife_clk_src\0ife_lite_ahb\0ife_clk";
			clocks = < 0x58 0x41 0x58 0x40 0x58 0x0e 0x58 0x3f 0x58 0x3e 0x58 0x3b 0x58 0x3d >;
			clock-rates = < 0x17d78400 0x00 0x00 0x00 0x17d78400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_csid_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a5 >;
		};

		qcom,ife-lite3@acdf600 {
			cell-index = < 0x05 >;
			compatible = "qcom,vfe-lite480";
			reg-names = "ife-lite";
			reg = < 0xacdf600 0x2200 >;
			reg-cam-base = < 0xdf600 >;
			interrupt-names = "ife-lite";
			interrupts = < 0x00 0x1c2 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_lite_ahb\0ife_lite_axi\0ife_clk_src\0ife_clk";
			clocks = < 0x58 0x3b 0x58 0x3c 0x58 0x3e 0x58 0x3d >;
			clock-rates = < 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a6 >;
		};

		qcom,csid-lite4@ace1a00 {
			cell-index = < 0x06 >;
			compatible = "qcom,csid-lite480";
			reg-names = "csid-lite";
			reg = < 0xace1a00 0x1000 >;
			reg-cam-base = < 0xe1a00 >;
			interrupt-names = "csid-lite";
			interrupts = < 0x00 0x1c5 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_csid_clk_src\0ife_csid_clk\0cphy_rx_clk_src\0ife_cphy_rx_clk\0ife_clk_src\0ife_lite_ahb\0ife_clk";
			clocks = < 0x58 0x41 0x58 0x40 0x58 0x0e 0x58 0x3f 0x58 0x3e 0x58 0x3b 0x58 0x3d >;
			clock-rates = < 0x17d78400 0x00 0x00 0x00 0x17d78400 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_csid_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a7 >;
		};

		qcom,ife-lite4@ace1800 {
			cell-index = < 0x06 >;
			compatible = "qcom,vfe-lite480";
			reg-names = "ife-lite";
			reg = < 0xace1800 0x2200 >;
			reg-cam-base = < 0xe1800 >;
			interrupt-names = "ife-lite";
			interrupts = < 0x00 0x1c4 0x01 >;
			regulator-names = "camss";
			camss-supply = < 0x160 >;
			clock-names = "ife_lite_ahb\0ife_lite_axi\0ife_clk_src\0ife_clk";
			clocks = < 0x58 0x3b 0x58 0x3c 0x58 0x3e 0x58 0x3d >;
			clock-rates = < 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x1c9c3800 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0turbo";
			src-clock-name = "ife_clk_src";
			clock-control-debugfs = "true";
			status = "ok";
			phandle = < 0x3a8 >;
		};

		qcom,cam-icp {
			compatible = "qcom,cam-icp";
			compat-hw-name = "qcom,a5\0qcom,ipe0\0qcom,bps";
			num-a5 = < 0x01 >;
			num-ipe = < 0x01 >;
			num-bps = < 0x01 >;
			status = "ok";
			icp_pc_en;
			ipe_bps_pc_en;
		};

		qcom,a5@ac00000 {
			cell-index = < 0x00 >;
			compatible = "qcom,cam-a5";
			reg = < 0xac00000 0x6000 0xac10000 0x8000 0xac18000 0x3000 >;
			reg-names = "a5_qgic\0a5_sierra\0a5_csr";
			reg-cam-base = < 0x00 0x10000 0x18000 >;
			interrupts = < 0x00 0x1cf 0x01 >;
			interrupt-names = "a5";
			regulator-names = "camss-vdd";
			camss-vdd-supply = < 0x160 >;
			clock-names = "soc_fast_ahb\0icp_ahb_clk\0icp_clk_src\0icp_clk";
			src-clock-name = "icp_clk_src";
			clocks = < 0x58 0x21 0x58 0x26 0x58 0x28 0x58 0x27 >;
			clock-rates = < 0x5f5e100 0x00 0x17d78400 0x00 0xbebc200 0x00 0x1c9c3800 0x00 0x11e1a300 0x00 0x23c34600 0x00 0x17d78400 0x00 0x23c34600 0x00 0x17d78400 0x00 0x23c34600 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0nominal\0turbo";
			fw_name = "CAMERA_ICP.elf";
			ubwc-ipe-fetch-cfg = < 0x707b 0x7083 >;
			ubwc-ipe-write-cfg = < 0x161ef 0x1620f >;
			ubwc-bps-fetch-cfg = < 0x707b 0x7083 >;
			ubwc-bps-write-cfg = < 0x161ef 0x1620f >;
			status = "ok";
			phandle = < 0x3a9 >;
		};

		qcom,ipe0 {
			cell-index = < 0x00 >;
			compatible = "qcom,cam-ipe";
			reg = < 0xac9a000 0xc000 >;
			reg-names = "ipe0_top";
			reg-cam-base = < 0x9a000 >;
			regulator-names = "ipe0-vdd";
			ipe0-vdd-supply = < 0x17c >;
			clock-names = "ipe_0_ahb_clk\0ipe_0_areg_clk\0ipe_0_axi_clk\0ipe_0_clk_src\0ipe_0_clk";
			src-clock-name = "ipe_0_clk_src";
			clock-control-debugfs = "true";
			clocks = < 0x58 0x42 0x58 0x43 0x58 0x44 0x58 0x46 0x58 0x45 >;
			clock-rates = < 0x00 0x00 0x00 0x11e1a300 0x00 0x00 0x00 0x00 0x1c4fecc0 0x00 0x00 0x00 0x00 0x1f4add40 0x00 0x00 0x00 0x00 0x29b92700 0x00 0x00 0x00 0x00 0x29b92700 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0nominal\0turbo";
			status = "ok";
			phandle = < 0x3aa >;
		};

		qcom,bps {
			cell-index = < 0x00 >;
			compatible = "qcom,cam-bps";
			reg = < 0xac7a000 0x8000 >;
			reg-names = "bps_top";
			reg-cam-base = < 0x7a000 >;
			regulator-names = "bps-vdd";
			bps-vdd-supply = < 0x17d >;
			clock-names = "bps_ahb_clk\0bps_areg_clk\0bps_axi_clk\0bps_clk_src\0bps_clk";
			src-clock-name = "bps_clk_src";
			clock-control-debugfs = "true";
			clocks = < 0x58 0x00 0x58 0x01 0x58 0x02 0x58 0x04 0x58 0x03 >;
			clock-rates = < 0x00 0x00 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x17d78400 0x00 0x00 0x00 0x00 0x1c9c3800 0x00 0x00 0x00 0x00 0x23c34600 0x00 0x00 0x00 0x00 0x23c34600 0x00 >;
			clock-cntl-level = "lowsvs\0svs\0svs_l1\0nominal\0turbo";
			status = "ok";
			phandle = < 0x3ab >;
		};

		qcom,cam-jpeg {
			compatible = "qcom,cam-jpeg";
			compat-hw-name = "qcom,jpegenc\0qcom,jpegdma";
			num-jpeg-enc = < 0x01 >;
			num-jpeg-dma = < 0x01 >;
			status = "ok";
		};

		qcom,jpegenc@ac53000 {
			cell-index = < 0x00 >;
			compatible = "qcom,cam_jpeg_enc";
			reg-names = "jpege_hw";
			reg = < 0xac53000 0x4000 >;
			reg-cam-base = < 0x53000 >;
			interrupt-names = "jpeg";
			interrupts = < 0x00 0x1da 0x01 >;
			regulator-names = "camss-vdd";
			camss-vdd-supply = < 0x160 >;
			clock-names = "jpegenc_clk_src\0jpegenc_clk";
			clocks = < 0x58 0x48 0x58 0x47 >;
			clock-rates = < 0x23c34600 0x00 >;
			src-clock-name = "jpegenc_clk_src";
			clock-cntl-level = "nominal";
			status = "ok";
			phandle = < 0x3ac >;
		};

		qcom,jpegdma@ac57000 {
			cell-index = < 0x00 >;
			compatible = "qcom,cam_jpeg_dma";
			reg-names = "jpegdma_hw";
			reg = < 0xac57000 0x4000 >;
			reg-cam-base = < 0x57000 >;
			interrupt-names = "jpegdma";
			interrupts = < 0x00 0x1db 0x01 >;
			regulator-names = "camss-vdd";
			camss-vdd-supply = < 0x160 >;
			clock-names = "jpegdma_clk_src\0jpegdma_clk";
			clocks = < 0x58 0x48 0x58 0x47 >;
			clock-rates = < 0x23c34600 0x00 >;
			src-clock-name = "jpegdma_clk_src";
			clock-cntl-level = "nominal";
			status = "ok";
			phandle = < 0x3ad >;
		};

		qcom,qupv3_0_geni_se@9c0000 {
			compatible = "qcom,qupv3-geni-se";
			reg = < 0x9c0000 0x2000 >;
			qcom,bus-mas-id = < 0x97 >;
			qcom,bus-slv-id = < 0x200 >;
			iommus = < 0x43 0x5a3 0x00 >;
			qcom,iommu-dma-addr-pool = < 0x40000000 0xc0000000 >;
			qcom,iommu-dma = "fastmap";
			phandle = < 0x180 >;
		};

		qcom,qup_uart@988000 {
			compatible = "qcom,msm-geni-console";
			reg = < 0x988000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5c 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x17e >;
			pinctrl-1 = < 0x17f >;
			interrupts = < 0x00 0x25b 0x04 >;
			qcom,wrapper-core = < 0x180 >;
			qcom,change-sampling-rate;
			status = "disabled";
			phandle = < 0x3ae >;
		};

		qcom,qup_uart@98c000 {
			compatible = "qcom,msm-geni-serial-hs";
			reg = < 0x98c000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5e 0x15 0x84 0x15 0x85 >;
			interrupts-extended = < 0x01 0x00 0x25c 0x04 0x8b 0x7a 0x04 >;
			qcom,wrapper-core = < 0x180 >;
			qcom,wakeup-byte = < 0xfd >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x181 >;
			pinctrl-1 = < 0x182 0x183 >;
			status = "disabled";
			phandle = < 0x3af >;
		};

		qcom,qup_uart@994000 {
			compatible = "qcom,msm-geni-serial-hs";
			reg = < 0x994000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x62 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x184 >;
			pinctrl-1 = < 0x185 0x186 >;
			interrupts-extended = < 0x01 0x00 0x25e 0x04 0x8b 0x0f 0x00 >;
			status = "ok";
			qcom,wakeup-byte = < 0xfd >;
			qcom,wrapper-core = < 0x180 >;
			phandle = < 0x3b0 >;
		};

		qcom,qup_uart@998000 {
			compatible = "qcom,msm-geni-serial-hs";
			reg = < 0x998000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x64 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0active\0sleep";
			pinctrl-0 = < 0x187 0x188 0x189 >;
			pinctrl-1 = < 0x18a 0x18b 0x18c >;
			pinctrl-2 = < 0x18a 0x18b 0x18c >;
			interrupts-extended = < 0x01 0x00 0x25f 0x04 0x8b 0x13 0x00 >;
			status = "disabled";
			qcom,wakeup-byte = < 0xfd >;
			qcom,wrapper-core = < 0x180 >;
			phandle = < 0x3b1 >;
		};

		i2c@980000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x980000 0x4000 >;
			interrupts = < 0x00 0x259 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x58 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x00 0x03 0x40 0x00 0x18d 0x01 0x00 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x18e >;
			pinctrl-1 = < 0x18f >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b2 >;
		};

		i2c@984000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x984000 0x4000 >;
			interrupts = < 0x00 0x25a 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5a 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x01 0x03 0x40 0x00 0x18d 0x01 0x01 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x190 >;
			pinctrl-1 = < 0x191 >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b3 >;
		};

		i2c@988000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x988000 0x4000 >;
			interrupts = < 0x00 0x25b 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5c 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x02 0x03 0x40 0x00 0x18d 0x01 0x02 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x192 >;
			pinctrl-1 = < 0x193 >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b4 >;
		};

		i2c@98c000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x98c000 0x4000 >;
			interrupts = < 0x00 0x25c 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5e 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x03 0x03 0x40 0x00 0x18d 0x01 0x03 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x194 >;
			pinctrl-1 = < 0x195 >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b5 >;
		};

		i2c@990000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x990000 0x4000 >;
			interrupts = < 0x00 0x25d 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x60 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x04 0x03 0x40 0x00 0x18d 0x01 0x04 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x196 >;
			pinctrl-1 = < 0x197 >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b6 >;
		};

		i2c@994000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x994000 0x4000 >;
			interrupts = < 0x00 0x25e 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x62 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x05 0x03 0x40 0x00 0x18d 0x01 0x05 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x198 >;
			pinctrl-1 = < 0x199 >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b7 >;
		};

		i2c@998000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x998000 0x4000 >;
			interrupts = < 0x00 0x25f 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x64 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x06 0x03 0x40 0x00 0x18d 0x01 0x06 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x19a >;
			pinctrl-1 = < 0x19b >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b8 >;
		};

		i2c@99c000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x99c000 0x4000 >;
			interrupts = < 0x00 0x260 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x66 0x15 0x84 0x15 0x85 >;
			dmas = < 0x18d 0x00 0x07 0x03 0x40 0x00 0x18d 0x01 0x07 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x19c >;
			pinctrl-1 = < 0x19d >;
			qcom,wrapper-core = < 0x180 >;
			status = "disabled";
			phandle = < 0x3b9 >;
		};

		spi@980000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x980000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x58 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x19e >;
			pinctrl-1 = < 0x19f >;
			interrupts = < 0x00 0x259 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x00 0x01 0x40 0x00 0x18d 0x01 0x00 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3ba >;
		};

		spi@984000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x984000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5a 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1a0 >;
			pinctrl-1 = < 0x1a1 >;
			interrupts = < 0x00 0x25a 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x01 0x01 0x40 0x00 0x18d 0x01 0x01 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3bb >;
		};

		spi@988000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x988000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5c 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1a2 >;
			pinctrl-1 = < 0x1a3 >;
			interrupts = < 0x00 0x25b 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x02 0x01 0x40 0x00 0x18d 0x01 0x02 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3bc >;
		};

		spi@98c000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x98c000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x5e 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1a4 >;
			pinctrl-1 = < 0x1a5 >;
			interrupts = < 0x00 0x25c 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x03 0x01 0x40 0x00 0x18d 0x01 0x03 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3bd >;
		};

		spi@990000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x990000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x60 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1a6 >;
			pinctrl-1 = < 0x1a7 >;
			interrupts = < 0x00 0x25d 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x04 0x01 0x40 0x00 0x18d 0x01 0x04 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3be >;
		};

		spi@994000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x994000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x62 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1a8 >;
			pinctrl-1 = < 0x1a9 >;
			interrupts = < 0x00 0x25e 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x05 0x01 0x40 0x00 0x18d 0x01 0x05 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3bf >;
		};

		spi@998000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x998000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x64 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1aa >;
			pinctrl-1 = < 0x1ab >;
			interrupts = < 0x00 0x25f 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x06 0x01 0x40 0x00 0x18d 0x01 0x06 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3c0 >;
		};

		spi@99c000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x99c000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x66 0x15 0x84 0x15 0x85 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1ac >;
			pinctrl-1 = < 0x1ad >;
			interrupts = < 0x00 0x260 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x180 >;
			dmas = < 0x18d 0x00 0x07 0x01 0x40 0x00 0x18d 0x01 0x07 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3c1 >;
		};

		qcom,qupv3_1_geni_se@ac0000 {
			compatible = "qcom,qupv3-geni-se";
			reg = < 0xac0000 0x2000 >;
			qcom,bus-mas-id = < 0x98 >;
			qcom,bus-slv-id = < 0x200 >;
			iommus = < 0x43 0x43 0x00 >;
			qcom,iommu-dma-addr-pool = < 0x40000000 0xc0000000 >;
			qcom,iommu-dma = "fastmap";
			phandle = < 0x1b0 >;
		};

		qcom,qup_uart@a90000 {
			compatible = "qcom,msm-geni-console";
			reg = < 0xa90000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x72 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1ae >;
			pinctrl-1 = < 0x1af >;
			interrupts = < 0x00 0x165 0x04 >;
			qcom,wrapper-core = < 0x1b0 >;
			qcom,change-sampling-rate;
			status = "disabled";
			phandle = < 0x3c2 >;
		};

		qcom,qup_uart@a94000 {
			compatible = "qcom,msm-geni-serial-hs";
			reg = < 0xa94000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x74 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1b1 >;
			pinctrl-1 = < 0x1b2 0x1b3 >;
			interrupts-extended = < 0x01 0x00 0x166 0x04 0x8b 0x27 0x00 >;
			qcom,wakeup-byte = < 0xfd >;
			qcom,wrapper-core = < 0x1b0 >;
			status = "disabled";
			phandle = < 0x3c3 >;
		};

		i2c@a80000 {
			compatible = "qcom,i2c-geni";
			reg = < 0xa80000 0x4000 >;
			interrupts = < 0x00 0x161 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x6a 0x15 0x86 0x15 0x87 >;
			dmas = < 0x1b4 0x00 0x00 0x03 0x40 0x00 0x1b4 0x01 0x00 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1b5 >;
			pinctrl-1 = < 0x1b6 >;
			qcom,wrapper-core = < 0x1b0 >;
			status = "disabled";
			phandle = < 0x3c4 >;
		};

		i2c@a84000 {
			compatible = "qcom,i2c-geni";
			reg = < 0xa84000 0x4000 >;
			interrupts = < 0x00 0x162 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x6c 0x15 0x86 0x15 0x87 >;
			dmas = < 0x1b4 0x00 0x01 0x03 0x40 0x00 0x1b4 0x01 0x01 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1b7 >;
			pinctrl-1 = < 0x1b8 >;
			qcom,wrapper-core = < 0x1b0 >;
			status = "disabled";
			phandle = < 0x3c5 >;
		};

		i2c@a88000 {
			compatible = "qcom,i2c-geni";
			reg = < 0xa88000 0x4000 >;
			interrupts = < 0x00 0x163 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x6e 0x15 0x86 0x15 0x87 >;
			dmas = < 0x1b4 0x00 0x02 0x03 0x40 0x00 0x1b4 0x01 0x02 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1b9 >;
			pinctrl-1 = < 0x1ba >;
			qcom,wrapper-core = < 0x1b0 >;
			status = "disabled";
			phandle = < 0x3c6 >;
		};

		i2c@a8c000 {
			compatible = "qcom,i2c-geni";
			reg = < 0xa8c000 0x4000 >;
			interrupts = < 0x00 0x164 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x70 0x15 0x86 0x15 0x87 >;
			dmas = < 0x1b4 0x00 0x03 0x03 0x40 0x00 0x1b4 0x01 0x03 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1bb >;
			pinctrl-1 = < 0x1bc >;
			qcom,wrapper-core = < 0x1b0 >;
			status = "disabled";
			phandle = < 0x3c7 >;
		};

		i2c@a90000 {
			compatible = "qcom,i2c-geni";
			reg = < 0xa90000 0x4000 >;
			interrupts = < 0x00 0x165 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x72 0x15 0x86 0x15 0x87 >;
			dmas = < 0x1b4 0x00 0x04 0x03 0x40 0x00 0x1b4 0x01 0x04 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1bd >;
			pinctrl-1 = < 0x1be >;
			qcom,wrapper-core = < 0x1b0 >;
			status = "disabled";
			phandle = < 0x3c8 >;
		};

		i2c@a94000 {
			compatible = "qcom,i2c-geni";
			reg = < 0xa94000 0x4000 >;
			interrupts = < 0x00 0x166 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x74 0x15 0x86 0x15 0x87 >;
			dmas = < 0x1b4 0x00 0x05 0x03 0x40 0x00 0x1b4 0x01 0x05 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1bf >;
			pinctrl-1 = < 0x1c0 >;
			qcom,wrapper-core = < 0x1b0 >;
			status = "disabled";
			phandle = < 0x3c9 >;
		};

		spi@a80000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0xa80000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x6a 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1c1 >;
			pinctrl-1 = < 0x1c1 >;
			interrupts = < 0x00 0x161 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1b0 >;
			dmas = < 0x1b4 0x00 0x00 0x01 0x40 0x00 0x1b4 0x01 0x00 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3ca >;
		};

		spi@a84000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0xa84000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x6c 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1c2 >;
			pinctrl-1 = < 0x1c3 >;
			interrupts = < 0x00 0x162 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1b0 >;
			dmas = < 0x1b4 0x00 0x01 0x01 0x40 0x00 0x1b4 0x01 0x01 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3cb >;
		};

		spi@a88000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0xa88000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x6e 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1c4 >;
			pinctrl-1 = < 0x1c5 >;
			interrupts = < 0x00 0x163 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1b0 >;
			dmas = < 0x1b4 0x00 0x02 0x01 0x40 0x00 0x1b4 0x01 0x02 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3cc >;
		};

		spi@a8c000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0xa8c000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x70 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1c6 >;
			pinctrl-1 = < 0x1c7 >;
			interrupts = < 0x00 0x164 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1b0 >;
			dmas = < 0x1b4 0x00 0x03 0x01 0x40 0x00 0x1b4 0x01 0x03 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3cd >;
		};

		spi@a90000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0xa90000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x72 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1c8 >;
			pinctrl-1 = < 0x1c9 >;
			interrupts = < 0x00 0x165 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1b0 >;
			dmas = < 0x1b4 0x00 0x04 0x01 0x40 0x00 0x1b4 0x01 0x04 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3ce >;
		};

		spi@a94000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0xa94000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x74 0x15 0x86 0x15 0x87 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1ca >;
			pinctrl-1 = < 0x1cb >;
			interrupts = < 0x00 0x166 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1b0 >;
			dmas = < 0x1b4 0x00 0x05 0x01 0x40 0x00 0x1b4 0x01 0x05 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3cf >;
		};

		qcom,qupv3_2_geni_se@8c0000 {
			compatible = "qcom,qupv3-geni-se";
			reg = < 0x8c0000 0x2000 >;
			qcom,bus-mas-id = < 0x99 >;
			qcom,bus-slv-id = < 0x200 >;
			iommus = < 0x43 0x63 0x00 >;
			qcom,iommu-dma-addr-pool = < 0x40000000 0xc0000000 >;
			qcom,iommu-dma = "fastmap";
			phandle = < 0x1cf >;
		};

		qcom,qup_uart@88c000 {
			compatible = "qcom,msm-geni-serial-hs";
			reg = < 0x88c000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x7e 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1cc 0x1cd 0x1ce >;
			pinctrl-1 = < 0x1cc 0x1cd 0x1ce >;
			interrupts-extended = < 0x01 0x00 0x249 0x04 0x8b 0x37 0x00 >;
			status = "disabled";
			qcom,wakeup-byte = < 0xfd >;
			qcom,wrapper-core = < 0x1cf >;
			phandle = < 0x3d0 >;
		};

		qcom,qup_uart@890000 {
			compatible = "qcom,msm-geni-serial-hs";
			reg = < 0x890000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x80 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1d0 0x1d1 >;
			pinctrl-1 = < 0x1d0 0x1d1 >;
			interrupts-extended = < 0x01 0x00 0x24a 0x04 0x8b 0x3b 0x00 >;
			status = "disabled";
			qcom,wakeup-byte = < 0xfd >;
			qcom,wrapper-core = < 0x1cf >;
			phandle = < 0x3d1 >;
		};

		i2c@880000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x880000 0x4000 >;
			interrupts = < 0x00 0x175 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x78 0x15 0x88 0x15 0x89 >;
			dmas = < 0x1d2 0x00 0x00 0x03 0x40 0x00 0x1d2 0x01 0x00 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1d3 >;
			pinctrl-1 = < 0x1d4 >;
			qcom,wrapper-core = < 0x1cf >;
			status = "disabled";
			phandle = < 0x3d2 >;
		};

		i2c@884000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x884000 0x4000 >;
			interrupts = < 0x00 0x247 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x7a 0x15 0x88 0x15 0x89 >;
			dmas = < 0x1d2 0x00 0x01 0x03 0x40 0x00 0x1d2 0x01 0x01 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1d5 >;
			pinctrl-1 = < 0x1d6 >;
			qcom,wrapper-core = < 0x1cf >;
			status = "ok";
			phandle = < 0x3d3 >;

			fsa4480@43 {
				compatible = "qcom,fsa4480-i2c";
				reg = < 0x43 >;
				phandle = < 0x3d4 >;
			};

			nq@64 {
				compatible = "rtc6226";
				reg = < 0x64 >;
				fmint-gpio = < 0x8b 0x33 0x00 >;
				vdd-supply = < 0x1d7 >;
				rtc6226,vdd-supply-voltage = < 0x324b00 0x324b00 >;
				vio-supply = < 0x90 >;
				rtc6226,vio-supply-voltage = < 0x1b7740 0x1b7740 >;
			};
		};

		i2c@888000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x888000 0x4000 >;
			interrupts = < 0x00 0x248 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x7c 0x15 0x88 0x15 0x89 >;
			dmas = < 0x1d2 0x00 0x02 0x03 0x40 0x00 0x1d2 0x01 0x02 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1d8 >;
			pinctrl-1 = < 0x1d9 >;
			qcom,wrapper-core = < 0x1cf >;
			status = "disabled";
			phandle = < 0x3d5 >;
		};

		i2c@88c000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x88c000 0x4000 >;
			interrupts = < 0x00 0x249 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x7e 0x15 0x88 0x15 0x89 >;
			dmas = < 0x1d2 0x00 0x03 0x03 0x40 0x00 0x1d2 0x01 0x03 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1da >;
			pinctrl-1 = < 0x1db >;
			qcom,wrapper-core = < 0x1cf >;
			status = "disabled";
			phandle = < 0x3d6 >;
		};

		i2c@890000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x890000 0x4000 >;
			interrupts = < 0x00 0x24a 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x80 0x15 0x88 0x15 0x89 >;
			dmas = < 0x1d2 0x00 0x04 0x03 0x40 0x00 0x1d2 0x01 0x04 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1dc >;
			pinctrl-1 = < 0x1dd >;
			qcom,wrapper-core = < 0x1cf >;
			status = "disabled";
			phandle = < 0x3d7 >;
		};

		i2c@894000 {
			compatible = "qcom,i2c-geni";
			reg = < 0x894000 0x4000 >;
			interrupts = < 0x00 0x24b 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x82 0x15 0x88 0x15 0x89 >;
			dmas = < 0x1d2 0x00 0x05 0x03 0x40 0x00 0x1d2 0x01 0x05 0x03 0x40 0x00 >;
			dma-names = "tx\0rx";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1de >;
			pinctrl-1 = < 0x1df >;
			qcom,wrapper-core = < 0x1cf >;
			status = "disabled";
			phandle = < 0x3d8 >;
		};

		spi@880000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x880000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x78 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1e0 >;
			pinctrl-1 = < 0x1e1 >;
			interrupts = < 0x00 0x175 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1cf >;
			dmas = < 0x1d2 0x00 0x00 0x01 0x40 0x00 0x1d2 0x01 0x00 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3d9 >;
		};

		spi@884000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x884000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x7a 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1e2 >;
			pinctrl-1 = < 0x1e3 >;
			interrupts = < 0x00 0x247 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1cf >;
			dmas = < 0x1d2 0x00 0x01 0x01 0x40 0x00 0x1d2 0x01 0x01 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3da >;
		};

		spi@888000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x888000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x7c 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1e4 >;
			pinctrl-1 = < 0x1e5 >;
			interrupts = < 0x00 0x248 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1cf >;
			dmas = < 0x1d2 0x00 0x02 0x01 0x40 0x00 0x1d2 0x01 0x02 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3db >;
		};

		spi@88c000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x88c000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x7e 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1e6 >;
			pinctrl-1 = < 0x1e7 >;
			interrupts = < 0x00 0x249 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1cf >;
			dmas = < 0x1d2 0x00 0x03 0x01 0x40 0x00 0x1d2 0x01 0x03 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3dc >;
		};

		spi@890000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x890000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x80 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1e8 >;
			pinctrl-1 = < 0x1e9 >;
			interrupts = < 0x00 0x24a 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1cf >;
			dmas = < 0x1d2 0x00 0x04 0x01 0x40 0x00 0x1d2 0x01 0x04 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3dd >;
		};

		spi@894000 {
			compatible = "qcom,spi-geni";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			reg = < 0x894000 0x4000 >;
			reg-names = "se_phys";
			clock-names = "se-clk\0m-ahb\0s-ahb";
			clocks = < 0x15 0x82 0x15 0x88 0x15 0x89 >;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = < 0x1ea >;
			pinctrl-1 = < 0x1eb >;
			interrupts = < 0x00 0x24b 0x04 >;
			spi-max-frequency = < 0x2faf080 >;
			qcom,wrapper-core = < 0x1cf >;
			dmas = < 0x1d2 0x00 0x05 0x01 0x40 0x00 0x1d2 0x01 0x05 0x01 0x40 0x00 >;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = < 0x3de >;
		};

		qcom,msm-pcm {
			compatible = "qcom,msm-pcm-dsp";
			qcom,msm-pcm-dsp-id = < 0x00 >;
			phandle = < 0x3df >;
		};

		qcom,msm-pcm-routing {
			compatible = "qcom,msm-pcm-routing";
			phandle = < 0x3e0 >;
		};

		qcom,msm-compr-dsp {
			compatible = "qcom,msm-compr-dsp";
			phandle = < 0x3e1 >;
		};

		qcom,msm-pcm-low-latency {
			compatible = "qcom,msm-pcm-dsp";
			qcom,msm-pcm-dsp-id = < 0x01 >;
			qcom,msm-pcm-low-latency;
			qcom,latency-level = "regular";
			phandle = < 0x3e2 >;
		};

		qcom,msm-ultra-low-latency {
			compatible = "qcom,msm-pcm-dsp";
			qcom,msm-pcm-dsp-id = < 0x02 >;
			qcom,msm-pcm-low-latency;
			qcom,latency-level = "ultra";
			phandle = < 0x3e3 >;
		};

		qcom,msm-pcm-dsp-noirq {
			compatible = "qcom,msm-pcm-dsp-noirq";
			qcom,msm-pcm-low-latency;
			qcom,latency-level = "ultra";
			phandle = < 0x3e4 >;
		};

		qcom,msm-transcode-loopback {
			compatible = "qcom,msm-transcode-loopback";
			phandle = < 0x3e5 >;
		};

		qcom,msm-compress-dsp {
			compatible = "qcom,msm-compress-dsp";
			phandle = < 0x3e6 >;
		};

		qcom,msm-voip-dsp {
			compatible = "qcom,msm-voip-dsp";
			phandle = < 0x3e7 >;
		};

		qcom,msm-pcm-voice {
			compatible = "qcom,msm-pcm-voice";
			qcom,destroy-cvd;
			phandle = < 0x3e8 >;
		};

		qcom,msm-stub-codec {
			compatible = "qcom,msm-stub-codec";
			phandle = < 0x3e9 >;
		};

		qcom,msm-dai-fe {
			compatible = "qcom,msm-dai-fe";
		};

		qcom,msm-pcm-afe {
			compatible = "qcom,msm-pcm-afe";
			phandle = < 0x3ea >;
		};

		qcom,msm-pcm-loopback {
			compatible = "qcom,msm-pcm-loopback";
			phandle = < 0x3eb >;
		};

		qcom,msm-pcm-loopback-low-latency {
			compatible = "qcom,msm-pcm-loopback";
			qcom,msm-pcm-loopback-low-latency;
			phandle = < 0x3ec >;
		};

		qcom,msm-pcm-dtmf {
			compatible = "qcom,msm-pcm-dtmf";
			phandle = < 0x3ed >;
		};

		qcom,msm-dai-mi2s {
			compatible = "qcom,msm-dai-mi2s";
			phandle = < 0x3ee >;

			qcom,msm-dai-q6-mi2s-prim {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = < 0x00 >;
				qcom,msm-mi2s-rx-lines = < 0x03 >;
				qcom,msm-mi2s-tx-lines = < 0x00 >;
				phandle = < 0x3ef >;
			};

			qcom,msm-dai-q6-mi2s-sec {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = < 0x01 >;
				qcom,msm-mi2s-rx-lines = < 0x01 >;
				qcom,msm-mi2s-tx-lines = < 0x00 >;
				phandle = < 0x3f0 >;
			};

			qcom,msm-dai-q6-mi2s-tert {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = < 0x02 >;
				qcom,msm-mi2s-rx-lines = < 0x00 >;
				qcom,msm-mi2s-tx-lines = < 0x03 >;
				phandle = < 0x3f1 >;
			};

			qcom,msm-dai-q6-mi2s-quat {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = < 0x03 >;
				qcom,msm-mi2s-rx-lines = < 0x01 >;
				qcom,msm-mi2s-tx-lines = < 0x02 >;
				phandle = < 0x3f2 >;
			};

			qcom,msm-dai-q6-mi2s-quin {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = < 0x04 >;
				qcom,msm-mi2s-rx-lines = < 0x01 >;
				qcom,msm-mi2s-tx-lines = < 0x02 >;
				phandle = < 0x3f3 >;
			};

			qcom,msm-dai-q6-mi2s-senary {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = < 0x05 >;
				qcom,msm-mi2s-rx-lines = < 0x00 >;
				qcom,msm-mi2s-tx-lines = < 0x03 >;
				phandle = < 0x3f4 >;
			};
		};

		qcom,msm-lsm-client {
			compatible = "qcom,msm-lsm-client";
			phandle = < 0x3f5 >;
		};

		qcom,msm-dai-q6 {
			compatible = "qcom,msm-dai-q6";

			qcom,msm-dai-q6-sb-7-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x400e >;
				qcom,msm-dai-q6-slim-dev-id = < 0x00 >;
				phandle = < 0x3f6 >;
			};

			qcom,msm-dai-q6-sb-7-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x400f >;
				qcom,msm-dai-q6-slim-dev-id = < 0x00 >;
				phandle = < 0x3f7 >;
			};

			qcom,msm-dai-q6-sb-8-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x4011 >;
				qcom,msm-dai-q6-slim-dev-id = < 0x00 >;
				phandle = < 0x3f8 >;
			};

			qcom,msm-dai-q6-bt-sco-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x3000 >;
				phandle = < 0x3f9 >;
			};

			qcom,msm-dai-q6-bt-sco-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x3001 >;
				phandle = < 0x3fa >;
			};

			qcom,msm-dai-q6-int-fm-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x3004 >;
				phandle = < 0x3fb >;
			};

			qcom,msm-dai-q6-int-fm-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x3005 >;
				phandle = < 0x3fc >;
			};

			qcom,msm-dai-q6-be-afe-pcm-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0xe0 >;
				phandle = < 0x3fd >;
			};

			qcom,msm-dai-q6-be-afe-pcm-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0xe1 >;
				phandle = < 0x3fe >;
			};

			qcom,msm-dai-q6-afe-proxy-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0xf1 >;
				phandle = < 0x3ff >;
			};

			qcom,msm-dai-q6-afe-proxy-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0xf0 >;
				phandle = < 0x400 >;
			};

			qcom,msm-dai-q6-incall-record-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x8003 >;
				phandle = < 0x401 >;
			};

			qcom,msm-dai-q6-incall-record-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x8004 >;
				phandle = < 0x402 >;
			};

			qcom,msm-dai-q6-incall-music-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x8005 >;
				phandle = < 0x403 >;
			};

			qcom,msm-dai-q6-incall-music-2-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x8002 >;
				phandle = < 0x404 >;
			};

			qcom,msm-dai-q6-usb-audio-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x7000 >;
				phandle = < 0x405 >;
			};

			qcom,msm-dai-q6-usb-audio-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = < 0x7001 >;
				phandle = < 0x406 >;
			};
		};

		qcom,msm-pcm-hostless {
			compatible = "qcom,msm-pcm-hostless";
			phandle = < 0x407 >;
		};

		qcom,msm-audio-apr {
			compatible = "qcom,msm-audio-apr";
			qcom,subsys-name = "apr_adsp";
			phandle = < 0x408 >;

			qcom,msm-audio-ion {
				compatible = "qcom,msm-audio-ion";
				qcom,smmu-version = < 0x02 >;
				qcom,smmu-enabled;
				iommus = < 0x43 0x1801 0x00 >;
				qcom,iommu-dma-addr-pool = < 0x10000000 0x10000000 >;
				qcom,smmu-sid-mask = < 0x00 0x0f >;
				phandle = < 0x409 >;
			};

			qcom,q6core-audio {
				compatible = "qcom,q6core-audio";
				phandle = < 0x40a >;

				vote_lpass_core_hw {
					compatible = "qcom,audio-ref-clk";
					qcom,codec-ext-clk-src = < 0x09 >;
					#clock-cells = < 0x01 >;
					phandle = < 0x40b >;
				};

				vote_lpass_audio_hw {
					compatible = "qcom,audio-ref-clk";
					qcom,codec-ext-clk-src = < 0x0b >;
					#clock-cells = < 0x01 >;
					phandle = < 0x40c >;
				};
			};
		};

		qcom,msm-pri-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-sync = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-frame = < 0x05 0x04 >;
			qcom,msm-cpudai-auxpcm-quant = < 0x02 0x02 >;
			qcom,msm-cpudai-auxpcm-num-slots = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-slot-mapping = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-data = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = < 0x1f4000 0x1f4000 >;
			qcom,msm-auxpcm-interface = "primary";
			qcom,msm-cpudai-afe-clk-ver = < 0x02 >;
			phandle = < 0x40d >;
		};

		qcom,msm-sec-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-sync = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-frame = < 0x05 0x04 >;
			qcom,msm-cpudai-auxpcm-quant = < 0x02 0x02 >;
			qcom,msm-cpudai-auxpcm-num-slots = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-slot-mapping = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-data = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = < 0x1f4000 0x1f4000 >;
			qcom,msm-auxpcm-interface = "secondary";
			qcom,msm-cpudai-afe-clk-ver = < 0x02 >;
			phandle = < 0x40e >;
		};

		qcom,msm-tert-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-sync = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-frame = < 0x05 0x04 >;
			qcom,msm-cpudai-auxpcm-quant = < 0x02 0x02 >;
			qcom,msm-cpudai-auxpcm-num-slots = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-slot-mapping = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-data = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = < 0x1f4000 0x1f4000 >;
			qcom,msm-auxpcm-interface = "tertiary";
			qcom,msm-cpudai-afe-clk-ver = < 0x02 >;
			phandle = < 0x40f >;
		};

		qcom,msm-quat-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-sync = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-frame = < 0x05 0x04 >;
			qcom,msm-cpudai-auxpcm-quant = < 0x02 0x02 >;
			qcom,msm-cpudai-auxpcm-num-slots = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-slot-mapping = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-data = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = < 0x1f4000 0x1f4000 >;
			qcom,msm-auxpcm-interface = "quaternary";
			qcom,msm-cpudai-afe-clk-ver = < 0x02 >;
			phandle = < 0x410 >;
		};

		qcom,msm-quin-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-sync = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-frame = < 0x05 0x04 >;
			qcom,msm-cpudai-auxpcm-quant = < 0x02 0x02 >;
			qcom,msm-cpudai-auxpcm-num-slots = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-slot-mapping = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-data = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = < 0x1f4000 0x1f4000 >;
			qcom,msm-auxpcm-interface = "quinary";
			qcom,msm-cpudai-afe-clk-ver = < 0x02 >;
			phandle = < 0x411 >;
		};

		qcom,msm-sen-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-sync = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-frame = < 0x05 0x04 >;
			qcom,msm-cpudai-auxpcm-quant = < 0x02 0x02 >;
			qcom,msm-cpudai-auxpcm-num-slots = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-slot-mapping = < 0x01 0x01 >;
			qcom,msm-cpudai-auxpcm-data = < 0x00 0x00 >;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = < 0x1f4000 0x1f4000 >;
			qcom,msm-auxpcm-interface = "senary";
			qcom,msm-cpudai-afe-clk-ver = < 0x02 >;
			phandle = < 0x412 >;
		};

		qcom,msm-hdmi-dba-codec-rx {
			compatible = "qcom,msm-hdmi-dba-codec-rx";
			qcom,dba-bridge-chip = "adv7533";
			phandle = < 0x413 >;
		};

		qcom,msm-adsp-loader {
			status = "ok";
			compatible = "qcom,adsp-loader";
			qcom,adsp-state = < 0x00 >;
			phandle = < 0x414 >;
		};

		qcom,msm-dai-tdm-pri-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9100 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9000 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x415 >;

			qcom,msm-dai-q6-tdm-pri-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9000 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x416 >;
			};
		};

		qcom,msm-dai-tdm-pri-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9101 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9001 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x417 >;

			qcom,msm-dai-q6-tdm-pri-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9001 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x418 >;
			};
		};

		qcom,msm-dai-tdm-sec-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9110 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9010 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x419 >;

			qcom,msm-dai-q6-tdm-sec-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9010 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x41a >;
			};
		};

		qcom,msm-dai-tdm-sec-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9111 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9011 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x41b >;

			qcom,msm-dai-q6-tdm-sec-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9011 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x41c >;
			};
		};

		qcom,msm-dai-tdm-tert-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9120 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9020 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x41d >;

			qcom,msm-dai-q6-tdm-tert-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9020 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x41e >;
			};
		};

		qcom,msm-dai-tdm-tert-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9121 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9021 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x41f >;

			qcom,msm-dai-q6-tdm-tert-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9021 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x420 >;
			};
		};

		qcom,msm-dai-tdm-quat-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9130 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9030 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x421 >;

			qcom,msm-dai-q6-tdm-quat-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9030 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x422 >;
			};
		};

		qcom,msm-dai-tdm-quat-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9131 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9031 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x423 >;

			qcom,msm-dai-q6-tdm-quat-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9031 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x424 >;
			};
		};

		qcom,msm-dai-tdm-quin-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9140 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9040 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x425 >;

			qcom,msm-dai-q6-tdm-quin-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9040 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x426 >;
			};
		};

		qcom,msm-dai-tdm-quin-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9141 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9041 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x427 >;

			qcom,msm-dai-q6-tdm-quin-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9041 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x428 >;
			};
		};

		qcom,msm-dai-tdm-sen-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9150 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9050 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x429 >;

			qcom,msm-dai-q6-tdm-sen-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9050 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x42a >;
			};
		};

		qcom,msm-dai-tdm-sen-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = < 0x9151 >;
			qcom,msm-cpudai-tdm-group-num-ports = < 0x01 >;
			qcom,msm-cpudai-tdm-group-port-id = < 0x9051 >;
			qcom,msm-cpudai-tdm-clk-rate = < 0x177000 >;
			qcom,msm-cpudai-tdm-clk-internal = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-mode = < 0x01 >;
			qcom,msm-cpudai-tdm-sync-src = < 0x01 >;
			qcom,msm-cpudai-tdm-data-out = < 0x00 >;
			qcom,msm-cpudai-tdm-invert-sync = < 0x01 >;
			qcom,msm-cpudai-tdm-data-delay = < 0x01 >;
			phandle = < 0x42b >;

			qcom,msm-dai-q6-tdm-sen-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = < 0x9051 >;
				qcom,msm-cpudai-tdm-data-align = < 0x00 >;
				phandle = < 0x42c >;
			};
		};

		qcom,msm-dai-q6-afe-loopback-tx {
			compatible = "qcom,msm-dai-q6-dev";
			qcom,msm-dai-q6-dev-id = < 0x6001 >;
			phandle = < 0x42d >;
		};

		qcom,avtimer@39f0000 {
			compatible = "qcom,avtimer";
			reg = < 0x39f000c 0x04 0x39f0010 0x04 >;
			reg-names = "avtimer_lsb_addr\0avtimer_msb_addr";
			qcom,clk-div = < 0xc0 >;
			qcom,clk-mult = < 0x0a >;
		};

		lmh_isense_cdsp {
			compatible = "qcom,msm-limits-cdsp";
		};

		qcom,vidc@aa00000 {
			compatible = "qcom,msm-vidc\0qcom,kona-vidc";
			status = "ok";
			sku-index = < 0x00 >;
			reg = < 0xaa00000 0x100000 >;
			interrupts = < 0x00 0xae 0x04 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x01 >;
			cache-slice-names = "vidsc0";
			iris-ctl-supply = < 0x83 >;
			vcodec-supply = < 0x1ec >;
			clock-names = "gcc_video_axi0\0core_clk\0vcodec_clk";
			clocks = < 0x15 0xce 0x56 0x05 0x56 0x02 >;
			qcom,proxy-clock-names = "gcc_video_axi0\0core_clk\0vcodec_clk";
			qcom,clock-configs = < 0x00 0x01 0x01 >;
			qcom,allowed-clock-rates = < 0xe4e1bff 0x14257880 0x15d0b780 0x1a76e700 >;
			resets = < 0x15 0x2b 0x56 0x02 >;
			reset-names = "video_axi_reset\0video_core_reset";
			qcom,reg-presets = < 0xb0088 0x00 >;
			phandle = < 0x42e >;

			bus_cnoc {
				compatible = "qcom,msm-vidc,bus";
				label = "cnoc";
				qcom,bus-master = < 0x01 >;
				qcom,bus-slave = < 0x254 >;
				qcom,mode = "performance";
				qcom,bus-range-kbps = < 0x2fa 0x2fa >;
			};

			venus_bus_ddr {
				compatible = "qcom,msm-vidc,bus";
				label = "venus-ddr";
				qcom,bus-master = < 0x81 >;
				qcom,bus-slave = < 0x200 >;
				qcom,mode = "venus-ddr";
				qcom,bus-range-kbps = < 0x2fa 0xe4e1c0 >;
			};

			venus_bus_llcc {
				compatible = "qcom,msm-vidc,bus";
				label = "venus-llcc";
				qcom,bus-master = < 0x3f >;
				qcom,bus-slave = < 0x302 >;
				qcom,mode = "venuc-llcc";
				qcom,bus-range-kbps = < 0x8f0 0xe4e1c0 >;
			};

			non_secure_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_ns";
				iommus = < 0x43 0x2100 0x400 >;
				qcom,iommu-dma-addr-pool = < 0x25800000 0xba800000 >;
				qcom,iommu-faults = "non-fatal";
				qcom,iommu-pagetable = "LLC";
				buffer-types = < 0xfff >;
				virtual-addr-pool = < 0x25800000 0xba800000 >;
			};

			secure_non_pixel_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_sec_non_pixel";
				iommus = < 0x43 0x2104 0x400 >;
				qcom,iommu-dma-addr-pool = < 0x1000000 0x24800000 >;
				qcom,iommu-faults = "non-fatal";
				qcom,iommu-pagetable = "LLC";
				qcom,iommu-vmid = < 0x0b >;
				buffer-types = < 0x480 >;
				virtual-addr-pool = < 0x1000000 0x24800000 >;
				qcom,secure-context-bank;
			};

			secure_bitstream_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_sec_bitstream";
				iommus = < 0x43 0x2101 0x404 >;
				qcom,iommu-dma-addr-pool = < 0x500000 0xdfb00000 >;
				qcom,iommu-faults = "non-fatal";
				qcom,iommu-pagetable = "LLC";
				qcom,iommu-vmid = < 0x09 >;
				buffer-types = < 0x241 >;
				virtual-addr-pool = < 0x500000 0xdfb00000 >;
				qcom,secure-context-bank;
			};

			secure_pixel_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_sec_pixel";
				iommus = < 0x43 0x2103 0x400 >;
				qcom,iommu-dma-addr-pool = < 0x500000 0xdfb00000 >;
				qcom,iommu-faults = "non-fatal";
				qcom,iommu-pagetable = "LLC";
				qcom,iommu-vmid = < 0x0a >;
				buffer-types = < 0x106 >;
				virtual-addr-pool = < 0x500000 0xdfb00000 >;
				qcom,secure-context-bank;
			};
		};

		qcom,cvp@ab00000 {
			compatible = "qcom,msm-cvp\0qcom,kona-cvp";
			status = "ok";
			reg = < 0xab00000 0x100000 >;
			interrupts = < 0x00 0xea 0x04 >;
			cache-slice-names = "cvp";
			cvp-supply = < 0x1ed >;
			cvp-core-supply = < 0x1ee >;
			clock-names = "gcc_video_axi1\0cvp_clk\0core_clk";
			clocks = < 0x15 0xcf 0x56 0x0b 0x56 0x07 >;
			qcom,proxy-clock-names = "gcc_video_axi1\0cvp_clk\0core_clk";
			qcom,clock-configs = < 0x00 0x01 0x01 >;
			qcom,allowed-clock-rates = < 0x10b07600 0x15d0b780 0x1a76e700 >;
			resets = < 0x15 0x2c 0x56 0x05 >;
			reset-names = "cvp_axi_reset\0cvp_core_reset";
			qcom,reg-presets = < 0xb0088 0x00 >;
			phandle = < 0x42f >;

			cvp_cnoc {
				compatible = "qcom,msm-cvp,bus";
				label = "cvp-cnoc";
				qcom,bus-master = < 0x01 >;
				qcom,bus-slave = < 0x254 >;
				qcom,bus-governor = "performance";
				qcom,bus-range-kbps = < 0x3e8 0x3e8 >;
			};

			cvp_bus_ddr {
				compatible = "qcom,msm-cvp,bus";
				label = "cvp-ddr";
				qcom,bus-master = < 0x8a >;
				qcom,bus-slave = < 0x200 >;
				qcom,bus-governor = "performance";
				qcom,bus-range-kbps = < 0x3e8 0x63af88 >;
			};

			cvp_non_secure_cb {
				compatible = "qcom,msm-cvp,context-bank";
				label = "cvp_hlos";
				iommus = < 0x43 0x2120 0x400 >;
				buffer-types = < 0xfff >;
				qcom,iommu-dma-addr-pool = < 0x4b000000 0x90000000 >;
			};

			cvp_secure_nonpixel_cb {
				compatible = "qcom,msm-cvp,context-bank";
				label = "cvp_sec_nonpixel";
				iommus = < 0x43 0x2124 0x400 >;
				buffer-types = < 0x741 >;
				qcom,iommu-dma-addr-pool = < 0x1000000 0x25800000 >;
				qcom,iommu-vmid = < 0x0b >;
			};

			cvp_secure_pixel_cb {
				compatible = "qcom,msm-cvp,context-bank";
				label = "cvp_sec_pixel";
				iommus = < 0x43 0x2123 0x400 >;
				buffer-types = < 0x106 >;
				qcom,iommu-dma-addr-pool = < 0x26800000 0x24800000 >;
				qcom,iommu-vmid = < 0x0a >;
			};

			qcom,msm-cvp,mem_cdsp {
				compatible = "qcom,msm-cvp,mem-cdsp";
				memory-region = < 0x1ef >;
			};
		};

		qcom,msm_npu@9800000 {
			compatible = "qcom,msm-npu";
			status = "ok";
			reg = < 0x9900000 0x20000 0x99f0000 0x10000 0x9980000 0x10000 0x17c00000 0x10000 0x1f40000 0x40000 >;
			reg-names = "tcm\0core\0cc\0apss_shared\0tcsr";
			interrupts = < 0x00 0x16c 0x04 0x00 0x16e 0x01 0x00 0x170 0x01 0x00 0x16d 0x04 >;
			interrupt-names = "error_irq\0wdg_bite_irq\0ipc_irq\0general_irq";
			iommus = < 0x43 0x1081 0x400 0x43 0x1082 0x400 0x43 0x10a1 0x400 0x43 0x10a2 0x400 0x43 0x10c1 0x400 0x43 0x10c2 0x400 >;
			qcom,npu-dsp-sid-mapped;
			clocks = < 0x4f 0x28 0x4f 0x0d 0x4f 0x04 0x4f 0x09 0x4f 0x03 0x4f 0x08 0x4f 0x20 0x4f 0x1f 0x4f 0x21 0x4f 0x1a 0x4f 0x1d 0x4f 0x1c 0x4f 0x1b 0x4f 0x10 0x4f 0x19 0x4f 0x11 0x4f 0x13 0x4f 0x0f 0x4f 0x26 0x4f 0x12 0x4f 0x06 0x4f 0x0b 0x4f 0x27 0x4f 0x02 0x4f 0x07 0x4f 0x0c 0x4f 0x01 0x4f 0x2a >;
			clock-names = "xo_clk\0npu_core_clk\0cal_hm0_clk\0cal_hm1_clk\0cal_hm0_cdc_clk\0cal_hm1_cdc_clk\0axi_clk\0ahb_clk\0dma_clk\0llm_clk\0llm_xo_clk\0llm_temp_clk\0llm_curr_clk\0dl_llm_clk\0isense_clk\0dpm_clk\0dpm_xo_clk\0dl_dpm_clk\0rsc_xo_clk\0dpm_temp_clk\0cal_hm0_dpm_ip_clk\0cal_hm1_dpm_ip_clk\0s2p_clk\0bwmon_clk\0cal_hm0_perf_cnt_clk\0cal_hm1_perf_cnt_clk\0bto_core_clk\0dsp_core_clk_src";
			vdd-supply = < 0x1f0 >;
			vdd_cx-supply = < 0x52 >;
			qcom,proxy-reg-names = "vdd\0vdd_cx";
			qcom,vdd_cx-uV-uA = < 0x180 0x186a0 >;
			resets = < 0x4f 0x03 0x4f 0x05 0x4f 0x06 >;
			reset-names = "dpm_temp_clk\0llm_curr_clk\0llm_temp_clk";
			#cooling-cells = < 0x02 >;
			mboxes = < 0x74 0x07 0x00 0x74 0x07 0x02 0x74 0x07 0x03 >;
			mbox-names = "ipcc-glink\0ipcc-smp2p\0ipcc-ping";
			#mbox-cells = < 0x02 >;
			qcom,npubw-devs = < 0x4a 0x4c 0x4d >;
			qcom,npubw-dev-names = "llcc_bw\0llcc_ddr_bw\0dsp_ddr_bw";
			qcom,src-dst-ports = < 0x9a 0x200 0x9a 0x26c >;
			phandle = < 0x3c >;

			qcom,npu-pwrlevels {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;
				compatible = "qcom,npu-pwrlevels";
				initial-pwrlevel = < 0x04 >;

				qcom,npu-pwrlevel@0 {
					reg = < 0x00 >;
					vreg = < 0x01 >;
					clk-freq = < 0x124f800 0x5f5e100 0x11e1a300 0x11e1a300 0x11e1a300 0x11e1a300 0xbebc200 0x2625a00 0x11e1a300 0x5f5e100 0x124f800 0x2faf080 0x2faf080 0x5f5e100 0x5f5e100 0x5f5e100 0x124f800 0x5f5e100 0x124f800 0x2faf080 0xbebc200 0xbebc200 0x2faf080 0x124f800 0x11e1a300 0x11e1a300 0x124f800 0x11e1a300 >;
				};

				qcom,npu-pwrlevel@1 {
					reg = < 0x01 >;
					vreg = < 0x02 >;
					clk-freq = < 0x124f800 0xbebc200 0x1bc69880 0x1bc69880 0x1bc69880 0x1bc69880 0xfea18c0 0x2625a00 0x18054ac0 0xbebc200 0x124f800 0x2faf080 0x2faf080 0xbebc200 0xbebc200 0xbebc200 0x124f800 0xbebc200 0x124f800 0x2faf080 0x1bc69880 0x1bc69880 0x2faf080 0x124f800 0x1bc69880 0x1bc69880 0x124f800 0x17d78400 >;
				};

				qcom,npu-pwrlevel@2 {
					reg = < 0x02 >;
					vreg = < 0x03 >;
					clk-freq = < 0x124f800 0x13d92d40 0x1fc4ef40 0x1fc4ef40 0x1fc4ef40 0x1fc4ef40 0x18054ac0 0x47868c0 0x1fc4ef40 0xcc16180 0x124f800 0x2faf080 0x5f5e100 0xcc16180 0xcc16180 0xcc16180 0x124f800 0xcc16180 0x124f800 0x2faf080 0x1fc4ef40 0x1fc4ef40 0x2faf080 0x124f800 0x1fc4ef40 0x1fc4ef40 0x124f800 0x1dcd6500 >;
				};

				qcom,npu-pwrlevel@3 {
					reg = < 0x03 >;
					vreg = < 0x04 >;
					clk-freq = < 0x124f800 0x1982c300 0x32a9f880 0x32a9f880 0x32a9f880 0x32a9f880 0x1fc4ef40 0x47868c0 0x29b92700 0x11e1a300 0x124f800 0x5f5e100 0xbebc200 0x11e1a300 0x11e1a300 0x11e1a300 0x124f800 0x11e1a300 0x124f800 0x5f5e100 0x32a9f880 0x32a9f880 0x5f5e100 0x124f800 0x32a9f880 0x32a9f880 0x124f800 0x2756cd00 >;
				};

				qcom,npu-pwrlevel@4 {
					reg = < 0x04 >;
					vreg = < 0x06 >;
					clk-freq = < 0x124f800 0x1dcd6500 0x3b9aca00 0x3b9aca00 0x3b9aca00 0x3b9aca00 0x29b92700 0x47868c0 0x300a9580 0x11e1a300 0x124f800 0x5f5e100 0xbebc200 0x11e1a300 0x11e1a300 0x11e1a300 0x124f800 0x11e1a300 0x124f800 0x5f5e100 0x3b9aca00 0x3b9aca00 0x5f5e100 0x124f800 0x3b9aca00 0x3b9aca00 0x124f800 0x2faf0800 >;
				};
			};
		};

		qcom,kgsl-hyp {
			compatible = "qcom,pil-tz-generic";
			qcom,pas-id = < 0x0d >;
			qcom,firmware-name = "a650_zap";
			phandle = < 0x430 >;
		};

		qcom,kgsl-busmon {
			label = "kgsl-busmon";
			compatible = "qcom,kgsl-busmon";
			operating-points-v2 = < 0x1f1 >;
			phandle = < 0x431 >;
		};

		qcom,gpubw {
			compatible = "qcom,devbw-ddr";
			governor = "bw_vbif";
			qcom,src-dst-ports = < 0x1a 0x200 >;
			operating-points-v2 = < 0x4b >;
			phandle = < 0x1f3 >;
		};

		gpu-opp-table {
			compatible = "operating-points-v2";
			phandle = < 0x1f1 >;

			opp-480000000 {
				opp-hz = < 0x00 0x1c9c3800 >;
				opp-microvolt = < 0xc0 >;
			};

			opp-381000000 {
				opp-hz = < 0x00 0x16b59940 >;
				opp-microvolt = < 0x80 >;
			};

			opp-290000000 {
				opp-hz = < 0x00 0x11490c80 >;
				opp-microvolt = < 0x40 >;
			};
		};

		qcom,kgsl-3d0@3d00000 {
			label = "kgsl-3d0";
			compatible = "qcom,kgsl-3d0\0qcom,kgsl-3d";
			status = "ok";
			reg = < 0x3d00000 0x40000 0x3d61000 0x800 0x3de0000 0x10000 0x3d8b000 0x2000 0x6900000 0x80000 >;
			reg-names = "kgsl_3d0_reg_memory\0cx_dbgc\0rscc\0isense_cntl\0qdss_gfx";
			interrupts = < 0x00 0x12c 0x04 >;
			interrupt-names = "kgsl_3d0_irq";
			qcom,id = < 0x00 >;
			qcom,chipid = < 0x6050000 >;
			qcom,initial-pwrlevel = < 0x02 >;
			qcom,idle-timeout = < 0x50 >;
			qcom,no-nap;
			qcom,highest-bank-bit = < 0x10 >;
			qcom,min-access-length = < 0x20 >;
			qcom,ubwc-mode = < 0x04 >;
			qcom,snapshot-size = < 0x200000 >;
			qcom,gpu-qdss-stm = < 0x161c0000 0x40000 >;
			#cooling-cells = < 0x02 >;
			qcom,tzone-name = "gpuss-max-step";
			qcom,pm-qos-active-latency = < 0x2c >;
			clocks = < 0x59 0x09 0x15 0x16 0x15 0x26 0x59 0x03 0x59 0x00 0x1f2 0x03 >;
			clock-names = "rbbmtimer_clk\0mem_clk\0mem_iface_clk\0gmu_clk\0gpu_cc_ahb\0l3_vote";
			qcom,isense-clk-on-level = < 0x01 >;
			qcom,gpubw-dev = < 0x1f3 >;
			qcom,bus-control;
			regulator-names = "vddcx\0vdd";
			vddcx-supply = < 0x14d >;
			vdd-supply = < 0x1f4 >;
			operating-points-v2 = < 0x1f1 >;
			nvmem-cells = < 0x1f5 0x1f6 >;
			nvmem-cell-names = "isense_slope\0speed_bin";
			qcom,bus-accesses-ddr7 = < 0x3ca >;
			qcom,bus-accesses-ddr8 = < 0x48a >;
			phandle = < 0x1b >;

			qcom,gpu-bus-table-0 {
				compatible = "qcom,gpu-bus-table\0qcom,gpu-bus-table-ddr7";
				qcom,msm-bus,name = "grp3d";
				qcom,msm-bus,num-cases = < 0x0c >;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x1a 0x200 0x00 0x00 0x1a 0x200 0x00 0xbebc2 0x1a 0x200 0x00 0x11e1a3 0x1a 0x200 0x00 0x1ae1b6 0x1a 0x200 0x00 0x209a8e 0x1a 0x200 0x00 0x28973c 0x1a 0x200 0x00 0x2dc6c0 0x1a 0x200 0x00 0x3c9e30 0x1a 0x200 0x00 0x50a524 0x1a 0x200 0x00 0x5caf6a 0x1a 0x200 0x00 0x6b86db 0x1a 0x200 0x00 0x7cb163 >;
			};

			qcom,gpu-bus-table-1 {
				compatible = "qcom,gpu-bus-table\0qcom,gpu-bus-table-ddr8";
				qcom,msm-bus,name = "grp3d";
				qcom,msm-bus,num-cases = < 0x0c >;
				qcom,msm-bus,num-paths = < 0x01 >;
				qcom,msm-bus,vectors-KBps = < 0x1a 0x200 0x00 0x00 0x1a 0x200 0x00 0xbebc2 0x1a 0x200 0x00 0x11e1a3 0x1a 0x200 0x00 0x1ae1b6 0x1a 0x200 0x00 0x209a8e 0x1a 0x200 0x00 0x28973c 0x1a 0x200 0x00 0x2dc6c0 0x1a 0x200 0x00 0x3c9e30 0x1a 0x200 0x00 0x5caf6a 0x1a 0x200 0x00 0x6b86db 0x1a 0x200 0x00 0x7cb163 0x1a 0x200 0x00 0xa3140c >;
			};

			qcom,l3-pwrlevels {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;
				compatible = "qcom,l3-pwrlevels";

				qcom,l3-pwrlevel@0 {
					reg = < 0x00 >;
					qcom,l3-freq = < 0x00 >;
				};

				qcom,l3-pwrlevel@1 {
					reg = < 0x01 >;
					qcom,l3-freq = < 0x337f9800 >;
				};

				qcom,l3-pwrlevel@2 {
					reg = < 0x02 >;
					qcom,l3-freq = < 0x501bd000 >;
				};
			};

			qcom,gpu-mempools {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;
				compatible = "qcom,gpu-mempools";

				qcom,gpu-mempool@0 {
					reg = < 0x00 >;
					qcom,mempool-page-size = < 0x1000 >;
					qcom,mempool-reserved = < 0x800 >;
					qcom,mempool-allocate;
				};

				qcom,gpu-mempool@1 {
					reg = < 0x01 >;
					qcom,mempool-page-size = < 0x2000 >;
					qcom,mempool-reserved = < 0x400 >;
					qcom,mempool-allocate;
				};

				qcom,gpu-mempool@2 {
					reg = < 0x02 >;
					qcom,mempool-page-size = < 0x10000 >;
					qcom,mempool-reserved = < 0x100 >;
				};

				qcom,gpu-mempool@3 {
					reg = < 0x03 >;
					qcom,mempool-page-size = < 0x100000 >;
					qcom,mempool-reserved = < 0x20 >;
				};
			};

			qcom,gpu-pwrlevels {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;
				compatible = "qcom,gpu-pwrlevels";

				qcom,gpu-pwrlevel@0 {
					reg = < 0x00 >;
					qcom,gpu-freq = < 0x1c9c3800 >;
					qcom,bus-freq-ddr7 = < 0x0b >;
					qcom,bus-min-ddr7 = < 0x0b >;
					qcom,bus-max-ddr7 = < 0x0b >;
					qcom,bus-freq-ddr8 = < 0x0b >;
					qcom,bus-min-ddr8 = < 0x0b >;
					qcom,bus-max-ddr8 = < 0x0b >;
				};

				qcom,gpu-pwrlevel@1 {
					reg = < 0x01 >;
					qcom,gpu-freq = < 0x16b59940 >;
					qcom,bus-freq-ddr7 = < 0x09 >;
					qcom,bus-min-ddr7 = < 0x07 >;
					qcom,bus-max-ddr7 = < 0x0b >;
					qcom,bus-freq-ddr8 = < 0x08 >;
					qcom,bus-min-ddr8 = < 0x07 >;
					qcom,bus-max-ddr8 = < 0x0b >;
				};

				qcom,gpu-pwrlevel@2 {
					reg = < 0x02 >;
					qcom,gpu-freq = < 0x11490c80 >;
					qcom,bus-freq-ddr7 = < 0x02 >;
					qcom,bus-min-ddr7 = < 0x01 >;
					qcom,bus-max-ddr7 = < 0x09 >;
					qcom,bus-freq-ddr8 = < 0x02 >;
					qcom,bus-min-ddr8 = < 0x01 >;
					qcom,bus-max-ddr8 = < 0x08 >;
				};

				qcom,gpu-pwrlevel@3 {
					reg = < 0x03 >;
					qcom,gpu-freq = < 0x00 >;
					qcom,bus-freq = < 0x00 >;
					qcom,bus-min = < 0x00 >;
					qcom,bus-max = < 0x00 >;
				};
			};
		};

		qcom,kgsl-iommu@3da0000 {
			compatible = "qcom,kgsl-smmu-v2";
			reg = < 0x3da0000 0x10000 >;
			qcom,protect = < 0xa0000 0xc000 >;
			clocks = < 0x15 0x26 0x15 0x27 0x59 0x00 >;
			clock-names = "gcc_gpu_memnoc_gfx\0gcc_gpu_snoc_dvm_gfx\0gpu_cc_ahb";
			qcom,secure_align_mask = < 0xfff >;
			qcom,retention;
			qcom,hyp_secure_alloc;
			phandle = < 0x432 >;

			gfx3d_user {
				compatible = "qcom,smmu-kgsl-cb";
				label = "gfx3d_user";
				iommus = < 0x152 0x00 0x401 >;
				qcom,iommu-dma = "disabled";
				qcom,gpu-offset = < 0xa8000 >;
				phandle = < 0x433 >;
			};

			gfx3d_secure {
				compatible = "qcom,smmu-kgsl-cb";
				label = "gfx3d_secure";
				iommus = < 0x152 0x02 0x400 >;
				qcom,iommu-dma = "disabled";
				phandle = < 0x434 >;
			};
		};

		qcom,gmu@3d6a000 {
			label = "kgsl-gmu";
			compatible = "qcom,gpu-gmu";
			reg = < 0x3d6a000 0x30000 0xb290000 0x10000 0xb490000 0x10000 >;
			reg-names = "kgsl_gmu_reg\0kgsl_gmu_pdc_cfg\0kgsl_gmu_pdc_seq";
			interrupts = < 0x00 0x130 0x04 0x00 0x131 0x04 >;
			interrupt-names = "kgsl_hfi_irq\0kgsl_gmu_irq";
			qcom,msm-bus,name = "cnoc";
			qcom,msm-bus,num-cases = < 0x02 >;
			qcom,msm-bus,num-paths = < 0x01 >;
			qcom,msm-bus,vectors-KBps = < 0x1a 0x2734 0x00 0x00 0x1a 0x2734 0x00 0x64 >;
			regulator-names = "vddcx\0vdd";
			vddcx-supply = < 0x14d >;
			vdd-supply = < 0x1f4 >;
			clocks = < 0x59 0x03 0x59 0x09 0x15 0x16 0x15 0x26 0x59 0x00 >;
			clock-names = "gmu_clk\0cxo_clk\0axi_clk\0memnoc_clk\0gpu_cc_ahb";
			mboxes = < 0x51 0x00 >;
			mbox-names = "aop";
			phandle = < 0x435 >;

			gmu_user {
				compatible = "qcom,smmu-gmu-user-cb";
				iommus = < 0x152 0x04 0x400 >;
				qcom,iommu-dma = "disabled";
				phandle = < 0x436 >;
			};

			gmu_kernel {
				compatible = "qcom,smmu-gmu-kernel-cb";
				iommus = < 0x152 0x05 0x400 >;
				qcom,iommu-dma = "disabled";
				phandle = < 0x437 >;
			};
		};

		qcom,smp2p_interrupt_qvrexternal_5_out {
			compatible = "qcom,smp2p-interrupt-qvrexternal-5-out";
			qcom,smem-states = < 0x1f7 0x00 >;
			qcom,smem-state-names = "qvrexternal-smp2p-out";
		};

		ipcc-self-ping-apss {
			compatible = "qcom,ipcc-self-ping";
			interrupts-extended = < 0x74 0x08 0x02 0x04 >;
			mboxes = < 0x74 0x08 0x02 >;
			phandle = < 0x438 >;
		};

		ipcc-self-ping-cdsp {
			compatible = "qcom,ipcc-self-ping";
			interrupts-extended = < 0x74 0x06 0x03 0x04 >;
			mboxes = < 0x74 0x06 0x03 >;
			phandle = < 0x439 >;
		};

		ipcc-self-ping-adsp {
			compatible = "qcom,ipcc-self-ping";
			interrupts-extended = < 0x74 0x03 0x03 0x04 >;
			mboxes = < 0x74 0x03 0x03 >;
			phandle = < 0x43a >;
		};

		ipcc-self-ping-slpi {
			compatible = "qcom,ipcc-self-ping";
			interrupts-extended = < 0x74 0x04 0x03 0x04 >;
			mboxes = < 0x74 0x04 0x03 >;
			phandle = < 0x43b >;
		};

		ipcc-self-ping-npu {
			compatible = "qcom,ipcc-self-ping";
			interrupts-extended = < 0x74 0x07 0x03 0x04 >;
			mboxes = < 0x3c 0x07 0x03 >;
			phandle = < 0x43c >;
		};
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	chosen {
		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
	};

	firmware {
		phandle = < 0x43d >;

		android {
			compatible = "android,firmware";

			vbmeta {
				compatible = "android,vbmeta";
				parts = "vbmeta,boot,system,vendor,dtbo";
			};

			fstab {
				compatible = "android,fstab";

				vendor {
					compatible = "android,vendor";
					dev = "/dev/block/platform/soc/1d84000.ufshc/by-name/vendor";
					type = "ext4";
					mnt_flags = "ro,barrier=1,discard";
					fsmgr_flags = "wait,slotselect,avb";
					status = "ok";
				};
			};
		};
	};

	reserved-memory {
		#address-cells = < 0x02 >;
		#size-cells = < 0x02 >;
		ranges;
		phandle = < 0x43e >;

		hyp_region@80000000 {
			no-map;
			reg = < 0x00 0x80000000 0x00 0x600000 >;
			phandle = < 0x43f >;
		};

		xbl_aop_region@80700000 {
			no-map;
			reg = < 0x00 0x80700000 0x00 0x160000 >;
			phandle = < 0x440 >;
		};

		reserved-memory@80860000 {
			reg = < 0x00 0x80860000 0x00 0x20000 >;
			compatible = "qcom,cmd-db";
			no-map;
			phandle = < 0x441 >;
		};

		smem_region@80900000 {
			no-map;
			reg = < 0x00 0x80900000 0x00 0x200000 >;
			phandle = < 0x6f >;
		};

		removed_region@80b00000 {
			no-map;
			reg = < 0x00 0x80b00000 0x00 0x5300000 >;
			phandle = < 0x442 >;
		};

		pil_camera_region@86200000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x86200000 0x00 0x500000 >;
			phandle = < 0x169 >;
		};

		pil_gpu_region@8681a000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x8681a000 0x00 0x2000 >;
			phandle = < 0x443 >;
		};

		pil_npu_region@86900000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x86900000 0x00 0x500000 >;
			phandle = < 0x86 >;
		};

		pil_video_region@86e00000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x86e00000 0x00 0x500000 >;
			phandle = < 0x84 >;
		};

		pil_cvp_region@87300000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x87300000 0x00 0x500000 >;
			phandle = < 0x85 >;
		};

		pil_cdsp_region@87800000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x87800000 0x00 0x1400000 >;
			phandle = < 0x80 >;
		};

		pil_adsp_region@8a100000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x8a100000 0x00 0x1d00000 >;
			phandle = < 0x7d >;
		};

		pil_spss_region@8be00000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = < 0x00 0x8be00000 0x00 0x100000 >;
			phandle = < 0x73 >;
		};

		adsp_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0xc00000 >;
			phandle = < 0x8a >;
		};

		sdsp_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x800000 >;
			phandle = < 0x13f >;
		};

		cdsp_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x400000 >;
			phandle = < 0x1ef >;
		};

		cont_splash_region@9c000000 {
			reg = < 0x00 0x9c000000 0x00 0x2300000 >;
			label = "cont_splash_region";
			phandle = < 0x444 >;
		};

		dfps_data_region@9e300000 {
			reg = < 0x00 0x9e300000 0x00 0x100000 >;
			label = "dfps_data_region";
			phandle = < 0x15b >;
		};

		sp_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x1000000 >;
			phandle = < 0x142 >;
		};

		user_contig_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x1000000 >;
			phandle = < 0x140 >;
		};

		qseecom_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x1400000 >;
			phandle = < 0x50 >;
		};

		qseecom_ta_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x1000000 >;
			phandle = < 0x141 >;
		};

		secure_display_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0xa400000 >;
			phandle = < 0x143 >;
		};

		cnss_wlan_region {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x1400000 >;
			phandle = < 0x14c >;
		};

		linux,cma {
			compatible = "shared-dma-pool";
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			reusable;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x2000000 >;
			linux,cma-default;
		};

		mailbox_region {
			compatible = "shared-dma-pool";
			no-map;
			alloc-ranges = < 0x00 0x00 0x00 0xffffffff >;
			alignment = < 0x00 0x400000 >;
			size = < 0x00 0x20000 >;
			phandle = < 0x445 >;
		};
	};

	vendor {
		#address-cells = < 0x01 >;
		#size-cells = < 0x01 >;
		ranges = < 0x00 0x00 0x00 0xffffffff >;
		compatible = "simple-bus";
		phandle = < 0x446 >;
	};

	__symbols__ {
		aliases = "/aliases";
		CPU0 = "/cpus/cpu@0";
		L2_0 = "/cpus/cpu@0/l2-cache";
		L3_0 = "/cpus/cpu@0/l2-cache/l3-cache";
		L1_I_0 = "/cpus/cpu@0/l1-icache";
		L1_D_0 = "/cpus/cpu@0/l1-dcache";
		CPU1 = "/cpus/cpu@100";
		L2_1 = "/cpus/cpu@100/l2-cache";
		L1_I_100 = "/cpus/cpu@100/l1-icache";
		L1_D_100 = "/cpus/cpu@100/l1-dcache";
		CPU2 = "/cpus/cpu@200";
		L2_2 = "/cpus/cpu@200/l2-cache";
		L1_I_200 = "/cpus/cpu@200/l1-icache";
		L1_D_200 = "/cpus/cpu@200/l1-dcache";
		CPU3 = "/cpus/cpu@300";
		L2_3 = "/cpus/cpu@300/l2-cache";
		L1_I_300 = "/cpus/cpu@300/l1-icache";
		L1_D_300 = "/cpus/cpu@300/l1-dcache";
		CPU4 = "/cpus/cpu@400";
		L2_4 = "/cpus/cpu@400/l2-cache";
		L1_I_400 = "/cpus/cpu@400/l1-icache";
		L1_D_400 = "/cpus/cpu@400/l1-dcache";
		CPU5 = "/cpus/cpu@500";
		L2_5 = "/cpus/cpu@500/l2-cache";
		L1_I_500 = "/cpus/cpu@500/l1-icache";
		L1_D_500 = "/cpus/cpu@500/l1-dcache";
		CPU6 = "/cpus/cpu@600";
		L2_6 = "/cpus/cpu@600/l2-cache";
		L1_I_600 = "/cpus/cpu@600/l1-icache";
		L1_D_600 = "/cpus/cpu@600/l1-dcache";
		CPU7 = "/cpus/cpu@700";
		L2_7 = "/cpus/cpu@700/l2-cache";
		L1_I_700 = "/cpus/cpu@700/l1-icache";
		L1_D_700 = "/cpus/cpu@700/l1-dcache";
		cpu_pmu = "/cpu-pmu";
		soc = "/soc";
		cpufreq_hw = "/soc/qcom,cpufreq-hw";
		cpu7_notify = "/soc/qcom,cpufreq-hw/cpu7-notify";
		cpu0_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu0-isolate";
		cpu1_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu1-isolate";
		cpu2_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu2-isolate";
		cpu3_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu3-isolate";
		cpu4_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu4-isolate";
		cpu5_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu5-isolate";
		cpu6_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu6-isolate";
		cpu7_isolate = "/soc/qcom,cpufreq-hw/qcom,cpu-isolation/cpu7-isolate";
		thermal_zones = "/soc/thermal-zones";
		gpu_trip0 = "/soc/thermal-zones/gpuss-max-step/trips/gpu-trip0";
		pop_trip = "/soc/thermal-zones/pop-mem-step/trips/pop-trip";
		cpu00_config = "/soc/thermal-zones/cpu-0-0-step/trips/cpu00-config";
		cpu01_config = "/soc/thermal-zones/cpu-0-1-step/trips/cpu01-config";
		cpu02_config = "/soc/thermal-zones/cpu-0-2-step/trips/cpu02-config";
		cpu03_config = "/soc/thermal-zones/cpu-0-3-step/trips/cpu03-config";
		cpufreq_10_config = "/soc/thermal-zones/cpu-1-0-step/trips/cpufreq-10-config";
		cpu10_config = "/soc/thermal-zones/cpu-1-0-step/trips/cpu10-config";
		cpufreq_11_config = "/soc/thermal-zones/cpu-1-1-step/trips/cpufreq-11-config";
		cpu11_config = "/soc/thermal-zones/cpu-1-1-step/trips/cpu11-config";
		cpufreq_12_config = "/soc/thermal-zones/cpu-1-2-step/trips/cpufreq-12-config";
		cpu12_config = "/soc/thermal-zones/cpu-1-2-step/trips/cpu12-config";
		cpufreq_13_config = "/soc/thermal-zones/cpu-1-3-step/trips/cpufreq-13-config";
		cpu13_config = "/soc/thermal-zones/cpu-1-3-step/trips/cpu13-config";
		cpufreq_14_config = "/soc/thermal-zones/cpu-1-4-step/trips/cpufreq-14-config";
		cpu14_config = "/soc/thermal-zones/cpu-1-4-step/trips/cpu14-config";
		cpufreq_15_config = "/soc/thermal-zones/cpu-1-5-step/trips/cpufreq-15-config";
		cpu15_config = "/soc/thermal-zones/cpu-1-5-step/trips/cpu15-config";
		cpufreq_16_config = "/soc/thermal-zones/cpu-1-6-step/trips/cpufreq-16-config";
		cpu16_config = "/soc/thermal-zones/cpu-1-6-step/trips/cpu16-config";
		cpufreq_17_config = "/soc/thermal-zones/cpu-1-7-step/trips/cpufreq-17-config";
		cpu17_config = "/soc/thermal-zones/cpu-1-7-step/trips/cpu17-config";
		cwlan_trip0 = "/soc/thermal-zones/cwlan-step/trips/cwlan-trip0";
		video_trip0 = "/soc/thermal-zones/video-step/trips/video-trip0";
		ddr_trip0 = "/soc/thermal-zones/ddr-step/trips/ddr-trip0";
		q6_hvx_trip0 = "/soc/thermal-zones/q6-hvx-step/trips/q6-hvx-trip0";
		camera_trip0 = "/soc/thermal-zones/camera-step/trips/camera-trip0";
		cmpss_trip0 = "/soc/thermal-zones/cmpss-step/trips/cmpss-trip0";
		npu_trip0 = "/soc/thermal-zones/npu-step/trips/npu-trip0";
		slim_aud = "/soc/slim@3ac0000";
		btfmslim_codec = "/soc/slim@3ac0000/qca6390";
		intc = "/soc/interrupt-controller@17a00000";
		wdog = "/soc/qcom,wdt@17c10000";
		arch_timer = "/soc/timer";
		memtimer = "/soc/timer@17c20000";
		cpu0_l3 = "/soc/qcom,devfreq-l3/qcom,cpu0-cpu-l3-lat";
		cpu4_l3 = "/soc/qcom,devfreq-l3/qcom,cpu4-cpu-l3-lat";
		cpu7_l3 = "/soc/qcom,devfreq-l3/qcom,cpu7-cpu-l3-lat";
		cdsp_l3 = "/soc/qcom,devfreq-l3/qcom,cdsp-cdsp-l3-lat";
		bus_proxy_client = "/soc/qcom,bus_proxy_client";
		keepalive_opp_table = "/soc/keepalive-opp-table";
		snoc_cnoc_keepalive = "/soc/qcom,snoc_cnoc_keepalive";
		llcc_bw_opp_table = "/soc/llcc-bw-opp-table";
		suspendable_llcc_bw_opp_table = "/soc/suspendable-llcc-bw-opp-table";
		ddr_bw_opp_table = "/soc/ddr-bw-opp-table";
		suspendable_ddr_bw_opp_table = "/soc/suspendable-ddr-bw-opp-table";
		llcc_pmu = "/soc/llcc-pmu@9095000";
		cpu_cpu_llcc_bw = "/soc/qcom,cpu-cpu-llcc-bw";
		cpu_cpu_llcc_bwmon = "/soc/qcom,cpu-cpu-llcc-bwmon@90b6400";
		cpu_llcc_ddr_bw = "/soc/qcom,cpu-llcc-ddr-bw";
		cpu_llcc_ddr_bwmon = "/soc/qcom,cpu-llcc-ddr-bwmon@9091000";
		npu_npu_llcc_bw = "/soc/qcom,npu-npu-llcc-bw";
		npu_npu_llcc_bwmon = "/soc/qcom,npu-npu-llcc-bwmon@60300";
		npu_llcc_ddr_bw = "/soc/qcom,npu-llcc-ddr-bw";
		npu_llcc_ddr_bwmon = "/soc/qcom,npu-llcc-ddr-bwmon@0x9093000";
		npudsp_npu_ddr_bw = "/soc/qcom,npudsp-npu-ddr-bw";
		npudsp_npu_ddr_bwmon = "/soc/qcom,npudsp-npu-ddr-bwmon@70200";
		npu_npu_ddr_latfloor = "/soc/qcom,npu-npu-ddr-latfloor";
		npu_staticmap_mon = "/soc/qcom,npu-staticmap-mon";
		qoslat_opp_table = "/soc/qoslat-opp-table";
		qcom_seecom = "/soc/qseecom@82400000";
		qcom_rng = "/soc/qrng@793000";
		pdc = "/soc/interrupt-controller@b220000";
		xo_board = "/soc/clocks/xo-board";
		sleep_clk = "/soc/clocks/sleep-clk";
		clock_aop = "/soc/qcom,aopclk";
		clock_gcc = "/soc/qcom,gcc@100000";
		clock_npucc = "/soc/qcom,npucc@9980000";
		clock_videocc = "/soc/qcom,videocc@abf0000";
		clock_camcc = "/soc/qcom,camcc@ad00000";
		clock_dispcc = "/soc/qcom,dispcc@af00000";
		clock_gpucc = "/soc/qcom,gpucc@3d90000";
		clock_cpucc = "/soc/qcom,cpucc";
		clock_apsscc = "/soc/syscon@182a0000";
		clock_mccc = "/soc/syscon@90ba000";
		clock_debugcc = "/soc/qcom,cc-debug";
		pcie_0_gdsc = "/soc/qcom,gdsc@16b004";
		pcie_1_gdsc = "/soc/qcom,gdsc@18d004";
		pcie_2_gdsc = "/soc/qcom,gdsc@106004";
		ufs_phy_gdsc = "/soc/qcom,gdsc@177004";
		usb30_prim_gdsc = "/soc/qcom,gdsc@10f004";
		usb30_sec_gdsc = "/soc/qcom,gdsc@110004";
		hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = "/soc/qcom,gdsc@17d050";
		hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = "/soc/qcom,gdsc@17d058";
		hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc = "/soc/qcom,gdsc@17d054";
		hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc = "/soc/qcom,gdsc@17d06c";
		bps_gdsc = "/soc/qcom,gdsc@ad07004";
		ife_0_gdsc = "/soc/qcom,gdsc@ad0a004";
		ife_1_gdsc = "/soc/qcom,gdsc@ad0b004";
		ipe_0_gdsc = "/soc/qcom,gdsc@ad08004";
		sbi_gdsc = "/soc/qcom,gdsc@ad09004";
		titan_top_gdsc = "/soc/qcom,gdsc@ad0c144";
		mdss_core_gdsc = "/soc/qcom,gdsc@af03000";
		gpu_cx_hw_ctrl = "/soc/syscon@3d91540";
		gpu_cx_gdsc = "/soc/qcom,gdsc@3d9106c";
		gpu_gx_domain_addr = "/soc/syscon@3d91508";
		gpu_gx_sw_reset = "/soc/syscon@3d91008";
		gpu_gx_gdsc = "/soc/qcom,gdsc@3d9100c";
		npu_core_gdsc = "/soc/qcom,gdsc@9981004";
		mvs0_gdsc = "/soc/qcom,gdsc@abf0d18";
		mvs0c_gdsc = "/soc/qcom,gdsc@abf0bf8";
		mvs1_gdsc = "/soc/qcom,gdsc@abf0d98";
		mvs1c_gdsc = "/soc/qcom,gdsc@abf0c98";
		spmi_bus = "/soc/qcom,spmi@c440000";
		ufs_ice = "/soc/ufsice@1d90000";
		ufsphy_mem = "/soc/ufsphy_mem@1d87000";
		ufshc_mem = "/soc/ufshc@1d84000";
		sdhc_2 = "/soc/sdhci@8804000";
		ipcc_mproc = "/soc/qcom,ipcc@408000";
		apps_rsc = "/soc/rsc@18200000";
		clock_rpmh = "/soc/rsc@18200000/qcom,rpmhclk";
		VDD_MX_LEVEL = "/soc/rsc@18200000/rpmh-regulator-mxlvl/regulator-pm8150a-s3-level";
		S3C_LEVEL = "/soc/rsc@18200000/rpmh-regulator-mxlvl/regulator-pm8150a-s3-level";
		pm8150a_s3_level = "/soc/rsc@18200000/rpmh-regulator-mxlvl/regulator-pm8150a-s3-level";
		VDD_MX_LEVEL_AO = "/soc/rsc@18200000/rpmh-regulator-mxlvl/regulator-pm8150a-s3-level-ao";
		S3C_LEVEL_AO = "/soc/rsc@18200000/rpmh-regulator-mxlvl/regulator-pm8150a-s3-level-ao";
		pm8150a_s3_level_ao = "/soc/rsc@18200000/rpmh-regulator-mxlvl/regulator-pm8150a-s3-level-ao";
		VDD_MX_MMCX_SUPPLY_LEVEL = "/soc/rsc@18200000/rpmh-regulator-mxlvl/regulator-pm8150a-s3-mmcx-sup-level";
		VDD_CX_LEVEL = "/soc/rsc@18200000/rpmh-regulator-cxlvl/regulator-pm8150-s3-level";
		S3A_LEVEL = "/soc/rsc@18200000/rpmh-regulator-cxlvl/regulator-pm8150-s3-level";
		pm8150_s3_level = "/soc/rsc@18200000/rpmh-regulator-cxlvl/regulator-pm8150-s3-level";
		VDD_CX_LEVEL_AO = "/soc/rsc@18200000/rpmh-regulator-cxlvl/regulator-pm8150-s3-level-ao";
		S3A_LEVEL_AO = "/soc/rsc@18200000/rpmh-regulator-cxlvl/regulator-pm8150-s3-level-ao";
		pm8150_s3_level_ao = "/soc/rsc@18200000/rpmh-regulator-cxlvl/regulator-pm8150-s3-level-ao";
		VDD_CX_MMCX_SUPPLY_LEVEL = "/soc/rsc@18200000/rpmh-regulator-cxlvl/regulator-pm8150-s3-mmcx-sup-level";
		S4A = "/soc/rsc@18200000/rpmh-regulator-smpa4/regulator-pm8150-s4";
		pm8150_s4 = "/soc/rsc@18200000/rpmh-regulator-smpa4/regulator-pm8150-s4";
		S5A = "/soc/rsc@18200000/rpmh-regulator-smpa5/regulator-pm8150-s5";
		pm8150_s5 = "/soc/rsc@18200000/rpmh-regulator-smpa5/regulator-pm8150-s5";
		S6A = "/soc/rsc@18200000/rpmh-regulator-smpa6/regulator-pm8150-s6";
		pm8150_s6 = "/soc/rsc@18200000/rpmh-regulator-smpa6/regulator-pm8150-s6";
		L2A = "/soc/rsc@18200000/rpmh-regulator-ldoa2/regulator-pm8150-l2";
		pm8150_l2 = "/soc/rsc@18200000/rpmh-regulator-ldoa2/regulator-pm8150-l2";
		L3A = "/soc/rsc@18200000/rpmh-regulator-ldoa3/regulator-pm8150-l3";
		pm8150_l3 = "/soc/rsc@18200000/rpmh-regulator-ldoa3/regulator-pm8150-l3";
		L4A_LEVEL = "/soc/rsc@18200000/rpmh-regulator-lmxlvl/regulator-pm8150-l4-level";
		pm8150_l4_level = "/soc/rsc@18200000/rpmh-regulator-lmxlvl/regulator-pm8150-l4-level";
		L5A = "/soc/rsc@18200000/rpmh-regulator-ldoa5/regulator-pm8150-l5";
		pm8150_l5 = "/soc/rsc@18200000/rpmh-regulator-ldoa5/regulator-pm8150-l5";
		L5A_AO = "/soc/rsc@18200000/rpmh-regulator-ldoa5/regulator-pm8150-l5-ao";
		pm8150_l5_ao = "/soc/rsc@18200000/rpmh-regulator-ldoa5/regulator-pm8150-l5-ao";
		L6A = "/soc/rsc@18200000/rpmh-regulator-ldoa6/regulator-pm8150-l6";
		pm8150_l6 = "/soc/rsc@18200000/rpmh-regulator-ldoa6/regulator-pm8150-l6";
		L7A = "/soc/rsc@18200000/rpmh-regulator-ldoa7/regulator-pm8150-l7";
		pm8150_l7 = "/soc/rsc@18200000/rpmh-regulator-ldoa7/regulator-pm8150-l7";
		L9A = "/soc/rsc@18200000/rpmh-regulator-ldoa9/regulator-pm8150-l9";
		pm8150_l9 = "/soc/rsc@18200000/rpmh-regulator-ldoa9/regulator-pm8150-l9";
		L10A = "/soc/rsc@18200000/rpmh-regulator-ldoa10/regulator-pm8150-l10";
		pm8150_l10 = "/soc/rsc@18200000/rpmh-regulator-ldoa10/regulator-pm8150-l10";
		L11A_LEVEL = "/soc/rsc@18200000/rpmh-regulator-lcxlvl/regulator-pm8150-l11-level";
		pm8150_l11_level = "/soc/rsc@18200000/rpmh-regulator-lcxlvl/regulator-pm8150-l11-level";
		L12A = "/soc/rsc@18200000/rpmh-regulator-ldoa12/regulator-pm8150-l12";
		pm8150_l12 = "/soc/rsc@18200000/rpmh-regulator-ldoa12/regulator-pm8150-l12";
		L12A_AO = "/soc/rsc@18200000/rpmh-regulator-ldoa12/regulator-pm8150-l12-ao";
		pm8150_l12_ao = "/soc/rsc@18200000/rpmh-regulator-ldoa12/regulator-pm8150-l12-ao";
		L13A = "/soc/rsc@18200000/rpmh-regulator-ldoa13/regulator-pm8150-l13";
		pm8150_l13 = "/soc/rsc@18200000/rpmh-regulator-ldoa13/regulator-pm8150-l13";
		L14A = "/soc/rsc@18200000/rpmh-regulator-ldoa14/regulator-pm8150-l14";
		pm8150_l14 = "/soc/rsc@18200000/rpmh-regulator-ldoa14/regulator-pm8150-l14";
		L15A = "/soc/rsc@18200000/rpmh-regulator-ldoa15/regulator-pm8150-l15";
		pm8150_l15 = "/soc/rsc@18200000/rpmh-regulator-ldoa15/regulator-pm8150-l15";
		L16A = "/soc/rsc@18200000/rpmh-regulator-ldoa16/regulator-pm8150-l16";
		pm8150_l16 = "/soc/rsc@18200000/rpmh-regulator-ldoa16/regulator-pm8150-l16";
		L17A = "/soc/rsc@18200000/rpmh-regulator-ldoa17/regulator-pm8150-l17";
		pm8150_l17 = "/soc/rsc@18200000/rpmh-regulator-ldoa17/regulator-pm8150-l17";
		L18A = "/soc/rsc@18200000/rpmh-regulator-ldoa18/regulator-pm8150-l18";
		pm8150_l18 = "/soc/rsc@18200000/rpmh-regulator-ldoa18/regulator-pm8150-l18";
		VDD_GFX_LEVEL = "/soc/rsc@18200000/rpmh-regulator-gfxlvl/regulator-pm8150a-s1-level";
		S1C_LEVEL = "/soc/rsc@18200000/rpmh-regulator-gfxlvl/regulator-pm8150a-s1-level";
		pm8150a_s1_level = "/soc/rsc@18200000/rpmh-regulator-gfxlvl/regulator-pm8150a-s1-level";
		VDD_MMCX_LEVEL = "/soc/rsc@18200000/rpmh-regulator-mmcxlvl/regulator-pm8150a-s4-level";
		S4C_LEVEL = "/soc/rsc@18200000/rpmh-regulator-mmcxlvl/regulator-pm8150a-s4-level";
		pm8150a_s4_level = "/soc/rsc@18200000/rpmh-regulator-mmcxlvl/regulator-pm8150a-s4-level";
		VDD_MMCX_LEVEL_AO = "/soc/rsc@18200000/rpmh-regulator-mmcxlvl/regulator-pm8150a-s4-level-ao";
		S4C_LEVEL_AO = "/soc/rsc@18200000/rpmh-regulator-mmcxlvl/regulator-pm8150a-s4-level-ao";
		pm8150a_s4_level_ao = "/soc/rsc@18200000/rpmh-regulator-mmcxlvl/regulator-pm8150a-s4-level-ao";
		S6C_LEVEL = "/soc/rsc@18200000/rpmh-regulator-ebilvl/regulator-pm8150a-s6-level";
		pm8150a_s6_level = "/soc/rsc@18200000/rpmh-regulator-ebilvl/regulator-pm8150a-s6-level";
		S7C = "/soc/rsc@18200000/rpmh-regulator-smpc7/regulator-pm8150a-s7";
		pm8150a_s7 = "/soc/rsc@18200000/rpmh-regulator-smpc7/regulator-pm8150a-s7";
		S8C = "/soc/rsc@18200000/rpmh-regulator-smpc8/regulator-pm8150a-s8";
		pm8150a_s8 = "/soc/rsc@18200000/rpmh-regulator-smpc8/regulator-pm8150a-s8";
		L1C = "/soc/rsc@18200000/rpmh-regulator-ldoc1/regulator-pm8150a-l1";
		pm8150a_l1 = "/soc/rsc@18200000/rpmh-regulator-ldoc1/regulator-pm8150a-l1";
		L2C = "/soc/rsc@18200000/rpmh-regulator-ldoc2/regulator-pm8150a-l2";
		pm8150a_l2 = "/soc/rsc@18200000/rpmh-regulator-ldoc2/regulator-pm8150a-l2";
		L3C = "/soc/rsc@18200000/rpmh-regulator-ldoc3/regulator-pm8150a-l3";
		pm8150a_l3 = "/soc/rsc@18200000/rpmh-regulator-ldoc3/regulator-pm8150a-l3";
		L4C = "/soc/rsc@18200000/rpmh-regulator-ldoc4/regulator-pm8150a-l4";
		pm8150a_l4 = "/soc/rsc@18200000/rpmh-regulator-ldoc4/regulator-pm8150a-l4";
		L5C = "/soc/rsc@18200000/rpmh-regulator-ldoc5/regulator-pm8150a-l5";
		pm8150a_l5 = "/soc/rsc@18200000/rpmh-regulator-ldoc5/regulator-pm8150a-l5";
		L6C = "/soc/rsc@18200000/rpmh-regulator-ldoc6/regulator-pm8150a-l6";
		pm8150a_l6 = "/soc/rsc@18200000/rpmh-regulator-ldoc6/regulator-pm8150a-l6";
		L7C = "/soc/rsc@18200000/rpmh-regulator-ldoc7/regulator-pm8150a-l7";
		pm8150a_l7 = "/soc/rsc@18200000/rpmh-regulator-ldoc7/regulator-pm8150a-l7";
		L8C = "/soc/rsc@18200000/rpmh-regulator-ldoc8/regulator-pm8150a-l8";
		pm8150a_l8 = "/soc/rsc@18200000/rpmh-regulator-ldoc8/regulator-pm8150a-l8";
		L9C = "/soc/rsc@18200000/rpmh-regulator-ldoc9/regulator-pm8150a-l9";
		pm8150a_l9 = "/soc/rsc@18200000/rpmh-regulator-ldoc9/regulator-pm8150a-l9";
		L10C = "/soc/rsc@18200000/rpmh-regulator-ldoc10/regulator-pm8150a-l10";
		pm8150a_l10 = "/soc/rsc@18200000/rpmh-regulator-ldoc10/regulator-pm8150a-l10";
		L11C = "/soc/rsc@18200000/rpmh-regulator-ldoc11/regulator-pm8150a-l11";
		pm8150a_l11 = "/soc/rsc@18200000/rpmh-regulator-ldoc11/regulator-pm8150a-l11";
		BOB = "/soc/rsc@18200000/rpmh-regulator-bobc1/regulator-pm8150a-bob";
		pm8150a_bob = "/soc/rsc@18200000/rpmh-regulator-bobc1/regulator-pm8150a-bob";
		BOB_AO = "/soc/rsc@18200000/rpmh-regulator-bobc1/regulator-pm8150a-bob-ao";
		pm8150a_bob_ao = "/soc/rsc@18200000/rpmh-regulator-bobc1/regulator-pm8150a-bob-ao";
		S1F = "/soc/rsc@18200000/rpmh-regulator-smpf1/regulator-pm8009-s1";
		pm8009_s1 = "/soc/rsc@18200000/rpmh-regulator-smpf1/regulator-pm8009-s1";
		S2F = "/soc/rsc@18200000/rpmh-regulator-smpf2/regulator-pm8009-s2";
		pm8009_s2 = "/soc/rsc@18200000/rpmh-regulator-smpf2/regulator-pm8009-s2";
		L1F = "/soc/rsc@18200000/rpmh-regulator-ldof1/regulator-pm8009-l1";
		pm8009_l1 = "/soc/rsc@18200000/rpmh-regulator-ldof1/regulator-pm8009-l1";
		L2F = "/soc/rsc@18200000/rpmh-regulator-ldof2/regulator-pm8009-l2";
		pm8009_l2 = "/soc/rsc@18200000/rpmh-regulator-ldof2/regulator-pm8009-l2";
		L3F = "/soc/rsc@18200000/rpmh-regulator-ldof3/regulator-pm8009-l3";
		pm8009_l3 = "/soc/rsc@18200000/rpmh-regulator-ldof3/regulator-pm8009-l3";
		L5F = "/soc/rsc@18200000/rpmh-regulator-ldof5/regulator-pm8009-l5";
		pm8009_l5 = "/soc/rsc@18200000/rpmh-regulator-ldof5/regulator-pm8009-l5";
		L6F = "/soc/rsc@18200000/rpmh-regulator-ldof6/regulator-pm8009-l6";
		pm8009_l6 = "/soc/rsc@18200000/rpmh-regulator-ldof6/regulator-pm8009-l6";
		L7F = "/soc/rsc@18200000/rpmh-regulator-ldof7/regulator-pm8009-l7";
		pm8009_l7 = "/soc/rsc@18200000/rpmh-regulator-ldof7/regulator-pm8009-l7";
		disp_rsc = "/soc/rsc@af20000";
		tcsr_mutex_block = "/soc/syscon@1f40000";
		tcsr_mutex = "/soc/hwlock";
		smem = "/soc/qcom,smem";
		sp_scsr = "/soc/mailbox@188501c";
		sp_scsr_block = "/soc/syscon@1880000";
		intsp = "/soc/qcom,qsee_irq";
		spss_utils = "/soc/qcom,spss_utils";
		glink_npu = "/soc/qcom,glink/npu";
		glink_adsp = "/soc/qcom,glink/adsp";
		glink_slpi = "/soc/qcom,glink/dsps";
		glink_cdsp = "/soc/qcom,glink/cdsp";
		msm_cdsp_rm = "/soc/qcom,glink/cdsp/qcom,msm_cdsprm_rpmsg/qcom,msm_cdsp_rm";
		msm_hvx_rm = "/soc/qcom,glink/cdsp/qcom,msm_cdsprm_rpmsg/qcom,msm_hvx_rm";
		glink_spss = "/soc/qcom,glink/spss";
		qmp_aop = "/soc/qcom,qmp-aop@c300000";
		eud = "/soc/qcom,msm-eud@ff0000";
		msm_fastrpc = "/soc/qcom,msm_fastrpc";
		qcom_cedev = "/soc/qcedev@1de0000";
		qcom_crypto = "/soc/qcrypto@1de0000";
		qcom_msmhdcp = "/soc/qcom,msm_hdcp";
		qcom_tzlog = "/soc/tz-log@146bf720";
		qcom_smcinvoke = "/soc/smcinvoke@87900000";
		tsens0 = "/soc/tsens@c222000";
		tsens1 = "/soc/tsens@c223000";
		gpi_dma0 = "/soc/qcom,gpi-dma@900000";
		gpi_dma1 = "/soc/qcom,gpi-dma@a00000";
		gpi_dma2 = "/soc/qcom,gpi-dma@800000";
		wlan = "/soc/qcom,cnss-qca6390@b0000000";
		qfprom = "/soc/qfprom@780000";
		gpu_lm_efuse = "/soc/qfprom@780000/gpu_lm_efuse@5c8";
		gpu_speed_bin = "/soc/qfprom@780000/gpu_speed_bin@19b";
		refgen = "/soc/refgen-regulator@88e7000";
		ad_hoc_bus = "/soc/ad-hoc-bus";
		rsc_apps = "/soc/ad-hoc-bus/rsc-apps";
		rsc_disp = "/soc/ad-hoc-bus/rsc-disp";
		bcm_acv = "/soc/ad-hoc-bus/bcm-acv";
		bcm_alc = "/soc/ad-hoc-bus/bcm-alc";
		bcm_mc0 = "/soc/ad-hoc-bus/bcm-mc0";
		bcm_sh0 = "/soc/ad-hoc-bus/bcm-sh0";
		bcm_mm0 = "/soc/ad-hoc-bus/bcm-mm0";
		bcm_ce0 = "/soc/ad-hoc-bus/bcm-ce0";
		bcm_ip0 = "/soc/ad-hoc-bus/bcm-ip0";
		bcm_mm1 = "/soc/ad-hoc-bus/bcm-mm1";
		bcm_sh2 = "/soc/ad-hoc-bus/bcm-sh2";
		bcm_mm2 = "/soc/ad-hoc-bus/bcm-mm2";
		bcm_qup0 = "/soc/ad-hoc-bus/bcm-qup0";
		bcm_sh3 = "/soc/ad-hoc-bus/bcm-sh3";
		bcm_mm3 = "/soc/ad-hoc-bus/bcm-mm3";
		bcm_sh4 = "/soc/ad-hoc-bus/bcm-sh4";
		bcm_sn0 = "/soc/ad-hoc-bus/bcm-sn0";
		bcm_co0 = "/soc/ad-hoc-bus/bcm-co0";
		bcm_cn0 = "/soc/ad-hoc-bus/bcm-cn0";
		bcm_sn1 = "/soc/ad-hoc-bus/bcm-sn1";
		bcm_sn2 = "/soc/ad-hoc-bus/bcm-sn2";
		bcm_co2 = "/soc/ad-hoc-bus/bcm-co2";
		bcm_sn3 = "/soc/ad-hoc-bus/bcm-sn3";
		bcm_sn4 = "/soc/ad-hoc-bus/bcm-sn4";
		bcm_sn5 = "/soc/ad-hoc-bus/bcm-sn5";
		bcm_sn6 = "/soc/ad-hoc-bus/bcm-sn6";
		bcm_sn7 = "/soc/ad-hoc-bus/bcm-sn7";
		bcm_sn8 = "/soc/ad-hoc-bus/bcm-sn8";
		bcm_sn9 = "/soc/ad-hoc-bus/bcm-sn9";
		bcm_sn11 = "/soc/ad-hoc-bus/bcm-sn11";
		bcm_sn12 = "/soc/ad-hoc-bus/bcm-sn12";
		bcm_acv_display = "/soc/ad-hoc-bus/bcm-acv_display";
		bcm_alc_display = "/soc/ad-hoc-bus/bcm-alc_display";
		bcm_mc0_display = "/soc/ad-hoc-bus/bcm-mc0_display";
		bcm_sh0_display = "/soc/ad-hoc-bus/bcm-sh0_display";
		bcm_mm0_display = "/soc/ad-hoc-bus/bcm-mm0_display";
		bcm_mm1_display = "/soc/ad-hoc-bus/bcm-mm1_display";
		bcm_mm2_display = "/soc/ad-hoc-bus/bcm-mm2_display";
		fab_aggre1_noc = "/soc/ad-hoc-bus/fab-aggre1_noc";
		fab_aggre2_noc = "/soc/ad-hoc-bus/fab-aggre2_noc";
		fab_compute_noc = "/soc/ad-hoc-bus/fab-compute_noc";
		fab_config_noc = "/soc/ad-hoc-bus/fab-config_noc";
		fab_dc_noc = "/soc/ad-hoc-bus/fab-dc_noc";
		fab_gem_noc = "/soc/ad-hoc-bus/fab-gem_noc";
		fab_ipa_virt = "/soc/ad-hoc-bus/fab-ipa_virt";
		fab_mc_virt = "/soc/ad-hoc-bus/fab-mc_virt";
		fab_mmss_noc = "/soc/ad-hoc-bus/fab-mmss_noc";
		fab_npu_noc = "/soc/ad-hoc-bus/fab-npu_noc";
		fab_system_noc = "/soc/ad-hoc-bus/fab-system_noc";
		fab_gem_noc_display = "/soc/ad-hoc-bus/fab-gem_noc_display";
		fab_mc_virt_display = "/soc/ad-hoc-bus/fab-mc_virt_display";
		fab_mmss_noc_display = "/soc/ad-hoc-bus/fab-mmss_noc_display";
		mas_qhm_a1noc_cfg = "/soc/ad-hoc-bus/mas-qhm-a1noc-cfg";
		mas_qhm_qspi = "/soc/ad-hoc-bus/mas-qhm-qspi";
		mas_qhm_qup1 = "/soc/ad-hoc-bus/mas-qhm-qup1";
		mas_qhm_qup2 = "/soc/ad-hoc-bus/mas-qhm-qup2";
		mas_qhm_tsif = "/soc/ad-hoc-bus/mas-qhm-tsif";
		mas_xm_pcie3_modem = "/soc/ad-hoc-bus/mas-xm-pcie3-modem";
		mas_xm_sdc4 = "/soc/ad-hoc-bus/mas-xm-sdc4";
		mas_xm_ufs_mem = "/soc/ad-hoc-bus/mas-xm-ufs-mem";
		mas_xm_usb3_0 = "/soc/ad-hoc-bus/mas-xm-usb3-0";
		mas_xm_usb3_1 = "/soc/ad-hoc-bus/mas-xm-usb3-1";
		mas_qhm_a2noc_cfg = "/soc/ad-hoc-bus/mas-qhm-a2noc-cfg";
		mas_qhm_qdss_bam = "/soc/ad-hoc-bus/mas-qhm-qdss-bam";
		mas_qhm_qup0 = "/soc/ad-hoc-bus/mas-qhm-qup0";
		mas_qnm_cnoc = "/soc/ad-hoc-bus/mas-qnm-cnoc";
		mas_qxm_crypto = "/soc/ad-hoc-bus/mas-qxm-crypto";
		mas_qxm_ipa = "/soc/ad-hoc-bus/mas-qxm-ipa";
		mas_xm_pcie3_0 = "/soc/ad-hoc-bus/mas-xm-pcie3-0";
		mas_xm_pcie3_1 = "/soc/ad-hoc-bus/mas-xm-pcie3-1";
		mas_xm_qdss_etr = "/soc/ad-hoc-bus/mas-xm-qdss-etr";
		mas_xm_sdc2 = "/soc/ad-hoc-bus/mas-xm-sdc2";
		mas_xm_ufs_card = "/soc/ad-hoc-bus/mas-xm-ufs-card";
		mas_qnm_npu = "/soc/ad-hoc-bus/mas-qnm-npu";
		mas_qnm_snoc = "/soc/ad-hoc-bus/mas-qnm-snoc";
		mas_xm_qdss_dap = "/soc/ad-hoc-bus/mas-xm-qdss-dap";
		mas_qhm_cnoc_dc_noc = "/soc/ad-hoc-bus/mas-qhm-cnoc-dc-noc";
		mas_alm_gpu_tcu = "/soc/ad-hoc-bus/mas-alm-gpu-tcu";
		mas_alm_sys_tcu = "/soc/ad-hoc-bus/mas-alm-sys-tcu";
		mas_chm_apps = "/soc/ad-hoc-bus/mas-chm-apps";
		mas_qhm_gemnoc_cfg = "/soc/ad-hoc-bus/mas-qhm-gemnoc-cfg";
		mas_qnm_cmpnoc = "/soc/ad-hoc-bus/mas-qnm-cmpnoc";
		mas_qnm_gpu = "/soc/ad-hoc-bus/mas-qnm-gpu";
		mas_qnm_mnoc_hf = "/soc/ad-hoc-bus/mas-qnm-mnoc-hf";
		mas_qnm_mnoc_sf = "/soc/ad-hoc-bus/mas-qnm-mnoc-sf";
		mas_qnm_pcie = "/soc/ad-hoc-bus/mas-qnm-pcie";
		mas_qnm_snoc_gc = "/soc/ad-hoc-bus/mas-qnm-snoc-gc";
		mas_qnm_snoc_sf = "/soc/ad-hoc-bus/mas-qnm-snoc-sf";
		mas_ipa_core_master = "/soc/ad-hoc-bus/mas-ipa-core-master";
		mas_llcc_mc = "/soc/ad-hoc-bus/mas-llcc-mc";
		mas_qhm_mnoc_cfg = "/soc/ad-hoc-bus/mas-qhm-mnoc-cfg";
		mas_qnm_camnoc_hf = "/soc/ad-hoc-bus/mas-qnm-camnoc-hf";
		mas_qnm_camnoc_icp = "/soc/ad-hoc-bus/mas-qnm-camnoc-icp";
		mas_qnm_camnoc_sf = "/soc/ad-hoc-bus/mas-qnm-camnoc-sf";
		mas_qnm_video0 = "/soc/ad-hoc-bus/mas-qnm-video0";
		mas_qnm_video1 = "/soc/ad-hoc-bus/mas-qnm-video1";
		mas_qnm_video_cvp = "/soc/ad-hoc-bus/mas-qnm-video-cvp";
		mas_qxm_mdp0 = "/soc/ad-hoc-bus/mas-qxm-mdp0";
		mas_qxm_mdp1 = "/soc/ad-hoc-bus/mas-qxm-mdp1";
		mas_qxm_rot = "/soc/ad-hoc-bus/mas-qxm-rot";
		mas_amm_npu_sys = "/soc/ad-hoc-bus/mas-amm-npu-sys";
		mas_amm_npu_sys_cdp_w = "/soc/ad-hoc-bus/mas-amm-npu-sys-cdp-w";
		mas_qhm_cfg = "/soc/ad-hoc-bus/mas-qhm-cfg";
		mas_qhm_snoc_cfg = "/soc/ad-hoc-bus/mas-qhm-snoc-cfg";
		mas_qnm_aggre1_noc = "/soc/ad-hoc-bus/mas-qnm-aggre1-noc";
		mas_qnm_aggre2_noc = "/soc/ad-hoc-bus/mas-qnm-aggre2-noc";
		mas_qnm_gemnoc = "/soc/ad-hoc-bus/mas-qnm-gemnoc";
		mas_qnm_gemnoc_pcie = "/soc/ad-hoc-bus/mas-qnm-gemnoc-pcie";
		mas_qxm_pimem = "/soc/ad-hoc-bus/mas-qxm-pimem";
		mas_xm_gic = "/soc/ad-hoc-bus/mas-xm-gic";
		mas_alc = "/soc/ad-hoc-bus/mas-alc";
		mas_qnm_mnoc_hf_display = "/soc/ad-hoc-bus/mas-qnm-mnoc-hf_display";
		mas_qnm_mnoc_sf_display = "/soc/ad-hoc-bus/mas-qnm-mnoc-sf_display";
		mas_llcc_mc_display = "/soc/ad-hoc-bus/mas-llcc-mc_display";
		mas_qxm_mdp0_display = "/soc/ad-hoc-bus/mas-qxm-mdp0_display";
		mas_qxm_mdp1_display = "/soc/ad-hoc-bus/mas-qxm-mdp1_display";
		mas_qxm_rot_display = "/soc/ad-hoc-bus/mas-qxm-rot_display";
		slv_qns_a1noc_snoc = "/soc/ad-hoc-bus/slv-qns-a1noc-snoc";
		slv_qns_pcie_modem_mem_noc = "/soc/ad-hoc-bus/slv-qns-pcie-modem-mem-noc";
		slv_srvc_aggre1_noc = "/soc/ad-hoc-bus/slv-srvc-aggre1-noc";
		slv_qns_a2noc_snoc = "/soc/ad-hoc-bus/slv-qns-a2noc-snoc";
		slv_qns_pcie_mem_noc = "/soc/ad-hoc-bus/slv-qns-pcie-mem-noc";
		slv_srvc_aggre2_noc = "/soc/ad-hoc-bus/slv-srvc-aggre2-noc";
		slv_qns_cdsp_mem_noc = "/soc/ad-hoc-bus/slv-qns-cdsp-mem-noc";
		slv_qhs_a1_noc_cfg = "/soc/ad-hoc-bus/slv-qhs-a1-noc-cfg";
		slv_qhs_a2_noc_cfg = "/soc/ad-hoc-bus/slv-qhs-a2-noc-cfg";
		slv_qhs_ahb2phy0 = "/soc/ad-hoc-bus/slv-qhs-ahb2phy0";
		slv_qhs_ahb2phy1 = "/soc/ad-hoc-bus/slv-qhs-ahb2phy1";
		slv_qhs_aoss = "/soc/ad-hoc-bus/slv-qhs-aoss";
		slv_qhs_camera_cfg = "/soc/ad-hoc-bus/slv-qhs-camera-cfg";
		slv_qhs_clk_ctl = "/soc/ad-hoc-bus/slv-qhs-clk-ctl";
		slv_qhs_compute_dsp = "/soc/ad-hoc-bus/slv-qhs-compute-dsp";
		slv_qhs_cpr_cx = "/soc/ad-hoc-bus/slv-qhs-cpr-cx";
		slv_qhs_cpr_mmcx = "/soc/ad-hoc-bus/slv-qhs-cpr-mmcx";
		slv_qhs_cpr_mx = "/soc/ad-hoc-bus/slv-qhs-cpr-mx";
		slv_qhs_crypto0_cfg = "/soc/ad-hoc-bus/slv-qhs-crypto0-cfg";
		slv_qhs_cx_rdpm = "/soc/ad-hoc-bus/slv-qhs-cx-rdpm";
		slv_qhs_dcc_cfg = "/soc/ad-hoc-bus/slv-qhs-dcc-cfg";
		slv_qhs_ddrss_cfg = "/soc/ad-hoc-bus/slv-qhs-ddrss-cfg";
		slv_qhs_display_cfg = "/soc/ad-hoc-bus/slv-qhs-display-cfg";
		slv_qhs_gpuss_cfg = "/soc/ad-hoc-bus/slv-qhs-gpuss-cfg";
		slv_qhs_imem_cfg = "/soc/ad-hoc-bus/slv-qhs-imem-cfg";
		slv_qhs_ipa = "/soc/ad-hoc-bus/slv-qhs-ipa";
		slv_qhs_ipc_router = "/soc/ad-hoc-bus/slv-qhs-ipc-router";
		slv_qhs_lpass_cfg = "/soc/ad-hoc-bus/slv-qhs-lpass-cfg";
		slv_qhs_mnoc_cfg = "/soc/ad-hoc-bus/slv-qhs-mnoc-cfg";
		slv_qhs_npu_cfg = "/soc/ad-hoc-bus/slv-qhs-npu-cfg";
		slv_qhs_pcie0_cfg = "/soc/ad-hoc-bus/slv-qhs-pcie0-cfg";
		slv_qhs_pcie1_cfg = "/soc/ad-hoc-bus/slv-qhs-pcie1-cfg";
		slv_qhs_pcie_modem_cfg = "/soc/ad-hoc-bus/slv-qhs-pcie-modem-cfg";
		slv_qhs_pdm = "/soc/ad-hoc-bus/slv-qhs-pdm";
		slv_qhs_pimem_cfg = "/soc/ad-hoc-bus/slv-qhs-pimem-cfg";
		slv_qhs_prng = "/soc/ad-hoc-bus/slv-qhs-prng";
		slv_qhs_qdss_cfg = "/soc/ad-hoc-bus/slv-qhs-qdss-cfg";
		slv_qhs_qspi = "/soc/ad-hoc-bus/slv-qhs-qspi";
		slv_qhs_qup0 = "/soc/ad-hoc-bus/slv-qhs-qup0";
		slv_qhs_qup1 = "/soc/ad-hoc-bus/slv-qhs-qup1";
		slv_qhs_qup2 = "/soc/ad-hoc-bus/slv-qhs-qup2";
		slv_qhs_sdc2 = "/soc/ad-hoc-bus/slv-qhs-sdc2";
		slv_qhs_sdc4 = "/soc/ad-hoc-bus/slv-qhs-sdc4";
		slv_qhs_snoc_cfg = "/soc/ad-hoc-bus/slv-qhs-snoc-cfg";
		slv_qhs_tcsr = "/soc/ad-hoc-bus/slv-qhs-tcsr";
		slv_qhs_tlmm0 = "/soc/ad-hoc-bus/slv-qhs-tlmm0";
		slv_qhs_tlmm1 = "/soc/ad-hoc-bus/slv-qhs-tlmm1";
		slv_qhs_tlmm2 = "/soc/ad-hoc-bus/slv-qhs-tlmm2";
		slv_qhs_tsif = "/soc/ad-hoc-bus/slv-qhs-tsif";
		slv_qhs_ufs_card_cfg = "/soc/ad-hoc-bus/slv-qhs-ufs-card-cfg";
		slv_qhs_ufs_mem_cfg = "/soc/ad-hoc-bus/slv-qhs-ufs-mem-cfg";
		slv_qhs_usb3_0 = "/soc/ad-hoc-bus/slv-qhs-usb3-0";
		slv_qhs_usb3_1 = "/soc/ad-hoc-bus/slv-qhs-usb3-1";
		slv_qhs_venus_cfg = "/soc/ad-hoc-bus/slv-qhs-venus-cfg";
		slv_qhs_vsense_ctrl_cfg = "/soc/ad-hoc-bus/slv-qhs-vsense-ctrl-cfg";
		slv_qns_cnoc_a2noc = "/soc/ad-hoc-bus/slv-qns-cnoc-a2noc";
		slv_srvc_cnoc = "/soc/ad-hoc-bus/slv-srvc-cnoc";
		slv_qhs_llcc = "/soc/ad-hoc-bus/slv-qhs-llcc";
		slv_qhs_memnoc = "/soc/ad-hoc-bus/slv-qhs-memnoc";
		slv_qns_gem_noc_snoc = "/soc/ad-hoc-bus/slv-qns-gem-noc-snoc";
		slv_qns_llcc = "/soc/ad-hoc-bus/slv-qns-llcc";
		slv_qns_sys_pcie = "/soc/ad-hoc-bus/slv-qns-sys-pcie";
		slv_srvc_even_gemnoc = "/soc/ad-hoc-bus/slv-srvc-even-gemnoc";
		slv_srvc_odd_gemnoc = "/soc/ad-hoc-bus/slv-srvc-odd-gemnoc";
		slv_srvc_sys_gemnoc = "/soc/ad-hoc-bus/slv-srvc-sys-gemnoc";
		slv_ipa_core_slave = "/soc/ad-hoc-bus/slv-ipa-core-slave";
		slv_ebi = "/soc/ad-hoc-bus/slv-ebi";
		slv_qns_mem_noc_hf = "/soc/ad-hoc-bus/slv-qns-mem-noc-hf";
		slv_qns_mem_noc_sf = "/soc/ad-hoc-bus/slv-qns-mem-noc-sf";
		slv_srvc_mnoc = "/soc/ad-hoc-bus/slv-srvc-mnoc";
		slv_qhs_cal_dp0 = "/soc/ad-hoc-bus/slv-qhs-cal-dp0";
		slv_qhs_cal_dp1 = "/soc/ad-hoc-bus/slv-qhs-cal-dp1";
		slv_qhs_cp = "/soc/ad-hoc-bus/slv-qhs-cp";
		slv_qhs_dma_bwmon = "/soc/ad-hoc-bus/slv-qhs-dma-bwmon";
		slv_qhs_dpm = "/soc/ad-hoc-bus/slv-qhs-dpm";
		slv_qhs_isense = "/soc/ad-hoc-bus/slv-qhs-isense";
		slv_qhs_llm = "/soc/ad-hoc-bus/slv-qhs-llm";
		slv_qhs_tcm = "/soc/ad-hoc-bus/slv-qhs-tcm";
		slv_qns_npu_sys = "/soc/ad-hoc-bus/slv-qns-npu-sys";
		slv_srvc_noc = "/soc/ad-hoc-bus/slv-srvc-noc";
		slv_qhs_apss = "/soc/ad-hoc-bus/slv-qhs-apss";
		slv_qns_cnoc = "/soc/ad-hoc-bus/slv-qns-cnoc";
		slv_qns_gemnoc_gc = "/soc/ad-hoc-bus/slv-qns-gemnoc-gc";
		slv_qns_gemnoc_sf = "/soc/ad-hoc-bus/slv-qns-gemnoc-sf";
		slv_qxs_imem = "/soc/ad-hoc-bus/slv-qxs-imem";
		slv_qxs_pimem = "/soc/ad-hoc-bus/slv-qxs-pimem";
		slv_srvc_snoc = "/soc/ad-hoc-bus/slv-srvc-snoc";
		slv_xs_pcie_0 = "/soc/ad-hoc-bus/slv-xs-pcie-0";
		slv_xs_pcie_1 = "/soc/ad-hoc-bus/slv-xs-pcie-1";
		slv_xs_pcie_modem = "/soc/ad-hoc-bus/slv-xs-pcie-modem";
		slv_xs_qdss_stm = "/soc/ad-hoc-bus/slv-xs-qdss-stm";
		slv_xs_sys_tcu_cfg = "/soc/ad-hoc-bus/slv-xs-sys-tcu-cfg";
		slv_qns_llcc_display = "/soc/ad-hoc-bus/slv-qns-llcc_display";
		slv_ebi_display = "/soc/ad-hoc-bus/slv-ebi_display";
		slv_qns_mem_noc_hf_display = "/soc/ad-hoc-bus/slv-qns-mem-noc-hf_display";
		slv_qns_mem_noc_sf_display = "/soc/ad-hoc-bus/slv-qns-mem-noc-sf_display";
		system_heap = "/soc/qcom,ion/qcom,ion-heap@25";
		adsp_heap = "/soc/qcom,ion/qcom,ion-heap@22";
		system_secure_heap = "/soc/qcom,ion/qcom,ion-heap@9";
		pcie0 = "/soc/qcom,pcie@1c00000";
		pcie0_rp = "/soc/qcom,pcie@1c00000/pcie0_rp";
		cnss_pci = "/soc/qcom,pcie@1c00000/pcie0_rp/cnss_pci";
		cnss_pci_iommu_group = "/soc/qcom,pcie@1c00000/pcie0_rp/cnss_pci/cnss_pci_iommu_group";
		pcie0_msi = "/soc/qcom,pcie0_msi@17a10040";
		kgsl_smmu = "/soc/kgsl-smmu@3da0000";
		gfx_0_tbu = "/soc/kgsl-smmu@3da0000/gfx_0_tbu@3dc5000";
		gfx_1_tbu = "/soc/kgsl-smmu@3da0000/gfx_1_tbu@3dc9000";
		apps_smmu = "/soc/apps-smmu@15000000";
		anoc_1_tbu = "/soc/apps-smmu@15000000/anoc_1_tbu@15185000";
		anoc_2_tbu = "/soc/apps-smmu@15000000/anoc_2_tbu@15189000";
		mnoc_hf_0_tbu = "/soc/apps-smmu@15000000/mnoc_hf_0_tbu@1518d000";
		mnoc_hf_1_tbu = "/soc/apps-smmu@15000000/mnoc_hf_1_tbu@15191000";
		compute_dsp_1_tbu = "/soc/apps-smmu@15000000/compute_dsp_1_tbu@15195000";
		compute_dsp_0_tbu = "/soc/apps-smmu@15000000/compute_dsp_0_tbu@15199000";
		adsp_tbu = "/soc/apps-smmu@15000000/adsp_tbu@1519d000";
		anoc_1_pcie_tbu = "/soc/apps-smmu@15000000/anoc_1_pcie_tbu@151a1000";
		mnoc_sf_0_tbu = "/soc/apps-smmu@15000000/mnoc_sf_0_tbu@151a5000";
		mnoc_sf_1_tbu = "/soc/apps-smmu@15000000/mnoc_sf_1_tbu@151a9000";
		tlmm = "/soc/pinctrl@f000000";
		trigout_a = "/soc/pinctrl@f000000/trigout_a";
		qupv3_se2_2uart_pins = "/soc/pinctrl@f000000/qupv3_se2_2uart_pins";
		qupv3_se2_2uart_active = "/soc/pinctrl@f000000/qupv3_se2_2uart_pins/qupv3_se2_2uart_active";
		qupv3_se2_2uart_sleep = "/soc/pinctrl@f000000/qupv3_se2_2uart_pins/qupv3_se2_2uart_sleep";
		qupv3_se3_2uart_pins = "/soc/pinctrl@f000000/qupv3_se3_2uart_pins";
		qupv3_se3_2uart_active = "/soc/pinctrl@f000000/qupv3_se3_2uart_pins/qupv3_se3_2uart_active";
		qupv3_se3_2uart_sleep_tx = "/soc/pinctrl@f000000/qupv3_se3_2uart_pins/qupv3_se3_2uart_sleep_tx";
		qupv3_se3_2uart_sleep_rx = "/soc/pinctrl@f000000/qupv3_se3_2uart_pins/qupv3_se3_2uart_sleep_rx";
		qupv3_se5_2uart_pins = "/soc/pinctrl@f000000/qupv3_se5_2uart_pins";
		qupv3_se5_tx = "/soc/pinctrl@f000000/qupv3_se5_2uart_pins/qupv3_se5_tx";
		qupv3_se5_rx = "/soc/pinctrl@f000000/qupv3_se5_2uart_pins/qupv3_se5_rx";
		blu_uart_active = "/soc/pinctrl@f000000/blu_uart_active";
		blu_uart_sleep_tx = "/soc/pinctrl@f000000/blu_uart_sleep_tx";
		blu_uart_sleep_rx = "/soc/pinctrl@f000000/blu_uart_sleep_rx";
		qupv3_se6_4uart_pins = "/soc/pinctrl@f000000/qupv3_se6_4uart_pins";
		qupv3_se6_default_cts = "/soc/pinctrl@f000000/qupv3_se6_4uart_pins/qupv3_se6_default_cts";
		qupv3_se6_default_rtsrx = "/soc/pinctrl@f000000/qupv3_se6_4uart_pins/qupv3_se6_default_rtsrx";
		qupv3_se6_default_tx = "/soc/pinctrl@f000000/qupv3_se6_4uart_pins/qupv3_se6_default_tx";
		qupv3_se6_ctsrx = "/soc/pinctrl@f000000/qupv3_se6_4uart_pins/qupv3_se6_ctsrx";
		qupv3_se6_rts = "/soc/pinctrl@f000000/qupv3_se6_4uart_pins/qupv3_se6_rts";
		qupv3_se6_tx = "/soc/pinctrl@f000000/qupv3_se6_4uart_pins/qupv3_se6_tx";
		qupv3_se12_2uart_pins = "/soc/pinctrl@f000000/qupv3_se12_2uart_pins";
		qupv3_se12_2uart_active = "/soc/pinctrl@f000000/qupv3_se12_2uart_pins/qupv3_se12_2uart_active";
		qupv3_se12_2uart_sleep = "/soc/pinctrl@f000000/qupv3_se12_2uart_pins/qupv3_se12_2uart_sleep";
		qupv3_se13_2uart_pins = "/soc/pinctrl@f000000/qupv3_se13_2uart_pins";
		qupv3_se13_2uart_active = "/soc/pinctrl@f000000/qupv3_se13_2uart_pins/qupv3_se13_2uart_active";
		qupv3_se13_2uart_tx = "/soc/pinctrl@f000000/qupv3_se13_2uart_pins/qupv3_se13_2uart_tx";
		qupv3_se13_2uart_rx = "/soc/pinctrl@f000000/qupv3_se13_2uart_pins/qupv3_se13_2uart_rx";
		qupv3_se17_4uart_pins = "/soc/pinctrl@f000000/qupv3_se17_4uart_pins";
		qupv3_se17_ctsrx = "/soc/pinctrl@f000000/qupv3_se17_4uart_pins/qupv3_se17_ctsrx";
		qupv3_se17_rts = "/soc/pinctrl@f000000/qupv3_se17_4uart_pins/qupv3_se17_rts";
		qupv3_se17_tx = "/soc/pinctrl@f000000/qupv3_se17_4uart_pins/qupv3_se17_tx";
		qupv3_se18_2uart_pins = "/soc/pinctrl@f000000/qupv3_se18_2uart_pins";
		qupv3_se18_rx = "/soc/pinctrl@f000000/qupv3_se18_2uart_pins/qupv3_se18_rx";
		qupv3_se18_tx = "/soc/pinctrl@f000000/qupv3_se18_2uart_pins/qupv3_se18_tx";
		ts_active = "/soc/pinctrl@f000000/pmx_ts_active/ts_active";
		ts_int_suspend = "/soc/pinctrl@f000000/pmx_ts_int_suspend/ts_int_suspend";
		ts_reset_suspend = "/soc/pinctrl@f000000/pmx_ts_reset_suspend/ts_reset_suspend";
		pmx_ts_release = "/soc/pinctrl@f000000/pmx_ts_release/pmx_ts_release";
		ufs_dev_reset_assert = "/soc/pinctrl@f000000/ufs_dev_reset_assert";
		ufs_dev_reset_deassert = "/soc/pinctrl@f000000/ufs_dev_reset_deassert";
		storage_cd = "/soc/pinctrl@f000000/storage_cd";
		sdc2_clk_on = "/soc/pinctrl@f000000/sdc2_clk_on";
		sdc2_clk_off = "/soc/pinctrl@f000000/sdc2_clk_off";
		sdc2_clk_ds_400KHz = "/soc/pinctrl@f000000/sdc2_clk_ds_400KHz";
		sdc2_clk_ds_50MHz = "/soc/pinctrl@f000000/sdc2_clk_ds_50MHz";
		sdc2_clk_ds_100MHz = "/soc/pinctrl@f000000/sdc2_clk_ds_100MHz";
		sdc2_clk_ds_200MHz = "/soc/pinctrl@f000000/sdc2_clk_ds_200MHz";
		sdc2_cmd_on = "/soc/pinctrl@f000000/sdc2_cmd_on";
		sdc2_cmd_off = "/soc/pinctrl@f000000/sdc2_cmd_off";
		sdc2_cmd_ds_400KHz = "/soc/pinctrl@f000000/sdc2_cmd_ds_400KHz";
		sdc2_cmd_ds_50MHz = "/soc/pinctrl@f000000/sdc2_cmd_ds_50MHz";
		sdc2_cmd_ds_100MHz = "/soc/pinctrl@f000000/sdc2_cmd_ds_100MHz";
		sdc2_cmd_ds_200MHz = "/soc/pinctrl@f000000/sdc2_cmd_ds_200MHz";
		sdc2_data_on = "/soc/pinctrl@f000000/sdc2_data_on";
		sdc2_data_off = "/soc/pinctrl@f000000/sdc2_data_off";
		sdc2_data_ds_400KHz = "/soc/pinctrl@f000000/sdc2_data_ds_400KHz";
		sdc2_data_ds_50MHz = "/soc/pinctrl@f000000/sdc2_data_ds_50MHz";
		sdc2_data_ds_100MHz = "/soc/pinctrl@f000000/sdc2_data_ds_100MHz";
		sdc2_data_ds_200MHz = "/soc/pinctrl@f000000/sdc2_data_ds_200MHz";
		sde_dp_usbplug_cc_active = "/soc/pinctrl@f000000/sde_dp_usbplug_cc_active";
		sde_dp_usbplug_cc_suspend = "/soc/pinctrl@f000000/sde_dp_usbplug_cc_suspend";
		pcie0_perst_default = "/soc/pinctrl@f000000/pcie0/pcie0_perst_default";
		pcie0_clkreq_default = "/soc/pinctrl@f000000/pcie0/pcie0_clkreq_default";
		pcie0_wake_default = "/soc/pinctrl@f000000/pcie0/pcie0_wake_default";
		pcie0_clkreq_sleep = "/soc/pinctrl@f000000/pcie0/pcie0_clkreq_sleep";
		cnss_wlan_en_active = "/soc/pinctrl@f000000/cnss_pins/cnss_wlan_en_active";
		cnss_wlan_en_sleep = "/soc/pinctrl@f000000/cnss_pins/cnss_wlan_en_sleep";
		pmx_sde = "/soc/pinctrl@f000000/pmx_sde";
		sde_dsi_active = "/soc/pinctrl@f000000/pmx_sde/sde_dsi_active";
		sde_dsi_suspend = "/soc/pinctrl@f000000/pmx_sde/sde_dsi_suspend";
		sde_dsi1_active = "/soc/pinctrl@f000000/pmx_sde/sde_dsi1_active";
		sde_dsi1_suspend = "/soc/pinctrl@f000000/pmx_sde/sde_dsi1_suspend";
		sde_te_active = "/soc/pinctrl@f000000/pmx_sde_te/sde_te_active";
		sde_te_suspend = "/soc/pinctrl@f000000/pmx_sde_te/sde_te_suspend";
		sde_te1_active = "/soc/pinctrl@f000000/pmx_sde_te/sde_te1_active";
		sde_te1_suspend = "/soc/pinctrl@f000000/pmx_sde_te/sde_te1_suspend";
		pri_aux_pcm_clk_sleep = "/soc/pinctrl@f000000/pri_aux_pcm_clk/pri_aux_pcm_clk_sleep";
		pri_aux_pcm_clk_active = "/soc/pinctrl@f000000/pri_aux_pcm_clk/pri_aux_pcm_clk_active";
		pri_aux_pcm_sync_sleep = "/soc/pinctrl@f000000/pri_aux_pcm_sync/pri_aux_pcm_sync_sleep";
		pri_aux_pcm_sync_active = "/soc/pinctrl@f000000/pri_aux_pcm_sync/pri_aux_pcm_sync_active";
		pri_aux_pcm_din_sleep = "/soc/pinctrl@f000000/pri_aux_pcm_din/pri_aux_pcm_din_sleep";
		pri_aux_pcm_din_active = "/soc/pinctrl@f000000/pri_aux_pcm_din/pri_aux_pcm_din_active";
		pri_aux_pcm_dout_sleep = "/soc/pinctrl@f000000/pri_aux_pcm_dout/pri_aux_pcm_dout_sleep";
		pri_aux_pcm_dout_active = "/soc/pinctrl@f000000/pri_aux_pcm_dout/pri_aux_pcm_dout_active";
		sec_aux_pcm_clk_sleep = "/soc/pinctrl@f000000/sec_aux_pcm/sec_aux_pcm_clk_sleep";
		sec_aux_pcm_clk_active = "/soc/pinctrl@f000000/sec_aux_pcm/sec_aux_pcm_clk_active";
		sec_aux_pcm_ws_sleep = "/soc/pinctrl@f000000/sec_aux_pcm/sec_aux_pcm_ws_sleep";
		sec_aux_pcm_ws_active = "/soc/pinctrl@f000000/sec_aux_pcm/sec_aux_pcm_ws_active";
		sec_aux_pcm_din_sleep = "/soc/pinctrl@f000000/sec_aux_pcm_din/sec_aux_pcm_din_sleep";
		sec_aux_pcm_din_active = "/soc/pinctrl@f000000/sec_aux_pcm_din/sec_aux_pcm_din_active";
		sec_aux_pcm_dout_sleep = "/soc/pinctrl@f000000/sec_aux_pcm_dout/sec_aux_pcm_dout_sleep";
		sec_aux_pcm_dout_active = "/soc/pinctrl@f000000/sec_aux_pcm_dout/sec_aux_pcm_dout_active";
		tert_aux_pcm_clk_sleep = "/soc/pinctrl@f000000/tert_aux_pcm/tert_aux_pcm_clk_sleep";
		tert_aux_pcm_clk_active = "/soc/pinctrl@f000000/tert_aux_pcm/tert_aux_pcm_clk_active";
		tert_aux_pcm_ws_sleep = "/soc/pinctrl@f000000/tert_aux_pcm/tert_aux_pcm_ws_sleep";
		tert_aux_pcm_ws_active = "/soc/pinctrl@f000000/tert_aux_pcm/tert_aux_pcm_ws_active";
		tert_aux_pcm_din_sleep = "/soc/pinctrl@f000000/tert_aux_pcm_din/tert_aux_pcm_din_sleep";
		tert_aux_pcm_din_active = "/soc/pinctrl@f000000/tert_aux_pcm_din/tert_aux_pcm_din_active";
		tert_aux_pcm_dout_sleep = "/soc/pinctrl@f000000/tert_aux_pcm_dout/tert_aux_pcm_dout_sleep";
		tert_aux_pcm_dout_active = "/soc/pinctrl@f000000/tert_aux_pcm_dout/tert_aux_pcm_dout_active";
		pri_tdm_clk_sleep = "/soc/pinctrl@f000000/pri_tdm_clk/pri_tdm_clk_sleep";
		pri_tdm_clk_active = "/soc/pinctrl@f000000/pri_tdm_clk/pri_tdm_clk_active";
		pri_tdm_sync_sleep = "/soc/pinctrl@f000000/pri_tdm_sync/pri_tdm_sync_sleep";
		pri_tdm_sync_active = "/soc/pinctrl@f000000/pri_tdm_sync/pri_tdm_sync_active";
		pri_tdm_din_sleep = "/soc/pinctrl@f000000/pri_tdm_din/pri_tdm_din_sleep";
		pri_tdm_din_active = "/soc/pinctrl@f000000/pri_tdm_din/pri_tdm_din_active";
		pri_tdm_dout_sleep = "/soc/pinctrl@f000000/pri_tdm_dout/pri_tdm_dout_sleep";
		pri_tdm_dout_active = "/soc/pinctrl@f000000/pri_tdm_dout/pri_tdm_dout_active";
		sec_tdm_sck_sleep = "/soc/pinctrl@f000000/sec_tdm/sec_tdm_sck_sleep";
		sec_tdm_sck_active = "/soc/pinctrl@f000000/sec_tdm/sec_tdm_sck_active";
		sec_tdm_ws_sleep = "/soc/pinctrl@f000000/sec_tdm/sec_tdm_ws_sleep";
		sec_tdm_ws_active = "/soc/pinctrl@f000000/sec_tdm/sec_tdm_ws_active";
		sec_tdm_din_sleep = "/soc/pinctrl@f000000/sec_tdm_din/sec_tdm_din_sleep";
		sec_tdm_din_active = "/soc/pinctrl@f000000/sec_tdm_din/sec_tdm_din_active";
		sec_tdm_dout_sleep = "/soc/pinctrl@f000000/sec_tdm_dout/sec_tdm_dout_sleep";
		sec_tdm_dout_active = "/soc/pinctrl@f000000/sec_tdm_dout/sec_tdm_dout_active";
		tert_tdm_clk_sleep = "/soc/pinctrl@f000000/tert_tdm/tert_tdm_clk_sleep";
		tert_tdm_clk_active = "/soc/pinctrl@f000000/tert_tdm/tert_tdm_clk_active";
		tert_tdm_ws_sleep = "/soc/pinctrl@f000000/tert_tdm/tert_tdm_ws_sleep";
		tert_tdm_ws_active = "/soc/pinctrl@f000000/tert_tdm/tert_tdm_ws_active";
		tert_tdm_din_sleep = "/soc/pinctrl@f000000/tert_tdm_din/tert_tdm_din_sleep";
		tert_tdm_din_active = "/soc/pinctrl@f000000/tert_tdm_din/tert_tdm_din_active";
		tert_tdm_dout_sleep = "/soc/pinctrl@f000000/tert_tdm_dout/tert_tdm_dout_sleep";
		tert_tdm_dout_active = "/soc/pinctrl@f000000/tert_tdm_dout/tert_tdm_dout_active";
		pri_mi2s_mclk_sleep = "/soc/pinctrl@f000000/pri_mi2s_mclk/pri_mi2s_mclk_sleep";
		pri_mi2s_mclk_active = "/soc/pinctrl@f000000/pri_mi2s_mclk/pri_mi2s_mclk_active";
		pri_mi2s_sck_sleep = "/soc/pinctrl@f000000/pri_mi2s_sck/pri_mi2s_sck_sleep";
		pri_mi2s_sck_active = "/soc/pinctrl@f000000/pri_mi2s_sck/pri_mi2s_sck_active";
		pri_mi2s_ws_sleep = "/soc/pinctrl@f000000/pri_mi2s_ws/pri_mi2s_ws_sleep";
		pri_mi2s_ws_active = "/soc/pinctrl@f000000/pri_mi2s_ws/pri_mi2s_ws_active";
		pri_mi2s_sd0_sleep = "/soc/pinctrl@f000000/pri_mi2s_sd0/pri_mi2s_sd0_sleep";
		pri_mi2s_sd0_active = "/soc/pinctrl@f000000/pri_mi2s_sd0/pri_mi2s_sd0_active";
		pri_mi2s_sd1_sleep = "/soc/pinctrl@f000000/pri_mi2s_sd1/pri_mi2s_sd1_sleep";
		pri_mi2s_sd1_active = "/soc/pinctrl@f000000/pri_mi2s_sd1/pri_mi2s_sd1_active";
		sec_mi2s_mclk_sleep = "/soc/pinctrl@f000000/sec_mi2s_mclk/sec_mi2s_mclk_sleep";
		sec_mi2s_mclk_active = "/soc/pinctrl@f000000/sec_mi2s_mclk/sec_mi2s_mclk_active";
		sec_mi2s_sck_sleep = "/soc/pinctrl@f000000/sec_mi2s_sck/sec_mi2s_sck_sleep";
		sec_mi2s_sck_active = "/soc/pinctrl@f000000/sec_mi2s_sck/sec_mi2s_sck_active";
		sec_mi2s_ws_sleep = "/soc/pinctrl@f000000/sec_mi2s_ws/sec_mi2s_ws_sleep";
		sec_mi2s_ws_active = "/soc/pinctrl@f000000/sec_mi2s_ws/sec_mi2s_ws_active";
		sec_mi2s_sd0_sleep = "/soc/pinctrl@f000000/sec_mi2s_sd0/sec_mi2s_sd0_sleep";
		sec_mi2s_sd0_active = "/soc/pinctrl@f000000/sec_mi2s_sd0/sec_mi2s_sd0_active";
		sec_mi2s_sd1_sleep = "/soc/pinctrl@f000000/sec_mi2s_sd1/sec_mi2s_sd1_sleep";
		sec_mi2s_sd1_active = "/soc/pinctrl@f000000/sec_mi2s_sd1/sec_mi2s_sd1_active";
		tert_mi2s_sck_sleep = "/soc/pinctrl@f000000/tert_mi2s_sck/tert_mi2s_sck_sleep";
		tert_mi2s_sck_active = "/soc/pinctrl@f000000/tert_mi2s_sck/tert_mi2s_sck_active";
		tert_mi2s_ws_sleep = "/soc/pinctrl@f000000/tert_mi2s_ws/tert_mi2s_ws_sleep";
		tert_mi2s_ws_active = "/soc/pinctrl@f000000/tert_mi2s_ws/tert_mi2s_ws_active";
		tert_mi2s_sd0_sleep = "/soc/pinctrl@f000000/tert_mi2s_sd0/tert_mi2s_sd0_sleep";
		tert_mi2s_sd0_active = "/soc/pinctrl@f000000/tert_mi2s_sd0/tert_mi2s_sd0_active";
		tert_mi2s_sd1_sleep = "/soc/pinctrl@f000000/tert_mi2s_sd1/tert_mi2s_sd1_sleep";
		tert_mi2s_sd1_active = "/soc/pinctrl@f000000/tert_mi2s_sd1/tert_mi2s_sd1_active";
		spkr_1_sd_n_sleep = "/soc/pinctrl@f000000/spkr_1_sd_n/spkr_1_sd_n_sleep";
		spkr_1_sd_n_active = "/soc/pinctrl@f000000/spkr_1_sd_n/spkr_1_sd_n_active";
		spkr_2_sd_n_sleep = "/soc/pinctrl@f000000/spkr_2_sd_n/spkr_2_sd_n_sleep";
		spkr_2_sd_n_active = "/soc/pinctrl@f000000/spkr_2_sd_n/spkr_2_sd_n_active";
		wcd938x_reset_active = "/soc/pinctrl@f000000/wcd938x_reset_active";
		wcd938x_reset_sleep = "/soc/pinctrl@f000000/wcd938x_reset_sleep";
		cam_sensor_mclk0_active = "/soc/pinctrl@f000000/cam_sensor_mclk0_active";
		cam_sensor_mclk0_suspend = "/soc/pinctrl@f000000/cam_sensor_mclk0_suspend";
		cam_sensor_mclk1_active = "/soc/pinctrl@f000000/cam_sensor_mclk1_active";
		cam_sensor_mclk1_suspend = "/soc/pinctrl@f000000/cam_sensor_mclk1_suspend";
		cam_sensor_mclk2_active = "/soc/pinctrl@f000000/cam_sensor_mclk2_active";
		cam_sensor_mclk2_suspend = "/soc/pinctrl@f000000/cam_sensor_mclk2_suspend";
		cam_sensor_mclk3_active = "/soc/pinctrl@f000000/cam_sensor_mclk3_active";
		cam_sensor_mclk3_suspend = "/soc/pinctrl@f000000/cam_sensor_mclk3_suspend";
		cam_sensor_mclk4_active = "/soc/pinctrl@f000000/cam_sensor_mclk4_active";
		cam_sensor_mclk4_suspend = "/soc/pinctrl@f000000/cam_sensor_mclk4_suspend";
		cam_sensor_mclk5_active = "/soc/pinctrl@f000000/cam_sensor_mclk5_active";
		cam_sensor_mclk5_suspend = "/soc/pinctrl@f000000/cam_sensor_mclk5_suspend";
		cam_sensor_mclk6_active = "/soc/pinctrl@f000000/cam_sensor_mclk6_active";
		cam_sensor_mclk6_suspend = "/soc/pinctrl@f000000/cam_sensor_mclk6_suspend";
		cam_sensor_active_rst4 = "/soc/pinctrl@f000000/cam_sensor_active_rst4";
		cam_sensor_suspend_rst4 = "/soc/pinctrl@f000000/cam_sensor_suspend_rst4";
		cam_sensor_active_rst3 = "/soc/pinctrl@f000000/cam_sensor_active_rst3";
		cam_sensor_suspend_rst3 = "/soc/pinctrl@f000000/cam_sensor_suspend_rst3";
		cci0_active = "/soc/pinctrl@f000000/cci0_active";
		cci0_suspend = "/soc/pinctrl@f000000/cci0_suspend";
		cci1_active = "/soc/pinctrl@f000000/cci1_active";
		cci1_suspend = "/soc/pinctrl@f000000/cci1_suspend";
		cci2_active = "/soc/pinctrl@f000000/cci2_active";
		cci2_suspend = "/soc/pinctrl@f000000/cci2_suspend";
		cci3_active = "/soc/pinctrl@f000000/cci3_active";
		cci3_suspend = "/soc/pinctrl@f000000/cci3_suspend";
		sde_led_driver_en1_gpio = "/soc/pinctrl@f000000/sde_led_driver_en1_gpio";
		sde_led_driver_en2_gpio = "/soc/pinctrl@f000000/sde_led_driver_en2_gpio";
		sde_led_5v_en_gpio = "/soc/pinctrl@f000000/sde_led_5v_en_gpio";
		sde_display_1p8_en_gpio = "/soc/pinctrl@f000000/sde_display_1p8_en_gpio";
		bt_en_sleep = "/soc/pinctrl@f000000/bt_en_sleep";
		qupv3_se0_i2c_pins = "/soc/pinctrl@f000000/qupv3_se0_i2c_pins";
		qupv3_se0_i2c_active = "/soc/pinctrl@f000000/qupv3_se0_i2c_pins/qupv3_se0_i2c_active";
		qupv3_se0_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se0_i2c_pins/qupv3_se0_i2c_sleep";
		qupv3_se1_i2c_pins = "/soc/pinctrl@f000000/qupv3_se1_i2c_pins";
		qupv3_se1_i2c_active = "/soc/pinctrl@f000000/qupv3_se1_i2c_pins/qupv3_se1_i2c_active";
		qupv3_se1_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se1_i2c_pins/qupv3_se1_i2c_sleep";
		lt9611_pins = "/soc/pinctrl@f000000/lt9611_pins";
		nfc_int_active = "/soc/pinctrl@f000000/nfc/nfc_int_active";
		nfc_int_suspend = "/soc/pinctrl@f000000/nfc/nfc_int_suspend";
		nfc_enable_active = "/soc/pinctrl@f000000/nfc/nfc_enable_active";
		nfc_enable_suspend = "/soc/pinctrl@f000000/nfc/nfc_enable_suspend";
		nfc_clk_req_active = "/soc/pinctrl@f000000/nfc/nfc_clk_req_active";
		nfc_clk_req_suspend = "/soc/pinctrl@f000000/nfc/nfc_clk_req_suspend";
		qupv3_se2_i2c_pins = "/soc/pinctrl@f000000/qupv3_se2_i2c_pins";
		qupv3_se2_i2c_active = "/soc/pinctrl@f000000/qupv3_se2_i2c_pins/qupv3_se2_i2c_active";
		qupv3_se2_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se2_i2c_pins/qupv3_se2_i2c_sleep";
		qupv3_se3_i2c_pins = "/soc/pinctrl@f000000/qupv3_se3_i2c_pins";
		qupv3_se3_i2c_active = "/soc/pinctrl@f000000/qupv3_se3_i2c_pins/qupv3_se3_i2c_active";
		qupv3_se3_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se3_i2c_pins/qupv3_se3_i2c_sleep";
		qupv3_se4_i2c_pins = "/soc/pinctrl@f000000/qupv3_se4_i2c_pins";
		qupv3_se4_i2c_active = "/soc/pinctrl@f000000/qupv3_se4_i2c_pins/qupv3_se4_i2c_active";
		qupv3_se4_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se4_i2c_pins/qupv3_se4_i2c_sleep";
		qupv3_se5_i2c_pins = "/soc/pinctrl@f000000/qupv3_se5_i2c_pins";
		qupv3_se5_i2c_active = "/soc/pinctrl@f000000/qupv3_se5_i2c_pins/qupv3_se5_i2c_active";
		qupv3_se5_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se5_i2c_pins/qupv3_se5_i2c_sleep";
		qupv3_se6_i2c_pins = "/soc/pinctrl@f000000/qupv3_se6_i2c_pins";
		qupv3_se6_i2c_active = "/soc/pinctrl@f000000/qupv3_se6_i2c_pins/qupv3_se6_i2c_active";
		qupv3_se6_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se6_i2c_pins/qupv3_se6_i2c_sleep";
		qupv3_se7_i2c_pins = "/soc/pinctrl@f000000/qupv3_se7_i2c_pins";
		qupv3_se7_i2c_active = "/soc/pinctrl@f000000/qupv3_se7_i2c_pins/qupv3_se7_i2c_active";
		qupv3_se7_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se7_i2c_pins/qupv3_se7_i2c_sleep";
		qupv3_se0_spi_pins = "/soc/pinctrl@f000000/qupv3_se0_spi_pins";
		qupv3_se0_spi_active = "/soc/pinctrl@f000000/qupv3_se0_spi_pins/qupv3_se0_spi_active";
		qupv3_se0_spi_sleep = "/soc/pinctrl@f000000/qupv3_se0_spi_pins/qupv3_se0_spi_sleep";
		qupv3_se1_spi_pins = "/soc/pinctrl@f000000/qupv3_se1_spi_pins";
		qupv3_se1_spi_active = "/soc/pinctrl@f000000/qupv3_se1_spi_pins/qupv3_se1_spi_active";
		qupv3_se1_spi_sleep = "/soc/pinctrl@f000000/qupv3_se1_spi_pins/qupv3_se1_spi_sleep";
		qupv3_se2_spi_pins = "/soc/pinctrl@f000000/qupv3_se2_spi_pins";
		qupv3_se2_spi_active = "/soc/pinctrl@f000000/qupv3_se2_spi_pins/qupv3_se2_spi_active";
		qupv3_se2_spi_sleep = "/soc/pinctrl@f000000/qupv3_se2_spi_pins/qupv3_se2_spi_sleep";
		qupv3_se3_spi_pins = "/soc/pinctrl@f000000/qupv3_se3_spi_pins";
		qupv3_se3_spi_active = "/soc/pinctrl@f000000/qupv3_se3_spi_pins/qupv3_se3_spi_active";
		qupv3_se3_spi_sleep = "/soc/pinctrl@f000000/qupv3_se3_spi_pins/qupv3_se3_spi_sleep";
		qupv3_se4_spi_pins = "/soc/pinctrl@f000000/qupv3_se4_spi_pins";
		qupv3_se4_spi_active = "/soc/pinctrl@f000000/qupv3_se4_spi_pins/qupv3_se4_spi_active";
		qupv3_se4_spi_sleep = "/soc/pinctrl@f000000/qupv3_se4_spi_pins/qupv3_se4_spi_sleep";
		qupv3_se5_spi_pins = "/soc/pinctrl@f000000/qupv3_se5_spi_pins";
		qupv3_se5_spi_active = "/soc/pinctrl@f000000/qupv3_se5_spi_pins/qupv3_se5_spi_active";
		qupv3_se5_spi_sleep = "/soc/pinctrl@f000000/qupv3_se5_spi_pins/qupv3_se5_spi_sleep";
		qupv3_se6_spi_pins = "/soc/pinctrl@f000000/qupv3_se6_spi_pins";
		qupv3_se6_spi_active = "/soc/pinctrl@f000000/qupv3_se6_spi_pins/qupv3_se6_spi_active";
		qupv3_se6_spi_sleep = "/soc/pinctrl@f000000/qupv3_se6_spi_pins/qupv3_se6_spi_sleep";
		qupv3_se7_spi_pins = "/soc/pinctrl@f000000/qupv3_se7_spi_pins";
		qupv3_se7_spi_active = "/soc/pinctrl@f000000/qupv3_se7_spi_pins/qupv3_se7_spi_active";
		qupv3_se7_spi_sleep = "/soc/pinctrl@f000000/qupv3_se7_spi_pins/qupv3_se7_spi_sleep";
		qupv3_se8_i2c_pins = "/soc/pinctrl@f000000/qupv3_se8_i2c_pins";
		qupv3_se8_i2c_active = "/soc/pinctrl@f000000/qupv3_se8_i2c_pins/qupv3_se8_i2c_active";
		qupv3_se8_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se8_i2c_pins/qupv3_se8_i2c_sleep";
		qupv3_se9_i2c_pins = "/soc/pinctrl@f000000/qupv3_se9_i2c_pins";
		qupv3_se9_i2c_active = "/soc/pinctrl@f000000/qupv3_se9_i2c_pins/qupv3_se9_i2c_active";
		qupv3_se9_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se9_i2c_pins/qupv3_se9_i2c_sleep";
		qupv3_se10_i2c_pins = "/soc/pinctrl@f000000/qupv3_se10_i2c_pins";
		qupv3_se10_i2c_active = "/soc/pinctrl@f000000/qupv3_se10_i2c_pins/qupv3_se10_i2c_active";
		qupv3_se10_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se10_i2c_pins/qupv3_se10_i2c_sleep";
		qupv3_se11_i2c_pins = "/soc/pinctrl@f000000/qupv3_se11_i2c_pins";
		qupv3_se11_i2c_active = "/soc/pinctrl@f000000/qupv3_se11_i2c_pins/qupv3_se11_i2c_active";
		qupv3_se11_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se11_i2c_pins/qupv3_se11_i2c_sleep";
		qupv3_se12_i2c_pins = "/soc/pinctrl@f000000/qupv3_se12_i2c_pins";
		qupv3_se12_i2c_active = "/soc/pinctrl@f000000/qupv3_se12_i2c_pins/qupv3_se12_i2c_active";
		qupv3_se12_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se12_i2c_pins/qupv3_se12_i2c_sleep";
		qupv3_se13_i2c_pins = "/soc/pinctrl@f000000/qupv3_se13_i2c_pins";
		qupv3_se13_i2c_active = "/soc/pinctrl@f000000/qupv3_se13_i2c_pins/qupv3_se13_i2c_active";
		qupv3_se13_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se13_i2c_pins/qupv3_se13_i2c_sleep";
		qupv3_se8_spi_pins = "/soc/pinctrl@f000000/qupv3_se8_spi_pins";
		qupv3_se8_spi_active = "/soc/pinctrl@f000000/qupv3_se8_spi_pins/qupv3_se8_spi_active";
		qupv3_se8_spi_sleep = "/soc/pinctrl@f000000/qupv3_se8_spi_pins/qupv3_se8_spi_sleep";
		qupv3_se9_spi_pins = "/soc/pinctrl@f000000/qupv3_se9_spi_pins";
		qupv3_se9_spi_active = "/soc/pinctrl@f000000/qupv3_se9_spi_pins/qupv3_se9_spi_active";
		qupv3_se9_spi_sleep = "/soc/pinctrl@f000000/qupv3_se9_spi_pins/qupv3_se9_spi_sleep";
		qupv3_se10_spi_pins = "/soc/pinctrl@f000000/qupv3_se10_spi_pins";
		qupv3_se10_spi_active = "/soc/pinctrl@f000000/qupv3_se10_spi_pins/qupv3_se10_spi_active";
		qupv3_se10_spi_sleep = "/soc/pinctrl@f000000/qupv3_se10_spi_pins/qupv3_se10_spi_sleep";
		qupv3_se11_spi_pins = "/soc/pinctrl@f000000/qupv3_se11_spi_pins";
		qupv3_se11_spi_active = "/soc/pinctrl@f000000/qupv3_se11_spi_pins/qupv3_se11_spi_active";
		qupv3_se11_spi_sleep = "/soc/pinctrl@f000000/qupv3_se11_spi_pins/qupv3_se11_spi_sleep";
		qupv3_se12_spi_pins = "/soc/pinctrl@f000000/qupv3_se12_spi_pins";
		qupv3_se12_spi_active = "/soc/pinctrl@f000000/qupv3_se12_spi_pins/qupv3_se12_spi_active";
		qupv3_se12_spi_sleep = "/soc/pinctrl@f000000/qupv3_se12_spi_pins/qupv3_se12_spi_sleep";
		qupv3_se13_spi_pins = "/soc/pinctrl@f000000/qupv3_se13_spi_pins";
		qupv3_se13_spi_active = "/soc/pinctrl@f000000/qupv3_se13_spi_pins/qupv3_se13_spi_active";
		qupv3_se13_spi_sleep = "/soc/pinctrl@f000000/qupv3_se13_spi_pins/qupv3_se13_spi_sleep";
		qupv3_se14_i2c_pins = "/soc/pinctrl@f000000/qupv3_se14_i2c_pins";
		qupv3_se14_i2c_active = "/soc/pinctrl@f000000/qupv3_se14_i2c_pins/qupv3_se14_i2c_active";
		qupv3_se14_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se14_i2c_pins/qupv3_se14_i2c_sleep";
		qupv3_se15_i2c_pins = "/soc/pinctrl@f000000/qupv3_se15_i2c_pins";
		qupv3_se15_i2c_active = "/soc/pinctrl@f000000/qupv3_se15_i2c_pins/qupv3_se15_i2c_active";
		qupv3_se15_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se15_i2c_pins/qupv3_se15_i2c_sleep";
		qupv3_se16_i2c_pins = "/soc/pinctrl@f000000/qupv3_se16_i2c_pins";
		qupv3_se16_i2c_active = "/soc/pinctrl@f000000/qupv3_se16_i2c_pins/qupv3_se16_i2c_active";
		qupv3_se16_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se16_i2c_pins/qupv3_se16_i2c_sleep";
		qupv3_se17_i2c_pins = "/soc/pinctrl@f000000/qupv3_se17_i2c_pins";
		qupv3_se17_i2c_active = "/soc/pinctrl@f000000/qupv3_se17_i2c_pins/qupv3_se17_i2c_active";
		qupv3_se17_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se17_i2c_pins/qupv3_se17_i2c_sleep";
		qupv3_se18_i2c_pins = "/soc/pinctrl@f000000/qupv3_se18_i2c_pins";
		qupv3_se18_i2c_active = "/soc/pinctrl@f000000/qupv3_se18_i2c_pins/qupv3_se18_i2c_active";
		qupv3_se18_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se18_i2c_pins/qupv3_se18_i2c_sleep";
		qupv3_se19_i2c_pins = "/soc/pinctrl@f000000/qupv3_se19_i2c_pins";
		qupv3_se19_i2c_active = "/soc/pinctrl@f000000/qupv3_se19_i2c_pins/qupv3_se19_i2c_active";
		qupv3_se19_i2c_sleep = "/soc/pinctrl@f000000/qupv3_se19_i2c_pins/qupv3_se19_i2c_sleep";
		qupv3_se14_spi_pins = "/soc/pinctrl@f000000/qupv3_se14_spi_pins";
		qupv3_se14_spi_active = "/soc/pinctrl@f000000/qupv3_se14_spi_pins/qupv3_se14_spi_active";
		qupv3_se14_spi_sleep = "/soc/pinctrl@f000000/qupv3_se14_spi_pins/qupv3_se14_spi_sleep";
		qupv3_se15_spi_pins = "/soc/pinctrl@f000000/qupv3_se15_spi_pins";
		qupv3_se15_spi_active = "/soc/pinctrl@f000000/qupv3_se15_spi_pins/qupv3_se15_spi_active";
		qupv3_se15_spi_sleep = "/soc/pinctrl@f000000/qupv3_se15_spi_pins/qupv3_se15_spi_sleep";
		qupv3_se16_spi_pins = "/soc/pinctrl@f000000/qupv3_se16_spi_pins";
		qupv3_se16_spi_active = "/soc/pinctrl@f000000/qupv3_se16_spi_pins/qupv3_se16_spi_active";
		qupv3_se16_spi_sleep = "/soc/pinctrl@f000000/qupv3_se16_spi_pins/qupv3_se16_spi_sleep";
		qupv3_se17_spi_pins = "/soc/pinctrl@f000000/qupv3_se17_spi_pins";
		qupv3_se17_spi_active = "/soc/pinctrl@f000000/qupv3_se17_spi_pins/qupv3_se17_spi_active";
		qupv3_se17_spi_sleep = "/soc/pinctrl@f000000/qupv3_se17_spi_pins/qupv3_se17_spi_sleep";
		qupv3_se18_spi_pins = "/soc/pinctrl@f000000/qupv3_se18_spi_pins";
		qupv3_se18_spi_active = "/soc/pinctrl@f000000/qupv3_se18_spi_pins/qupv3_se18_spi_active";
		qupv3_se18_spi_sleep = "/soc/pinctrl@f000000/qupv3_se18_spi_pins/qupv3_se18_spi_sleep";
		qupv3_se19_spi_pins = "/soc/pinctrl@f000000/qupv3_se19_spi_pins";
		qupv3_se19_spi_active = "/soc/pinctrl@f000000/qupv3_se19_spi_pins/qupv3_se19_spi_active";
		qupv3_se19_spi_sleep = "/soc/pinctrl@f000000/qupv3_se19_spi_pins/qupv3_se19_spi_sleep";
		usb2_id_det_default = "/soc/pinctrl@f000000/usb2_id_det_default";
		adsp_smp2p_out = "/soc/qcom,smp2p-adsp/master-kernel";
		adsp_smp2p_in = "/soc/qcom,smp2p-adsp/slave-kernel";
		smp2p_rdbg2_out = "/soc/qcom,smp2p-adsp/qcom,smp2p-rdbg2-out";
		smp2p_rdbg2_in = "/soc/qcom,smp2p-adsp/qcom,smp2p-rdbg2-in";
		dsps_smp2p_out = "/soc/qcom,smp2p-dsps/master-kernel";
		dsps_smp2p_in = "/soc/qcom,smp2p-dsps/slave-kernel";
		sleepstate_smp2p_out = "/soc/qcom,smp2p-dsps/sleepstate-out";
		sleepstate_smp2p_in = "/soc/qcom,smp2p-dsps/qcom,sleepstate-in";
		cdsp_smp2p_out = "/soc/qcom,smp2p-cdsp/master-kernel";
		cdsp_smp2p_in = "/soc/qcom,smp2p-cdsp/slave-kernel";
		smp2p_qvrexternal5_out = "/soc/qcom,smp2p-cdsp/qcom,smp2p-qvrexternal5-out";
		smp2p_rdbg5_out = "/soc/qcom,smp2p-cdsp/qcom,smp2p-rdbg5-out";
		smp2p_rdbg5_in = "/soc/qcom,smp2p-cdsp/qcom,smp2p-rdbg5-in";
		npu_smp2p_out = "/soc/qcom,smp2p-npu/master-kernel";
		npu_smp2p_in = "/soc/qcom,smp2p-npu/slave-kernel";
		usb0 = "/soc/ssusb@a600000";
		dwc0 = "/soc/ssusb@a600000/dwc3@a600000";
		usb2_phy0 = "/soc/hsphy@88e3000";
		usb_qmp_dp_phy = "/soc/ssphy@88e8000";
		usb2_phy1 = "/soc/hsphy@88e4000";
		usb_qmp_phy = "/soc/ssphy@88eb000";
		mdss_mdp = "/soc/qcom,mdss_mdp@ae00000";
		smmu_sde_unsec = "/soc/qcom,mdss_mdp@ae00000/qcom,smmu_sde_unsec_cb";
		smmu_sde_sec = "/soc/qcom,mdss_mdp@ae00000/qcom,smmu_sde_sec_cb";
		sde_dp = "/soc/qcom,dp_display@ae90000";
		sde_rscc = "/soc/qcom,sde_rscc@af20000";
		mdss_dsi0 = "/soc/qcom,mdss_dsi_ctrl0@ae94000";
		mdss_dsi1 = "/soc/qcom,mdss_dsi_ctrl1@ae96000";
		mdss_dsi_phy0 = "/soc/qcom,mdss_dsi_phy0@ae94400";
		mdss_dsi_phy1 = "/soc/qcom,mdss_dsi_phy1@ae96400";
		mdss_dsi0_pll = "/soc/qcom,mdss_dsi_pll@ae94900";
		mdss_dsi1_pll = "/soc/qcom,mdss_dsi_pll@ae96900";
		mdss_dp_pll = "/soc/qcom,mdss_dp_pll@c011000";
		cam_csiphy0 = "/soc/qcom,csiphy@ac6a000";
		cam_csiphy1 = "/soc/qcom,csiphy@ac6c000";
		cam_csiphy2 = "/soc/qcom,csiphy@ac6e000";
		cam_csiphy3 = "/soc/qcom,csiphy@ac70000";
		cam_csiphy4 = "/soc/qcom,csiphy@ac72000";
		cam_csiphy5 = "/soc/qcom,csiphy@ac74000";
		cam_cci0 = "/soc/qcom,cci@ac4f000";
		i2c_freq_100Khz_cci0 = "/soc/qcom,cci@ac4f000/qcom,i2c_standard_mode";
		i2c_freq_400Khz_cci0 = "/soc/qcom,cci@ac4f000/qcom,i2c_fast_mode";
		i2c_freq_custom_cci0 = "/soc/qcom,cci@ac4f000/qcom,i2c_custom_mode";
		i2c_freq_1Mhz_cci0 = "/soc/qcom,cci@ac4f000/qcom,i2c_fast_plus_mode";
		cam_cci1 = "/soc/qcom,cci@ac50000";
		i2c_freq_100Khz_cci1 = "/soc/qcom,cci@ac50000/qcom,i2c_standard_mode";
		i2c_freq_400Khz_cci1 = "/soc/qcom,cci@ac50000/qcom,i2c_fast_mode";
		i2c_freq_custom_cci1 = "/soc/qcom,cci@ac50000/qcom,i2c_custom_mode";
		i2c_freq_1Mhz_cci1 = "/soc/qcom,cci@ac50000/qcom,i2c_fast_plus_mode";
		ife_iova_mem_map = "/soc/qcom,cam_smmu/msm_cam_smmu_ife/iova-mem-map";
		jpeg_iova_mem_map = "/soc/qcom,cam_smmu/msm_cam_smmu_jpeg/iova-mem-map";
		icp_iova_mem_map = "/soc/qcom,cam_smmu/msm_cam_smmu_icp/iova-mem-map";
		cpas_cdm_iova_mem_map = "/soc/qcom,cam_smmu/msm_cam_smmu_cpas_cdm/iova-mem-map";
		level3_rt0_rd_wr_sum = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level3-nodes/level3-rt0-rd-wr-sum";
		level3_nrt0_rd_wr_sum = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level3-nodes/level3-nrt0-rd-wr-sum";
		level3_nrt1_rd_wr_sum = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level3-nodes/level3-nrt1-rd-wr-sum";
		level2_rt0_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level2-nodes/level2-rt0-wr";
		level2_rt0_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level2-nodes/level2-rt0-rd";
		level2_nrt0_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level2-nodes/level2-nrt0-wr";
		level2_nrt0_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level2-nodes/level2-nrt0-rd";
		level2_nrt1_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level2-nodes/level2-nrt1-rd";
		level1_rt0_wr0 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-rt0-wr0";
		level1_rt0_wr1 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-rt0-wr1";
		level1_rt0_rd0 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-rt0-rd0";
		level1_rt0_wr2 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-rt0-wr2";
		level1_nrt0_wr0 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-nrt0-wr0";
		level1_nrt0_rd0 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-nrt0-rd0";
		level1_nrt0_wr1 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-nrt0-wr1";
		level1_nrt0_rd2 = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level1-nodes/level1-nrt0-rd2";
		ife0_ubwc_stats_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife0-ubwc-stats-wr";
		ife1_ubwc_stats_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife1-ubwc-stats-wr";
		ife0_linear_pdaf_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife0-linear-pdaf-wr";
		ife1_linear_pdaf_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife1-linear-pdaf-wr";
		ife2_rdi_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife2-rdi-all-wr";
		ife3_rdi_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife3-rdi-all-wr";
		ife4_rdi_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife4-rdi-all-wr";
		ife5_rdi_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife5-rdi-all-wr";
		ife0_rdi_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife0-rdi-all-rd";
		ife1_rdi_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife1-rdi-all-rd";
		custom0_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/custom0-all-rd";
		ife0_rdi_pixel_raw_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife0-rdi-pixel-raw-wr";
		ife1_rdi_pixel_raw_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife1-rdi-pixel-raw-wr";
		ife6_rdi_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ife6-rdi-all-wr";
		custom0_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/custom0-all-wr";
		ipe0_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ipe0-all-wr";
		bps0_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/bps0-all-wr";
		ipe0_ref_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ipe0-ref-rd";
		bps0_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/bps0-all-rd";
		ipe0_in_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/ipe0-in-rd";
		jpeg_enc0_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/jpeg-enc0-all-wr";
		jpeg_dma0_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/jpeg-dma0-all-wr";
		jpeg_enc0_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/jpeg-enc0-all-rd";
		jpeg_dma0_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/jpeg-dma0-all-rd";
		fd0_all_wr = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/fd0-all-wr";
		fd0_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/fd0-all-rd";
		cpas_cdm0_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/cpas-cdm0-all-rd";
		icp0_all_rd = "/soc/qcom,cam-cpas@ac40000/camera-bus-nodes/level0-nodes/icp0-all-rd";
		cam_csid0 = "/soc/qcom,csid0@acb5200";
		cam_vfe0 = "/soc/qcom,ife0@acb4000";
		cam_csid1 = "/soc/qcom,csid1@acc4200";
		cam_vfe1 = "/soc/qcom,ife1@acc3000";
		cam_csid_lite0 = "/soc/qcom,csid-lite0@acd9200";
		cam_vfe_lite0 = "/soc/qcom,ife-lite0@acd9000";
		cam_csid_lite1 = "/soc/qcom,csid-lite1@acdb400";
		cam_vfe_lite1 = "/soc/qcom,ife-lite1@acdb200";
		cam_csid_lite2 = "/soc/qcom,csid-lite2@acdd600";
		cam_vfe_lite2 = "/soc/qcom,ife-lite2@acdd400";
		cam_csid_lite3 = "/soc/qcom,csid-lite3@acdf800";
		cam_vfe_lite3 = "/soc/qcom,ife-lite3@acdf600";
		cam_csid_lite4 = "/soc/qcom,csid-lite4@ace1a00";
		cam_vfe_lite4 = "/soc/qcom,ife-lite4@ace1800";
		cam_a5 = "/soc/qcom,a5@ac00000";
		cam_ipe0 = "/soc/qcom,ipe0";
		cam_bps = "/soc/qcom,bps";
		cam_jpeg_enc = "/soc/qcom,jpegenc@ac53000";
		cam_jpeg_dma = "/soc/qcom,jpegdma@ac57000";
		qupv3_0 = "/soc/qcom,qupv3_0_geni_se@9c0000";
		qupv3_se2_2uart = "/soc/qcom,qup_uart@988000";
		qupv3_se3_2uart = "/soc/qcom,qup_uart@98c000";
		qupv3_se5_2uart = "/soc/qcom,qup_uart@994000";
		qupv3_se6_4uart = "/soc/qcom,qup_uart@998000";
		qupv3_se0_i2c = "/soc/i2c@980000";
		qupv3_se1_i2c = "/soc/i2c@984000";
		qupv3_se2_i2c = "/soc/i2c@988000";
		qupv3_se3_i2c = "/soc/i2c@98c000";
		qupv3_se4_i2c = "/soc/i2c@990000";
		qupv3_se5_i2c = "/soc/i2c@994000";
		qupv3_se6_i2c = "/soc/i2c@998000";
		qupv3_se7_i2c = "/soc/i2c@99c000";
		qupv3_se0_spi = "/soc/spi@980000";
		qupv3_se1_spi = "/soc/spi@984000";
		qupv3_se2_spi = "/soc/spi@988000";
		qupv3_se3_spi = "/soc/spi@98c000";
		qupv3_se4_spi = "/soc/spi@990000";
		qupv3_se5_spi = "/soc/spi@994000";
		qupv3_se6_spi = "/soc/spi@998000";
		qupv3_se7_spi = "/soc/spi@99c000";
		qupv3_1 = "/soc/qcom,qupv3_1_geni_se@ac0000";
		qupv3_se12_2uart = "/soc/qcom,qup_uart@a90000";
		qupv3_se13_2uart = "/soc/qcom,qup_uart@a94000";
		qupv3_se8_i2c = "/soc/i2c@a80000";
		qupv3_se9_i2c = "/soc/i2c@a84000";
		qupv3_se10_i2c = "/soc/i2c@a88000";
		qupv3_se11_i2c = "/soc/i2c@a8c000";
		qupv3_se12_i2c = "/soc/i2c@a90000";
		qupv3_se13_i2c = "/soc/i2c@a94000";
		qupv3_se8_spi = "/soc/spi@a80000";
		qupv3_se9_spi = "/soc/spi@a84000";
		qupv3_se10_spi = "/soc/spi@a88000";
		qupv3_se11_spi = "/soc/spi@a8c000";
		qupv3_se12_spi = "/soc/spi@a90000";
		qupv3_se13_spi = "/soc/spi@a94000";
		qupv3_2 = "/soc/qcom,qupv3_2_geni_se@8c0000";
		qupv3_se17_4uart = "/soc/qcom,qup_uart@88c000";
		qupv3_se18_2uart = "/soc/qcom,qup_uart@890000";
		qupv3_se14_i2c = "/soc/i2c@880000";
		qupv3_se15_i2c = "/soc/i2c@884000";
		fsa4480 = "/soc/i2c@884000/fsa4480@43";
		qupv3_se16_i2c = "/soc/i2c@888000";
		qupv3_se17_i2c = "/soc/i2c@88c000";
		qupv3_se18_i2c = "/soc/i2c@890000";
		qupv3_se19_i2c = "/soc/i2c@894000";
		qupv3_se14_spi = "/soc/spi@880000";
		qupv3_se15_spi = "/soc/spi@884000";
		qupv3_se16_spi = "/soc/spi@888000";
		qupv3_se17_spi = "/soc/spi@88c000";
		qupv3_se18_spi = "/soc/spi@890000";
		qupv3_se19_spi = "/soc/spi@894000";
		pcm0 = "/soc/qcom,msm-pcm";
		routing = "/soc/qcom,msm-pcm-routing";
		compr = "/soc/qcom,msm-compr-dsp";
		pcm1 = "/soc/qcom,msm-pcm-low-latency";
		pcm2 = "/soc/qcom,msm-ultra-low-latency";
		pcm_noirq = "/soc/qcom,msm-pcm-dsp-noirq";
		trans_loopback = "/soc/qcom,msm-transcode-loopback";
		compress = "/soc/qcom,msm-compress-dsp";
		voip = "/soc/qcom,msm-voip-dsp";
		voice = "/soc/qcom,msm-pcm-voice";
		stub_codec = "/soc/qcom,msm-stub-codec";
		afe = "/soc/qcom,msm-pcm-afe";
		loopback = "/soc/qcom,msm-pcm-loopback";
		loopback1 = "/soc/qcom,msm-pcm-loopback-low-latency";
		pcm_dtmf = "/soc/qcom,msm-pcm-dtmf";
		msm_dai_mi2s = "/soc/qcom,msm-dai-mi2s";
		dai_mi2s0 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-prim";
		dai_mi2s1 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-sec";
		dai_mi2s2 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-tert";
		dai_mi2s3 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-quat";
		dai_mi2s4 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-quin";
		dai_mi2s5 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-senary";
		lsm = "/soc/qcom,msm-lsm-client";
		sb_7_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-7-rx";
		sb_7_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-7-tx";
		sb_8_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-8-tx";
		bt_sco_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-bt-sco-rx";
		bt_sco_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-bt-sco-tx";
		int_fm_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-int-fm-rx";
		int_fm_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-int-fm-tx";
		afe_pcm_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-be-afe-pcm-rx";
		afe_pcm_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-be-afe-pcm-tx";
		afe_proxy_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-proxy-rx";
		afe_proxy_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-proxy-tx";
		incall_record_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-record-rx";
		incall_record_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-record-tx";
		incall_music_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-music-rx";
		incall_music_2_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-music-2-rx";
		usb_audio_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-usb-audio-rx";
		usb_audio_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-usb-audio-tx";
		hostless = "/soc/qcom,msm-pcm-hostless";
		audio_apr = "/soc/qcom,msm-audio-apr";
		msm_audio_ion = "/soc/qcom,msm-audio-apr/qcom,msm-audio-ion";
		q6core = "/soc/qcom,msm-audio-apr/qcom,q6core-audio";
		lpass_core_hw_vote = "/soc/qcom,msm-audio-apr/qcom,q6core-audio/vote_lpass_core_hw";
		lpass_audio_hw_vote = "/soc/qcom,msm-audio-apr/qcom,q6core-audio/vote_lpass_audio_hw";
		dai_pri_auxpcm = "/soc/qcom,msm-pri-auxpcm";
		dai_sec_auxpcm = "/soc/qcom,msm-sec-auxpcm";
		dai_tert_auxpcm = "/soc/qcom,msm-tert-auxpcm";
		dai_quat_auxpcm = "/soc/qcom,msm-quat-auxpcm";
		dai_quin_auxpcm = "/soc/qcom,msm-quin-auxpcm";
		dai_sen_auxpcm = "/soc/qcom,msm-sen-auxpcm";
		hdmi_dba = "/soc/qcom,msm-hdmi-dba-codec-rx";
		adsp_loader = "/soc/qcom,msm-adsp-loader";
		tdm_pri_rx = "/soc/qcom,msm-dai-tdm-pri-rx";
		dai_pri_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-pri-rx/qcom,msm-dai-q6-tdm-pri-rx-0";
		tdm_pri_tx = "/soc/qcom,msm-dai-tdm-pri-tx";
		dai_pri_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-pri-tx/qcom,msm-dai-q6-tdm-pri-tx-0";
		tdm_sec_rx = "/soc/qcom,msm-dai-tdm-sec-rx";
		dai_sec_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-sec-rx/qcom,msm-dai-q6-tdm-sec-rx-0";
		tdm_sec_tx = "/soc/qcom,msm-dai-tdm-sec-tx";
		dai_sec_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-sec-tx/qcom,msm-dai-q6-tdm-sec-tx-0";
		tdm_tert_rx = "/soc/qcom,msm-dai-tdm-tert-rx";
		dai_tert_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-tert-rx/qcom,msm-dai-q6-tdm-tert-rx-0";
		tdm_tert_tx = "/soc/qcom,msm-dai-tdm-tert-tx";
		dai_tert_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-tert-tx/qcom,msm-dai-q6-tdm-tert-tx-0";
		tdm_quat_rx = "/soc/qcom,msm-dai-tdm-quat-rx";
		dai_quat_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-quat-rx/qcom,msm-dai-q6-tdm-quat-rx-0";
		tdm_quat_tx = "/soc/qcom,msm-dai-tdm-quat-tx";
		dai_quat_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-quat-tx/qcom,msm-dai-q6-tdm-quat-tx-0";
		tdm_quin_rx = "/soc/qcom,msm-dai-tdm-quin-rx";
		dai_quin_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-quin-rx/qcom,msm-dai-q6-tdm-quin-rx-0";
		tdm_quin_tx = "/soc/qcom,msm-dai-tdm-quin-tx";
		dai_quin_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-quin-tx/qcom,msm-dai-q6-tdm-quin-tx-0";
		tdm_sen_rx = "/soc/qcom,msm-dai-tdm-sen-rx";
		dai_sen_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-sen-rx/qcom,msm-dai-q6-tdm-sen-rx-0";
		tdm_sen_tx = "/soc/qcom,msm-dai-tdm-sen-tx";
		dai_sen_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-sen-tx/qcom,msm-dai-q6-tdm-sen-tx-0";
		afe_loopback_tx = "/soc/qcom,msm-dai-q6-afe-loopback-tx";
		msm_vidc = "/soc/qcom,vidc@aa00000";
		msm_cvp = "/soc/qcom,cvp@ab00000";
		msm_npu = "/soc/qcom,msm_npu@9800000";
		pil_gpu = "/soc/qcom,kgsl-hyp";
		msm_bus = "/soc/qcom,kgsl-busmon";
		gpubw = "/soc/qcom,gpubw";
		gpu_opp_table = "/soc/gpu-opp-table";
		msm_gpu = "/soc/qcom,kgsl-3d0@3d00000";
		kgsl_msm_iommu = "/soc/qcom,kgsl-iommu@3da0000";
		gfx3d_user = "/soc/qcom,kgsl-iommu@3da0000/gfx3d_user";
		gfx3d_secure = "/soc/qcom,kgsl-iommu@3da0000/gfx3d_secure";
		gmu = "/soc/qcom,gmu@3d6a000";
		gmu_user = "/soc/qcom,gmu@3d6a000/gmu_user";
		gmu_kernel = "/soc/qcom,gmu@3d6a000/gmu_kernel";
		ipcc_self_ping_apss = "/soc/ipcc-self-ping-apss";
		ipcc_self_ping_cdsp = "/soc/ipcc-self-ping-cdsp";
		ipcc_self_ping_adsp = "/soc/ipcc-self-ping-adsp";
		ipcc_self_ping_slpi = "/soc/ipcc-self-ping-slpi";
		ipcc_self_ping_npu = "/soc/ipcc-self-ping-npu";
		firmware = "/firmware";
		reserved_memory = "/reserved-memory";
		hyp_mem = "/reserved-memory/hyp_region@80000000";
		xbl_aop_mem = "/reserved-memory/xbl_aop_region@80700000";
		cmd_db = "/reserved-memory/reserved-memory@80860000";
		smem_mem = "/reserved-memory/smem_region@80900000";
		removed_mem = "/reserved-memory/removed_region@80b00000";
		pil_camera_mem = "/reserved-memory/pil_camera_region@86200000";
		pil_gpu_mem = "/reserved-memory/pil_gpu_region@8681a000";
		pil_npu_mem = "/reserved-memory/pil_npu_region@86900000";
		pil_video_mem = "/reserved-memory/pil_video_region@86e00000";
		pil_cvp_mem = "/reserved-memory/pil_cvp_region@87300000";
		pil_cdsp_mem = "/reserved-memory/pil_cdsp_region@87800000";
		pil_adsp_mem = "/reserved-memory/pil_adsp_region@8a100000";
		pil_spss_mem = "/reserved-memory/pil_spss_region@8be00000";
		adsp_mem = "/reserved-memory/adsp_region";
		sdsp_mem = "/reserved-memory/sdsp_region";
		cdsp_mem = "/reserved-memory/cdsp_region";
		cont_splash_memory = "/reserved-memory/cont_splash_region@9c000000";
		dfps_data_memory = "/reserved-memory/dfps_data_region@9e300000";
		sp_mem = "/reserved-memory/sp_region";
		user_contig_mem = "/reserved-memory/user_contig_region";
		qseecom_mem = "/reserved-memory/qseecom_region";
		qseecom_ta_mem = "/reserved-memory/qseecom_ta_region";
		secure_display_memory = "/reserved-memory/secure_display_region";
		cnss_wlan_mem = "/reserved-memory/cnss_wlan_region";
		mailbox_mem = "/reserved-memory/mailbox_region";
		vendor = "/vendor";
	};
};